CN101218670A - Semiconductor device and method for manufacturing same - Google Patents
Semiconductor device and method for manufacturing same Download PDFInfo
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- CN101218670A CN101218670A CNA2006800251662A CN200680025166A CN101218670A CN 101218670 A CN101218670 A CN 101218670A CN A2006800251662 A CNA2006800251662 A CN A2006800251662A CN 200680025166 A CN200680025166 A CN 200680025166A CN 101218670 A CN101218670 A CN 101218670A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Abstract
The present invention provides a method of manufacturing a semiconductor device 28 in which a plating mask 38, 39 having a noble metal plating layer 35 as an uppermost layer is formed at a predetermined portion on an obverse surface side or a reverse surface side of a leadframe material 10 , and the leadframe material 10 is consecutively subjected to etching by using the plating mask 38, 39 as a resist mask, so as to form external connection terminal portions 22 which electrically communicate with a semiconductor element 18 disposed in an interior of an encapsulating resin 21 , and which project downwardly. Base metal plating or noble metal plating 33 exhibiting etching solution resistance is provided as a lowermost layer of the plating mask 38, 39.
Description
Background technology
The present invention relates to the semiconductor device of a kind of chip size packages type (below be called " CSP type "), more particularly, relate to a kind of wherein outside semiconductor device and manufacture method thereof that protrude from the basal surface side of encapsulating resin the end that connect.
It is known using the band CSP N-type semiconductor N device of polyimide resin band and solder ball and using bump chip carrier type (below be called " BCC the type ") semiconductor device of base metal (base metal), has reflected the demand of the miniaturization of semiconductor device.But band CSP N-type semiconductor N device has the wherein problem of polyimide resin band costliness, and because the polyimide resin band is soft, the polyimide resin band is not suitable for the band transmission.Simultaneously, BCC N-type semiconductor N device has problem and is, after removing base metal by etching, stays discrete device, so that their molded surface need fix by pressure-sensitive adhesive tape, has caused expensive.Thus, this assignee early proposes the method for disclosed manufacturing semiconductor device in a kind of patent documentation 1.
In Fig. 7 A to 7J, show the example of this method of making semiconductor device.(for example by Cu, Cu alloy or iron-nickel alloy, 42 alloys) apply after the resist film 11 on the whole obverse and reverse of the lead frame material of Gou Chenging (leadframematerial) 10, utilize predetermined lead pattern exposure resist film 11, develop then, form the etching figure 12 of electroplating mask thus.Then, lead frame material 10 stands whole body to be electroplated, and if resist film 11 be removed, on this obverse and reverse, form so and electroplate mask 13 and 14 (steps A is to D).
Next,, electroplate mask 13 as Etching mask, make upper surface side (that is front surface side) stand to etch partially by using afterwards with another resist film 15 whole lower surfaces of coating (that is, reverse side).In the case, owing to be not etched, finally protrude by the preformed element of resist film mounting portion 16 and lead-in wire bonding part 17 by those parts on the surface of the lead frame material 10 of plating mask 13 coverings.Should be noted that element mounting portion 16 is electroplated mask 13 with the surface of lead-in wire bonding part 17 and covered (step e and F).
Next, on lower face side, remove after the resist film 15, semiconductor element 18 is installed on element mounting portion 16, and the electrode pad part quilt lead-in wire bonding of semiconductor element 18 and lead-in wire bonding part 17, semiconductor element 18, bonding wire 20 and lead-in wire bonding part 17 are by resin-encapsulate.Reference number 21 expression encapsulating resins (step F and H).
Subsequently, this reverse side stands to etch partially.At this moment, a part that forms the lead frame material 10 of electroplating mask 14 is remaining, and is not etched, owing to electroplate the effect that mask 14 plays Etching mask.As a result, protrude on the outside anti-surface that connects end 22 and element mounting portion 16.Because the outside end 22 that connects interconnects with lead-in wire bonding part 17, each outside end 22 (17 connections therewith of lead-in wire bonding part) that connects is independently made, and is electrically connected to each electrode pad part of semiconductor element 18.Because these semiconductor device 23 are arranged and side by side made with grid usually, they are cut and separate (dispersing), make single semiconductor device 23 (step I and J) thus.
[patent documentation 1] JP-A-2001-24135
But, utilize above-mentioned conventional semiconductor device to form and electroplate mask 13 and 14, as shown in Figure 8.That is, the Ni priming coat 24 with 1 μ m thickness is set by going up on the surface (comprising reverse side) of lead frame material 10, and by further be provided with thereon precious metal electroplating layer with about 0.2 μ m thickness (for example, Au) 25, form and electroplate mask 13 and 14.Because (layer away from lead frame material 10 is called as the upper strata to the precious metal electroplating layer 25 on the upper sides, and close with it layer is called as lower floor) have an etching liquid repellence, in etching process, precious metal electroplating layer 25 is not corroded, the corrosion but lead frame material 10 that is formed by copper or copper alloy and the Ni priming coat 24 on the lower layer side are etched is shown in Fig. 9 A.Therefore, the periphery of precious metal electroplating layer 25 supposition paper tinsel shape shape, and be adhered to lead-in wire bonding part 17, element mounting portion 16 and outside each the periphery that is connected end 22, form plating burr (plating burr) (anodized foil) 26 thus.
If there are this plating burr 26, in lead-in wire bond sequence, resin-encapsulate operation (that is, molding process) waited, plating burr 26 were stripped from so, caused the defective that comprises short circuit between out of order lead-in wire bonding and the terminal etc. in semiconductor device.
Summary of the invention
In view of the foregoing design the present invention, and its objective is the manufacture method that a kind of semiconductor device is provided,, produce a small amount of substandard products, and a kind of semiconductor device of making by this method is provided by suppressing or eliminating the generation of electroplating burr.
According to a first aspect of the invention, a kind of method of making semiconductor device is provided, wherein front surface side or the formation of the reservations office on the anti-face side at lead frame material has the plating mask of precious metal electroplating layer as the superiors, and by using this to electroplate mask as Etching mask, etching lead frame material continuously, so that form and be connected the end with the outside of the semiconductor element electric connection of in the inside of encapsulating resin, arranging, this outside connects end protrudes downwards, and this method may further comprise the steps: be provided with demonstrate the etching liquid repellence base metal electrodeposited coating (plating) or precious metal electroplating layer as the bottom of electroplating mask.
In the present invention, the coating of electroplating the bottom of mask is meant the coating that directly contacts with the front surface (or anti-surface) of lead frame material, and the coating of the coating span lead frame material farthest side of the superiors.
In addition, in the manufacture method of semiconductor device according to the invention, this thickness of electroplating mask is preferably bigger, for example, and 1 to 10 μ m.In the case, arrange in mid portion under the situation that the coating (for example, Ni coating) of the corrosion that is etched easily waits that owing to this coating liquid that is etched corrodes, so the thickness of this coating preferably is set as 9/10 or following (preferred 4/6) of gross thickness.In addition, because tin coating is difficult to the corrosion that is etched, therefore can use your gold plate (this scheme is applied to follow-up aspect of the present invention) in the tin coating replacement bottom.
In addition, (in aspect of the present invention first to the 5th) in the present invention, demonstrate the etching liquid repellence the base metal electrodeposited coating be meant, for example, tin coating, tin bismuth coating, kupper solder coating, lead-free solder coating or the like.
According to a second aspect of the invention, a kind of method of making semiconductor device is provided, comprise: on the lead-in wire bonding part that forms around the periphery of the part of the semiconductor element on the front surface side of lead frame material, be connected on the end with the outside that forms on the anti-face side of the lead frame material consistent with this lead-in wire bonding part, formation has the first step of precious metal electroplating layer as the plating mask of the superiors; On the anti-face side of lead frame material, form after the resist film, by using the plating mask that on the front surface side, forms as Etching mask, from the front surface side, on lead frame material, carry out the etching processing of desired depth, so that make second step that the lead-in wire bonding partly protrudes; On lead frame material, install after the semiconductor element,, form the third step of conducting channel thus by the electrode pad part and the lead-in wire bonding part that corresponds respectively to this of bonding wire connection semiconductor element; Seal the 4th step of the front surface side of the lead frame material that comprises semiconductor element, bonding wire and lead-in wire bonding part; And resist film by using formed plating mask to remove as Etching mask, on the anti-face side of lead frame material, carry out etching processing, so that make outside the 5th step that the end is protruded and independently made that connects, wherein provide demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer as the bottom of plating mask.
Should be noted that the resist film that forms can be to have in its place bonding and can be by peeling off the resist film of the carrying material of removing after etching on the anti-face side of this lead frame material.
In addition, according to of the present invention first or the manufacture method of the semiconductor device of second aspect in, can in lead frame material, be formed centrally the element mounting portion, be connected the end with the outside irrelevant.In addition, make in the method for semiconductor device, can below semiconductor element, directly be provided for the terminal of heat dissipation at this.
According to a third aspect of the invention we, a kind of manufacture method of semiconductor device is provided, comprise: the first step that forms the plating mask that its topmost portion is made of the precious metal electroplating layer, the position of the electrode pad part of arranging on the bottom of the semiconductor element of installing on corresponding to the front surface side at lead frame material forms this and electroplates mask on the obverse and reverse of lead frame material; On the anti-face side of lead frame material, form after the resist film, by using the plating mask that on the front surface side, forms as Etching mask, from the front surface side, on lead frame material, carry out the etching processing of desired depth, so that make that being used to be electrically connected to electrode pad inside partly connects second step that protrude the end; The inside that semiconductor element is installed on semiconductor element and lead frame material connects to be set up between the end after the conduction, and resin-encapsulate comprises the third step of front surface side of the lead frame material of this semiconductor element; And resist film by using formed plating mask to remove as Etching mask, on the anti-face side of this lead frame material, carry out etching processing, so that make to connect the 4th step that protrude the end and quilt is independently made with the inner outside integrated and that be communicated with, end that is connected, wherein provide demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer as the bottom of plating mask.
Should be noted that the resist film that forms on the anti-face side of this lead frame material can be the resist film that has at the carrying material of its place's bonding, and can remove by peeling off after the etching.
By first any one the manufacture method of semiconductor device, make semiconductor device according to fourth aspect present invention to the third aspect according to the present invention.
According to a fifth aspect of the invention, a kind of outside semiconductor device that connects the end that has is provided, this outside connects the end and is electrically connected to the semiconductor element of sealing and protrudes into anti-face side, comprise: the connection end (comprising that directly the lead-in wire bonding part and the inside of contact are connected the end with semiconductor element) that is electrically connected to the electrode pad part of semiconductor element, wherein this connection end is connected the end and has their the superiors and the bottom with outside, each described the superiors is made of the precious metal electroplating layer, each described bottom by demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer constitute.
According to a fifth aspect of the invention, a kind of manufacture method of semiconductor device is provided, comprise: connect in inside to form on the end and have the first step of the plating mask of precious metal electroplating layer as the superiors, this inside connects electrode pad part that end is electrically connected to the semiconductor element of installing on the front surface side of lead frame material and is connected the connection end, outside that forms on the anti-face side of the consistent lead frame material in end with this inside; On the anti-face side of this lead frame material, form after the resist film, by using the plating mask that on the front surface side, forms as Etching mask, from the front surface side, on lead frame material, carry out the etching processing of desired depth, so that make this inside connect second step that protrude the end; Install on lead frame material after the semiconductor element, the electrode pad part that is electrically connected semiconductor element is connected the third step of end with the inside that corresponds respectively to this; Seal the 4th step that comprises the semiconductor element and the front surface side of the inner lead frame material that is connected the end; And by using resist film that formed plating mask removes as Etching mask, on the anti-face side of lead frame material, carry out etching processing, so that feasible outside connection end is protruded and is separated, and have outside connection end on outside being formed in and on the inboard, have inner the 5th step that is connected the independent conductor terminal of end, wherein after the etching processing in second step and the 5th step, the step that the unhairing limit is provided and cleans this electrodeposited coating is used to remove inner end and outside each the periphery plating burr of generation on every side that are connected the end of connecting.
The resist film that forms on the anti-face side of this lead frame material can be the resist film that has at the carrying material of its place's bonding, and can remove by peeling off after the etching.
Unhairing limit and cleaning at the electrodeposited coating of this indication comprise, for example, by in cleaning process, applying ultrasonic wave, make the plating burr that produce by etching with each in be connected the situation that the surface perimeter of end is separated; Remove the situation of electroplating burr by injection water on them; The situation of utilizing brush etc. mechanically to remove the plating burr and remove plating burr separately subsequently; Intermediate products (that is, the product that obtains immediately after etching partially) are dipped in the tank with ultrasonic transducer, to peel off this plating burr, the situation of washing subsequently; Or the combination of these situations.
In the manufacture method of semiconductor device according to the invention, the inside of this conductor terminal connects the end and can partly be made of the lead-in wire bonding, and can arrange to have gap positioned opposite to each other around semiconductor element.
In addition, in the manufacture method of semiconductor device according to the invention, center at the lead frame material that separates with the conductor terminal, can be formed for installing the element mounting portion of semiconductor element, in first step, also can on the front surface of element mounting portion and anti-surface, form and electroplate mask, and after the etching processing in second step and the 5th step, in the step of unhairing limit and cleaning electrodeposited coating, can remove the plating burr that produced.
In addition, in the manufacture method of semiconductor device according to the invention, center at the lead frame material that separates with the conductor terminal, can be formed for installing the terminal that is used for heat dissipation of semiconductor element with the grid array form thereon, in first step, also can on the front surface of the terminal that is used for heat dissipation and anti-surface, form and electroplate mask, and after the etching processing in second step and the 5th step, in the step of unhairing limit and cleaning electrodeposited coating, can remove the plating burr that lock produces.
In addition, in the manufacture method of semiconductor device according to the invention, this semiconductor device can be made of flip-chip (flip-chip) N-type semiconductor N device, and connection end, the inside of this conductor terminal can be connected to the electrode pad part of arranging on the bottom of semiconductor element.
According to the present invention first to the manufacture method of the semiconductor device aspect any one of the third aspect, since demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer be set to electroplate the bottom of mask, the generation of electroplating burr is suppressed to greatest extent, and does not need the operation of unhairing limit.The manufacture method of the semiconductor device that wherein disqualification rate is low can be provided as a result.
In addition, in the semiconductor device aspect the 4th or the 5th according to the present invention, the connection end that is electrically connected to the electrode pad part of semiconductor element has their the superiors and their bottom with the outside end that is connected, each described the superiors is made of the precious metal electroplating layer, with each described bottom by demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer constitute.Therefore, can provide the semiconductor device that wherein guarantees electrodeposited coating thickness, and the ratio of defectiveness product is low.
In manufacture method,, can provide the manufacture method of the lower semiconductor device of a kind of wherein disqualification rate because the burr that the periphery of the plating mask of generation centers on after (partly) etching processing are removed according to the semiconductor device of fifth aspect present invention.
In addition, owing in the formation of electroplating mask, do not carry out special plating, so the manufacturing cost step-down of semiconductor device.
Description of drawings
Fig. 1 is the explanatory according to the semiconductor device of first embodiment of the invention;
Fig. 2 is the profile of the details of explanation lead-in wire bonding part;
Fig. 3 A to 3C is an explanatory of using the semiconductor device of first embodiment;
Fig. 4 is the explanatory according to the semiconductor device of second embodiment of the invention;
Fig. 5 is the profile of the details of explanation lead-in wire bonding part;
Fig. 6 A to 6C is an explanatory of using the semiconductor device of second embodiment;
Fig. 7 A to 7J is the explanatory according to the manufacture method of the semiconductor device of conventional example;
Fig. 8 is the explanatory according to the plating mask of conventional example; And
Fig. 9 A and 9B are the explanatory that the production of burr is electroplated in explanation.
The description of reference number and symbol
10: lead frame material, 11: resist film, 12: the etching figure, 13,14: electroplate mask, 15: anti-etching dose of film, 16: element mounting portion, 17: lead-in wire bonding part, 18: semiconductor element, 20: bonding wire, 21: encapsulating resin, 22: the outside end that connects, 23: semiconductor device, 24:Ni priming coat, 25: the precious metal electroplating layer, 26: electroplate burr, 28: semiconductor device, 29: semiconductor element, 30: electrode pad part, 32: copper conductor, 33: gold plate, 34: priming coat, 35: gold plate, 36: substrate, 38,39: electroplate mask, 40,42: semiconductor device, 43: semiconductor element, 44: electrode pad part, 45: semiconductor device
Embodiment
For the ease of understanding of the present invention,, embodiments of the invention are described referring now to accompanying drawing.
Here, Fig. 1 is by the explanatory according to the semiconductor device of the manufacture method manufacturing of the semiconductor device of first embodiment of the invention.Fig. 2 is the cutaway view according to the details of the lead-in wire bonding part of first embodiment of the invention.Fig. 3 A to 3C is the explanatory of application according to the semiconductor device of the manufacture method of the semiconductor device of first embodiment of the invention.
At first, will semiconductor device 28 shown in Figure 1 be described.Those element identical with the semiconductor device shown in Fig. 7 A to 7J are represented by identical reference marker, will omit its detailed description.
As shown in Figure 1, has the semiconductor element 18 of the heart therein and at its peripheral conductor terminal 29 according to the semiconductor device 28 of first embodiment of the invention, the lower face side (anti-face side) that the upper surface side of this conductor terminal 29 (front surface side) forms lead-in wire bonding part 17 and this conductor terminal 29 forms the outside end 22 that connects, lead-in wire bonding part 17 and the outside arranged in form of end 22 with area array that be connected.The lead-in wire bonding part 17 and the electrode pad part 30 of semiconductor element 18 are electrically connected by bonding wire 20, and the upper strata of semiconductor element 18, bonding wire 20 and conductor terminal 29 encapsulated resins 21 and resin-encapsulate.
Fig. 1 shows the details of conductor terminal 29.Gold plate 33 with 0.15 to 0.5 μ m thickness at first is set on the upper and lower side of shaft-like copper conductor 32, this gold plate 33 be demonstrate the etching liquid repellence an example of precious metal electroplating layer, described shaft-like copper conductor 32 forms by making lead frame material 10 (referring to Fig. 7 A) stand etching.Priming coat 34 with about 0.5 to 2 μ m thickness is set thereon, and the gold plate 35 with 0.15 to 0.5 μ m thickness further is set thereon, this gold plate 35 is examples of precious metal electroplating layer.In this embodiment, Ni coating is set to priming coat 34.The thickness that should be noted that lead frame material 10 is about 0.1 to 0.3 μ m, but the present invention is not limited to these thickness.
According to its structure, element mounting portion 16 is provided with the coating with conductor terminal 29 same structures.The Lower Half of element mounting portion 16 and conductor terminal 29 protrude and are exposed to the outside from encapsulating resin 21.On the bottom of each connection end 22, outside, the electrodeposited coating with excellent wettability is set, and the fusion of passing through the emulsion scolder of setting on another substrate 36, be electrically connected with another substrate 36 foundation, as shown in Figure 1.
Next, will describe the method for making this semiconductor device 28, still only describe the different part of manufacture method in detail with the conventional semiconductor device 23 shown in Fig. 7 A to 7J.In Fig. 7 A to 7J, the step of Fig. 7 A to 7C is identical.In the step of Fig. 7 D, under the situation of carrying out whole body (all-over) plating, at first carry out the gold plate 33 with 0.15 to 0.5 μ m thickness, this gold plate 33 is examples of precious metal electroplating layer, and the priming coat 34 with about 0.5 to 2 μ m thickness is set thereon.Then, the gold plate 35 with 0.15 to 0.5 μ m thickness is set further thereon, this gold plate 35 is examples of precious metal electroplating layer.
Next, shown in Fig. 7 E, cover the whole lower face side of lead frame material 10 with resist film 15, and carry out etching partially of face side, shown in Fig. 7 F.In the case, liquid does not corrode because gold plate 33 and 35 is etched, and therefore forms lead-in wire bonding part 17, as shown in Figure 2.That is, the lead frame material 10 on the downside is etched to reservation shape, and lead frame material 10 is corroded until the bottom of the periphery of the plating mask 38 that is made of gold plate 35, priming coat 34 and gold plate 33.Thus, electroplate the periphery protrusion of mask 38 from the copper product of formation lead-in wire bonding part 17, but because its thickness has gold plate 33 and 35 and the thickness of priming coat 34, electroplate mask 38 and be difficult to bending, and in the resin-encapsulate process, do not have to constitute by this and remove or leave the plating burr that form.Thus, the disqualification rate of semiconductor device 28 descends considerablely.
Should be noted that the resist film that uses in the step as Fig. 7 E, preferably have resist film, and be convenient to the strip operation after the etching thus at the carrying material of its place's bonding.
Then, shown in Fig. 7 G, the resist film 15 on the lower face side is removed.Install on element mounting portion 16 after the semiconductor element 18, the electrical connection between semiconductor element 18 and the lead-in wire bonding part 17 is subjected to the influence of bonding wire 20, and the upper end of lead frame material 10 is by resin-encapsulate (Fig. 7 H).
Then, shown in Fig. 7 I, carry out the etching partially of anti-face side of lead frame material 10.In the case, because outside anti-face side and the element mounting portion 16 that connects end 22 covered by the plating mask 39 that is made of gold plate 35, priming coat 34 and gold plate 33, the plating mask 39 that is formed with the big thickness generally corrosion that is not etched.In addition, have fixing thickness (preferred, 1 to 10 μ m, more preferably 1.5 to 4 μ m), do not form and electroplate burr owing to electroplate mask 39.
Next, shown in Fig. 7 J, each semiconductor device 28 is cut and separates, to obtain single semiconductor device.
Next, with reference to figure 3A to 3C, will the semiconductor device of using according to the manufacture method of the semiconductor device of inventing 40,42 and 45 be described.
Fig. 3 A shows the semiconductor device 40 that has wherein omitted element mounting portion (die pad (die pad)), around semiconductor element 18 periphery gaps (clearance) is set, and with the arranged in form conductor terminal 29 of grid array.The upside of these conductor terminals 29 forms lead-in wire bonding part 17, and its downside forms the outside end 22 that connects.Be connected in lead-in wire bonding part 17 and outside on the surface of end 22 and form the plating mask 38 and 39 that each is made of gold plate 35, priming coat 34 and gold plate 33 respectively.
Because the surface area of each of these plating masks 38 and 39 is greater than the area of section of copper conductor 32, being electrically connected efficient increases.Should be noted that the mask 38 shown in Fig. 3 A to 3C outwards expands, shown in the zoomed-in view among Fig. 1.
Next, Fig. 3 B shows a kind of semiconductor device, and wherein the element mounting portion is omitted, and instead, a plurality of conductor terminals 29 (terminal that is used for heat dissipation) is set directly below semiconductor element 18.Directly be arranged in semiconductor element 18 following conductor terminals 29 and do not form conducting channel, but assist heat dissipation from semiconductor element 18.
On the upper and lower surface of conductor terminal 29, form the plating mask 38 and 39 that each is made of gold plate 35, priming coat 34 and gold plate 33 respectively, the generation that prevents to electroplate burr thus.
In the case, on the upper and lower surface of conductor terminal 29, form the plating mask 38 and 39 that each is made of gold plate 35, priming coat 34 and gold plate 33 respectively, the generation that prevents to electroplate burr thus.
In the above-described embodiments, each of electroplating mask 38 and 39 forms and makes the precious metal electroplating layer be set to the bottom and the superiors, is set to mid portion as the Ni coating of priming coat; But the precious metal electroplating layer in the bottom can be omitted, and priming coat can be the base metal electrodeposited coating with big thickness.In the case, arbitrarily metal can be used as the base metal electrodeposited coating, and liquid does not corrode as long as this metal is not etched, but preferably use as demonstrate the etching liquid repellence tin coating, tin bismuth coating, kupper solder coating or lead-free solder coating.Liquid corrodes because these metals can not be etched, and lip-deep thin precious metal electroplating layer does not form burr.Should be noted that if compare its corrosion (for example, etch rate is 1/10 or following) that is difficult to be etched with Ni coating, so this base metal electrodeposited coating is enough, even and it is corroded to a certain extent, this corrosion can compensate (for example, 4 to 8 μ m) by increasing its thickness.
Next, Fig. 4 is by the explanatory according to the semiconductor device of the manufacture method manufacturing of the semiconductor device of second embodiment of the invention.Fig. 5 is the cutaway view of explanation according to the details of the lead-in wire bonding part of second embodiment of the invention.Fig. 6 A to 6C is the explanatory of application according to the semiconductor device of the manufacture method of the semiconductor device of second embodiment of the invention.
At first, will describe shown in Figure 4 and by semiconductor device 28 according to the manufacture method manufacturing of the semiconductor device of second embodiment of the invention.Those composed components identical with the manufacture method of semiconductor device shown in Figure 1 are represented that by same reference numbers its detailed description will be omitted.
As shown in Figure 4, by according to the semiconductor device 28 of the manufacture method manufacturing of the semiconductor device of second embodiment of the invention therein the heart have semiconductor element 18 and have conductor terminal 29 at its periphery, the upper surface side of this conductor terminal 29 (front surface side) forms lead-in wire bonding part 17, promptly, an inner example that connects the end, and the lower face side of this conductor terminal 29 (anti-face side) forms the outside end 22 that connects, lead-in wire bonding part 17 and the outside arranged in form of end 22 with area array that be connected.The lead-in wire bonding part 17 and the electrode pad part 30 of semiconductor element 18 are electrically connected by bonding wire 20, and the first half of semiconductor element 18, bonding wire 20 and 21 resin-encapsulates of conductor terminal 29 encapsulated resins.
Figure 4 illustrates the details of conductor terminal 29.At first, by making lead frame material 10 stand on the upper and lower side of the shaft-like copper conductor 32 (referring to Fig. 4) that etching forms the priming coat 34 with about 0.5 to 2 μ m thickness to be set, and the gold plate 35 with 0.15 to 0.5 μ m thickness further is set thereon, this gold plate 35 is examples of precious metal electroplating layer.In this embodiment, Ni coating is set to priming coat 34.The thickness that should be noted that lead frame material 10 is about 0.1 to 0.3 μ m, but the present invention is not limited to these thickness.The thickness of this gold plate 35 is not limited, as long as it has and makes the substrate thickness that liquid corroded that is not etched; But too thick if gold plate 35 becomes, manufacturing cost is increased sharply unfriendly so.Form conductor terminal 29 (and will below with the element mounting portion of describing 16) by etching, and because its peripheral burr 26 have been removed, the above-mentioned priming coat 34 that forms on the upper and lower side of copper conductor 32 and the width of gold plate 35 width with the section of copper conductor 32 basically are identical.
According to its structure, element mounting portion 16 is provided with the coating with conductor terminal 29 same structures.The Lower Half of element mounting portion 16 and conductor terminal 29 protrude and are exposed to the outside from encapsulating resin 21.On the bottom of each connection end 22, outside, the electrodeposited coating with excellent wettability is set, and the fusion of passing through the emulsion scolder of setting on another substrate 36, be electrically connected with another substrate 36 foundation, as shown in Figure 4.
Next, will describe the method for making this semiconductor device 28, still only describe the different part of manufacture method in detail with the conventional semiconductor device 23 shown in Fig. 7 A to 7J.In Fig. 7 A to 7J, the step of Fig. 7 A to 7C is identical.In the step of Fig. 7 D, under the situation of carrying out the whole body plating, the priming coat 34 with about 0.5 to 2 μ m thickness at first is set, as shown in Figure 5.Then, the gold plate 35 with 0.15 to 0.5 μ m thickness is set further thereon, this gold plate 35 is examples of precious metal electroplating layer.
Next, shown in Fig. 7 E, cover the whole lower face side of lead frame material 10 with resist film 15, and carry out etching partially of face side, shown in Fig. 7 F.In the case, liquid corrodes although part lead frame material 10 and part priming coat 34 are etched, and therefore the corrosion because gold plate 35 is not etched forms lead-in wire bonding part 17, as shown in Figure 5.That is, lead frame material 10 is etched to reservation shape, and with the first half of formation copper conductor 32, and part priming coat 34 is also corroded simultaneously.Then, remaining at gold plate 35 quilts of topmost portion, and directly form plating burr 26 around the periphery on copper conductor 32.Be left by former state ground if electroplate burr 26, cause the product defects of semiconductor device, as describing before.
Thus, etch partially the step that step (F) provides the unhairing limit afterwards and cleans this coating at this.The ultrasonic wave of unhairing limit by for example applying at Qi Chu of this coating is applied to burr 26 with cleaning fluid and realizes.In addition, the unhairing limit of coating can also be by grinding with brush etc. or by the water injection etc., by realizing on the mechanical epilation limit, and maybe can the chemical treatment of chloroazotic acid realizes by for example utilizing.Because electroplate burr from upside and downside fusing, and the part that needs (for example, lead-in wire bonding part) only melts separately from a side, therefore electroplating burr can be removed.Subsequently, remove the plating burr of being removed by cleaning fully from this product.Should be noted that etching partially step (F) and (I) afterwards, flushing is carried out naturally, removing etching liquid, and realizes in the time that is different from the unhairing limit and cleans these steps of this coating.
Should be noted that the resist film that uses as in etching partially step (F), preferably have resist, be convenient to etching strip operation afterwards thus at the carrying material of its place's bonding.
After removing plating burr 26, the resist film 15 on the lower face side is removed.Install on element mounting portion 16 after the semiconductor element 18, the electrical connection between semiconductor element 18 and the lead-in wire bonding part 17 is realized that by bonding wire 20 upper end of lead frame material 10 is by resin-encapsulate (Fig. 7 H).Then, shown in Figure 71, carry out the etching partially of anti-face side of lead frame material 10.In the case, because outside anti-face side and the element mounting portion 16 that connects end 22 is provided with priming coat 34 and gold plate 35, produced plating burr 26, therefore carried out the above-mentioned steps of unhairing limit and this coating of cleaning, to remove all formed plating burr 26.
Next, shown in Fig. 7 J, each semiconductor device 28 is cut and is separated, to obtain single semiconductor device.
Next, with reference to figure 6A to 6C, will the semiconductor device of using according to the manufacture method of the semiconductor device of inventing second embodiment 40,42 and 45 be described.Should be noted that in the manufacture method that is described below that the above-mentioned steps that the unhairing limit is provided and cleans this coating is handled the plating burr 26 that form so that remove by etching partially after each etches partially processing.
Fig. 6 A shows the semiconductor device 40 that has wherein omitted element mounting portion (die pad), around semiconductor element 18 periphery gaps is set, and with the arranged in form conductor terminal 29 of grid array.The upside of these conductor terminals 29 forms lead-in wire bonding part 17, and its downside forms the outside end 22 that connects.Surface in lead-in wire bonding part 17 forms priming coat 34 and gold plate 35 (referring to Fig. 1) respectively with outside the connection on the end 22.Electroplate burr 26 although around the periphery of gold plate 35, form, in the step of unhairing limit and this coating of cleaning, remove this plating burr 26.
Should be noted that in the bottom of semiconductor element 18 also can provide pipe core welding disc 18a, as by shown in the double dot dash line among Fig. 6 A.This pipe core welding disc 18a can be etched partially, and as describing before, maybe can be adhered to the bottom of semiconductor element 18.
Next, Fig. 6 B shows the semiconductor device that element mounting portion wherein is omitted, and instead, with the form of grid array a plurality of conductor terminals 29 is set directly below semiconductor element 18.Directly be arranged in semiconductor element 18 following conductor terminals 29 and do not form conducting channel, but assist heat dissipation (terminal that is used for heat dissipation) from semiconductor element 18.Should be noted that the periphery at semiconductor element 18 forms lead-in wire bonding part 17 respectively on the upper surface of the conductor terminal 29 that is provided with, and on its lower surface, form the outside end 22 that connects.
Each plating mask 13 and 14 that is made of priming coat 34 and gold plate 35 is set at respectively on the upper and lower surface of each conductor terminal 29, and formed plating burr are removed in etching partially processing.
In the case, priming coat 34 and gold plate 35 are set also on the upper and lower surface of each conductor terminal 29, and formed plating burr are removed in etching partially processing.
Although gold plate is used as an example of precious metal electroplating layer, also can use other metals (for example, Ag, Pd, Pt etc.) in the present invention, liquid does not corrode or is difficult to and is corroded as long as this metal is not etched usually, and is difficult to stand surface oxidation.
Claims (15)
1. method of making semiconductor device may further comprise the steps:
At the front surface side of lead frame material or the predetermined portions on the anti-face side, formation has the plating mask of precious metal electroplating layer as the superiors,
Setting demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer as the bottom of electroplating mask,
By using this plating mask as Etching mask, this lead frame material of etching continuously, and
Form with outside at the semiconductor element electric connection of the internal placement of encapsulating resin and be connected the end, protrude downwards this connection end, outside.
2. method of making semiconductor device comprises:
On the lead-in wire bonding part that forms around the periphery of the part of the semiconductor element on the front surface side of lead frame material, with dividing the outside that forms on the anti-face side of consistent lead frame material to be connected on the end with this lead-in wire bonding part, form and to have the first step of precious metal plating as the plating mask of the superiors;
On the anti-face side of lead frame material, form after the resist film, by using the plating mask that on the front surface side, forms as Etching mask, from the front surface side, on this lead frame material, carry out the etching processing of desired depth, so that make second step that the lead-in wire bonding partly protrudes;
On this lead frame material, install after the semiconductor element, connect the electrode pad part of semiconductor element and correspond respectively to this lead-in wire bonding part, form the third step of conducting channel thus by bonding wire;
Seal the 4th step of the front surface side of the lead frame material that comprises semiconductor element, bonding wire and lead-in wire bonding part; And
By using resist film that formed plating mask removes as Etching mask, on the anti-face side of lead frame material, carry out etching processing, so that make outside the 5th step that the end is protruded and independently made that connects,
Wherein, demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer be set to the bottom of this plating mask.
3. according to the manufacture method of the semiconductor device of claim 2, wherein the resist film that forms on the anti-face side of this lead frame material has the carrying material in its place's bonding, and after etching by peeling off the resist film of removing.
4. according to the manufacture method of the semiconductor device of claim 1 or 2, wherein be formed centrally the element mounting portion in this lead frame material, be connected the end with the outside irrelevant.
5. according to the manufacture method of the semiconductor device of claim 1 or 2, wherein below semiconductor element, directly be provided for the terminal of heat dissipation.
6. method of making semiconductor device comprises:
Form the first step of the plating mask that its topmost portion is made of the precious metal electroplating layer, the position of the electrode pad part of arranging on the bottom of the semiconductor element of installing on corresponding to the front surface side at this lead frame material forms described plating mask on the obverse and reverse of this lead frame material;
On the anti-face side of this lead frame material, form after the resist film, by using the plating mask that on this front surface side, forms as Etching mask, from the front surface side, on lead frame material, carry out the etching processing of desired depth, so that make that being used to be electrically connected to electrode pad inside partly connects second step that protrude the end;
Inside on the semiconductor element of installing on semiconductor element and lead frame material connects to be set up between the end after the conduction, and resin-encapsulate comprises the third step of front surface side of the lead frame material of this semiconductor element; And
By using resist film that formed plating mask removes as Etching mask, on the anti-face side of lead frame material, carry out etching processing, so that make the outside end that connects be connected the integrated and connection in end, thereby the 4th step of protruding and independently being made with inner
Wherein, demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer be set to electroplate the bottom of mask.
7. according to the manufacture method of the semiconductor device of claim 6, wherein the resist film that forms on the anti-face side of this lead frame material is the carrying material that has in its place's bonding, and after etching by peeling off the resist film that is removed.
8. one kind by the semiconductor device according to the manufacture method manufacturing of claim 1, any one semiconductor device of 2 and 6.
9. one kind has the outside semiconductor device that connects the end, and this outside connects the end and is electrically connected to the semiconductor element of sealing and protrudes into anti-face side, and described semiconductor device comprises:
Be electrically connected to the connection end of the electrode pad part of semiconductor element,
Wherein, this connection end is connected the end with the outside and has their the superiors and the bottom, each is made of the described the superiors the precious metal electroplating layer, and the described bottom each by demonstrate the etching liquid repellence base metal electrodeposited coating or precious metal electroplating layer constitute.
10. method of making semiconductor device comprises:
Formation has the first step of precious metal electroplating layer as the plating mask of the superiors on connection end, inside, and the described inner end that connects is electrically connected in the electrode pad part of the semiconductor element of installing on the front surface side of lead frame material and the connection end, outside that forms on the anti-face side of the lead frame material consistent with this connection end, inside;
On the anti-face side of this lead frame material, form after the resist film, by using the plating mask that on the front surface side, forms as Etching mask, from the front surface side, on lead frame material, carry out the etching processing of desired depth, so that make this inside connect second step that protrude the end;
Install on this lead frame material after the semiconductor element, the electrode pad part that is electrically connected semiconductor element is connected the third step of end with the inside that corresponds respectively to this;
Seal the 4th step that comprises the semiconductor element and the front surface side of the inner lead frame material that is connected the end; And
By using resist film that formed plating mask removes as Etching mask, on the anti-face side of lead frame material, carry out etching processing, so that make this outside connect that end is protruded and separately, and have outside connection end on outside being formed in and on the inboard, have inner the 5th step that connects the independent conductor terminal of end
Wherein, after the etching processing in second step and the 5th step, the step that the unhairing limit is provided and cleans this electrodeposited coating is used to remove and connects the plating burr that end and outside each the periphery that is connected the end are produced in inside on every side.
11. according to the manufacture method of the semiconductor device of claim 10, wherein the resist film that on the anti-face side of this lead frame material, forms be have the carrying material of its place's bonding and after etching by peeling off the resist film that is removed.
12. according to the manufacture method of the semiconductor device of claim 10, wherein the inside of this conductor terminal connects the end and partly is made of the lead-in wire bonding, and arranges to have gap positioned opposite to each other around semiconductor element.
13. manufacture method according to the semiconductor device of claim 11, wherein at the center of the lead frame material that separates with the conductor terminal, be formed for installing the element mounting portion of semiconductor element, in first step, on the front surface of element mounting portion and anti-surface, also form and electroplate mask, and after the etching processing in second step and the 5th step, in the step of unhairing limit and cleaning electrodeposited coating, remove the plating burr that produced.
14. manufacture method according to the semiconductor device of claim 11, wherein at the center of the lead frame material that separates with the conductor terminal, be formed for installing the terminal that is used for heat dissipation of semiconductor element thereon with the grid array form, in first step, on the front surface of the terminal that is used for heat dissipation and anti-surface, also form and electroplate mask, and after the etching processing in second step and the 5th step, in the step of unhairing limit and cleaning electrodeposited coating, remove the plating burr that produced.
15. according to the manufacture method of the semiconductor device of claim 10, wherein this semiconductor device is made of the flip-chip semiconductor device, and the inside of this conductor terminal connects the end be connected to the electrode pad part of arranging on the bottom of semiconductor element.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005232428A JP2007048978A (en) | 2005-08-10 | 2005-08-10 | Semiconductor device and method for manufacturing same |
| JP232452/2005 | 2005-08-10 | ||
| JP232428/2005 | 2005-08-10 | ||
| JP2005232452A JP4032063B2 (en) | 2005-08-10 | 2005-08-10 | Manufacturing method of semiconductor device |
| PCT/JP2006/315747 WO2007018237A1 (en) | 2005-08-10 | 2006-08-09 | Semiconductor device and method for manufacturing same |
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| CN101218670A true CN101218670A (en) | 2008-07-09 |
| CN101218670B CN101218670B (en) | 2011-08-10 |
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| CN (1) | CN101218670B (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| JP2007048981A (en) | 2007-02-22 |
| CN101218670B (en) | 2011-08-10 |
| JP4032063B2 (en) | 2008-01-16 |
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Effective date of registration: 20181009 Address after: Taiwan City, Kaohsiung China processing zone after three road No. 26 Patentee after: Riyueguang Semiconductor Manufacturing Co., Ltd. Address before: Fukuoka Patentee before: Mitsui High-Tech. Inc. |