CN101211872A - Radiation-type semiconductor package member and its used radiation structure - Google Patents
Radiation-type semiconductor package member and its used radiation structure Download PDFInfo
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- CN101211872A CN101211872A CNA2006101699875A CN200610169987A CN101211872A CN 101211872 A CN101211872 A CN 101211872A CN A2006101699875 A CNA2006101699875 A CN A2006101699875A CN 200610169987 A CN200610169987 A CN 200610169987A CN 101211872 A CN101211872 A CN 101211872A
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- heat
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
The invention discloses a heat-dissipation semiconductor package part and a heat dissipation structure thereof. The package part comprises a chip load bearing part, a flip-chip semiconductor chip which is arranged and electrically connected with the chip load bearing part, and a fin which is contacted with the flip-chip semiconductor chip to separate a heat conduction dielectric material like soldering-tin material; wherein, a groove is formed on the surface around the contacting area of the heat conduction dielectric material corresponding with the fin; a barrier layer like oxide metal layer is formed on surface of the groove so as to decrease wet capacity of the heat conduction dielectric material and then to allow that when the heat conduction dielectric material is heated and melted, the groove is not wetted to ensure that the heat conduction dielectric material is thick enough to generate gold combination with the fin and the flip-chip semiconductor chip.
Description
Technical field
The present invention relates to a kind of semiconductor package part, relate in particular to a kind of radiating semiconductor packer and applied radiator structure thereof.
Background technology
Chip upside-down mounting type ball grid array (Flip Chip Ball Grid Array, FCBGA) semiconductor package part is a kind of encapsulating structure with flip-chip and ball grid array, so that the active surface of at least one semiconductor chip can be electrically connected on the surface of substrate by a plurality of conductive projections, and on another surface of this substrate, plant a plurality of soldered balls as I/O (I/O) end; This encapsulating structure can significantly reduce volume, deducts the design of existing bonding wire (wire) simultaneously, promotes electrically and can reduce impedance, fails in transmission course to avoid signal, has therefore really become the main flow encapsulation technology of next generation chip and electronic component.
Because the advantageous characteristic of this chip upside-down mounting type BGA Package, make in its electronic component that applies to high integration (integration) more, with volume and the computing demand that meets this type electronic component, but this type of electronic component is also because its high-frequency computation performance, make it also will be, so whether its radiating effect well promptly become the important key that such encapsulation technology influences quality yield than general packaging part height in heat energy that operation produced.
For existing chip upside-down mounting type ball grid array (BGA) semiconductor package, be directly will be adhered to the non-active surface of this chip in order to the fin that dispels the heat, and do not need packing colloid (Encapsulant) to transmit heat by poor thermal conductivity, use that to reach one be good heat radiation function than other packaging parts.
Generally provide fin then on the non-active surface of flip-chip type semiconductor chip employed then material be to be substrate (epoxy-base) with epoxy resin, its coefficient of heat conduction is about 2～4w/m ° of K, (coefficient of heat conduction of copper is 400w/m ° of K) obviously can't effectively transmit heat for the fin that the hundreds of w/m ° of K coefficients of heat conduction are arranged; Therefore, along with electronic product also or the raising of semiconductor package part radiating requirements, certainly will make the heat conduction of the bigger coefficient of heat conduction of apparatus follow material, with the binding that fin and flip-chip type semiconductor chip are provided and the transmission of heat.
In view of this, U.S. Pat 6,504,242, US6,380,621, US6,504,723 use with tin metal be scolding tin (solder) material of substrate (Sn-base) heat-conduction medium material (the Thermal Interface material as fin and the adhesion of flip-chip type semiconductor chip chamber then, TIM), because this soldering tin material is a metal ingredient, its coefficient of heat conduction is about 50w/m ° of K, if pure tin, its coefficient of heat conduction more can reach 86w/m ° of K, follow material than traditional epoxide resin type, its capacity of heat transmission is much higher, and more can meet the demand of high heat radiation.
Consult Fig. 1, but in the heat-conduction medium material (TIM) that this kind is made of soldering tin material 15, because of moistening (wetting) ability of itself and fin 13 (being generally copper material) excellent, in case carry out heat fusing in conjunction with the time, soldering tin material 15 can very fast the diffusion on fin 13 come, make 12 of fin 13 and flip-chip type semiconductor chips fail to be formed with enough thickness and form common gold (entatic) structure, simultaneously, also cause the soldering tin material 15 and the binding area of flip-chip type semiconductor chip 12 to dwindle, even breakage problem takes place and influence heat dissipation and production reliability.
Consult Fig. 2, be U.S. Pat 6,380, the 621 flip-chip type semiconductor packaging part generalized sections that disclosed, its surface in the non-active surface of flip-chip type semiconductor chip 22 and fin 23 is pre-formed the metal level 24 as nickel (Ni) or gold (Au), for using as the heat-conduction medium material of soldering tin material 25 carries out heat fusing when following, soldering tin material 25 can form common golden structure with this metal level 24, to limit its humidification zones.
Yet this kind mode is owing to must form on fin surface and the non-active surface of flip-chip type semiconductor chip as nickel or golden metal level in advance, and not only complicate fabrication process and cost are also high.
Other consults Fig. 3 A and 3B, be U.S. Pat 6,504, the 723 flip-chip type semiconductor packaging part generalized sections that disclosed, it provides a radiator structure 33 that is formed with the protuberance 331 of downward convergent and is formed with the extension 332 of downward extension in the marginal portion in core, the protuberance 331 of this core is made of a bottom surface and inclined plane all around, and be coated with scaling powder 36 in advance in these protuberance 331 surfaces, so that being pressure bonded to by a grafting material (bonding material) 37, this radiator structure 33 connects on the substrate 31 that is equipped with flip-chip type semiconductor chip 32, and the protuberance 331 that makes this radiator structure 33 is pressure bonded to the soldering tin material 35 that defaults on these flip-chip type semiconductor chip 32 non-active surfaces, and carry out heat fusing, and it is make this soldering tin material 35 be distributed in the gap of 32 of the protuberance 331 of this radiator structure 33 and this flip-chip type semiconductor chips, and ccontaining and limit this soldering tin material 35 and flow by the inclined plane of this protuberance 331.
But this kind radiator structure too complexity and manufacture process cost is also high, is not inconsistent practical application and economic consideration.
Therefore, how to provide a kind of easy means cheaply can limit the humidification zones of scolding tin heat-conduction medium material (TIM) between fin and semiconductor chip to prevent its improper overflow, needn't use simultaneously complicated radiator structure and pre-metal cladding on fin and semiconductor chip, to save manufacture process time and cost, real problem for needing to be resolved hurrily at present.
Summary of the invention
The shortcoming of prior art in view of the above, main purpose of the present invention is to provide a kind of radiating semiconductor packer and applied radiator structure thereof, can limit the humidification zones of scolding tin heat-conduction medium material (TIM) between fin and semiconductor chip.
Another purpose of the present invention is to provide a kind of radiating semiconductor packer and applied radiator structure thereof, can guarantee heat-conduction medium material tool adequate thickness and can produce golden combination the altogether with fin and semiconductor chip.
A further object of the present invention is to provide a kind of radiating semiconductor packer and applied radiator structure thereof, needn't use complicated radiator structure and pre-metal cladding on fin and semiconductor chip, to save manufacture process time and cost.
For reaching above-mentioned and other purpose, radiating semiconductor packer of the present invention comprises: chip bearing member; The flip-chip type semiconductor chip connects and puts and be electrically connected to this chip bearing member; Fin, a heat-conduction medium material (TIM) and then on this flip-chip type semiconductor chip at interval, wherein circumferential surface relative and that the heat-conduction medium material is then regional is formed with groove on this fin, and this groove surfaces is formed with and the not good barrier layer of heat-conduction medium material wettability effect, to limit the humidification zones of this heat-conduction medium material.This fin is constituted by for example copper material, this heat-conduction medium material for example is a soldering tin material, this groove can burn formation by laser, thereby make the barrier layer of this groove surfaces formation as metal oxide layer (for example being cupric oxide), use the wetting power that reduces this scolding tin heat-conduction medium material, and then make scolding tin heat-conduction medium material when heating and melting, unlikely moistening to groove, enough can produce golden combination the altogether to guarantee scolding tin heat-conduction medium material thickness with fin and the non-active surface of flip-chip type semiconductor chip.
The present invention also discloses a kind of radiator structure, comprising: fin, and this fin is preset with interval one heat-conduction medium material and follows then distinguishing on semiconductor chip; Groove is formed on this fin corresponding to this then around the district; And barrier layer, be formed at this groove surfaces, and this barrier layer and this heat-conduction medium material wettability effect are not good.This heat-conduction medium material is a soldering tin material for example, and the barrier layer of this groove surfaces is to utilize laser to burn the metal oxide layer of this groove surfaces that fin results from of metal material.
Therefore, radiating semiconductor packer of the present invention and applied radiator structure thereof, main promptly on fin in order to form groove around the zone of following with the flip-chip type semiconductor chip, and in the barrier layer of this groove surfaces formation as metal oxide layer, thereby this fin interval one scolding tin heat-conduction medium material is then put the brilliant non-active surface of flip-chip type semiconductor chip to finishing, make scolding tin heat-conduction medium material when heating and melting, because of be formed with the groove of metal oxide layer in the heat sink surface, and reduce the wetting power of this scolding tin heat-conduction medium material, do not cause it moistening to groove, to guarantee that the heat-conduction medium material thickness enough can produce golden combination the altogether with fin and the non-active surface of flip-chip type semiconductor chip, guarantee that heat sink and this flip-chip type semiconductor chip effectively follow, need not use simultaneously existing complicated radiator structure and pre-metal cladding on fin and semiconductor chip, to save manufacture process time and cost.
Description of drawings
Fig. 1 by show existing fin at interval scolding tin heat-conduction medium material follow on the flip-chip type semiconductor chip the moistening schematic diagram that extends out of generation;
Fig. 2 is a U.S. Pat 6,380, the 621 flip-chip type semiconductor packaging part generalized sections that disclosed;
Fig. 3 A and 3B are U.S. Pat 6,504, the 723 flip-chip type semiconductor packaging part generalized sections that disclosed;
Fig. 4 is the generalized section of radiating semiconductor packer of the present invention;
Fig. 5 is the floor map of radiator structure of the present invention; And
Fig. 6 A and 6B are the generalized section of the different embodiment of radiating semiconductor packer of the present invention.
The main element symbol description
12 flip-chip type semiconductor chips
13 fin
15 soldering tin materials
22 flip-chip type semiconductor chips
23 fin
24 metal levels
25 soldering tin materials
31 substrates
32 flip-chip type semiconductor chips
33 radiator structures
331 protuberances
332 extensions
35 soldering tin materials
36 scaling powders
37 grafting materials
41 chip bearing members
42 flip-chip type semiconductor chips
43 fin
430 then distinguish
431 grooves
432 barrier layers
45 heat-conduction medium materials
46 conductive projections
Embodiment
Below by particular specific embodiment explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the content that this specification disclosed.
Consult Fig. 4, be the schematic diagram of radiating semiconductor packer of the present invention.
As shown in the figure, this radiating semiconductor packer includes: chip bearing member 41; Flip-chip type semiconductor chip 42 connects and puts and be electrically connected to this chip bearing member 41; Fin 43, a heat-conduction medium material (TIM) 45 and then on this flip-chip type semiconductor chip 42 at interval, wherein circumferential surface relative and that heat-conduction medium material 45 is then regional is formed with groove 431 on this fin 43, and these groove 431 surfaces are formed with barrier layer 432, to limit the humidification zones of this heat-conduction medium material 45.
This chip bearing member 41 for example is spherical grid array type (BGA) substrate, it has opposite first and second surface, for its active surface of flip-chip type semiconductor chip 42 mats and a plurality of conductive projections 46 and connect and put and be electrically connected to this substrate first surface at interval, and on this substrate second surface, can plant a plurality of soldered balls, be electrically connected to external device (ED) for this flip-chip type semiconductor chip 42.Certainly, this chip bearing member also can be lead frame.
Cooperate in addition and consult Fig. 5, for showing the floor map of this heat sink 43, this heat sink 43 is planned in its surface in advance for follow mutually then distinguish 430 with flip-chip type semiconductor chip 42 spaced heat transmitting medium materials, wherein this then distinguishes the area that 430 area slightly equals this semiconductor chip 42, but also can less than or greater than the area of this semiconductor chip 42, shown in Fig. 6 A and 6B; Around then distinguishing 430, this is provided with groove 431 simultaneously.
This fin 43 is a metal material, and for example copper constitutes, and this groove 431 can burn formation by laser, uses at the barrier layer 432 of this groove 431 surface one-tenth just like metal oxide layer (cupric oxide).
This fin 43 one is for example followed non-active surface in this flip-chip type semiconductor chip 42 for the heat-conduction medium material 45 of scolding tin at interval, wherein this scolding tin heat-conduction medium material 45 is when heating and melting, because of be formed with groove 431 in heat sink 43 surfaces as the barrier layer 432 of metal oxide layer, and can reduce the wetting power of this soldering tin material, do not cause it moistening to groove 431, guaranteeing that the enough thickness of scolding tin heat-conduction medium material tool and fin 43 and flip-chip type semiconductor chip 42 produce golden combination the altogether, and then guarantee that heat sink 43 and this flip-chip type semiconductor chip 42 effectively follow.
The present invention also discloses a kind of radiator structure, comprising: fin 43, and this fin 43 is preset with a heat-conduction medium material at interval and then then distinguishes 430 on semiconductor chip; Groove 431 is formed at and then distinguishes around 430 corresponding to this on this fin 43; And barrier layer 432, be formed at this groove 431 surfaces, and this barrier layer 432 is not good with this heat-conduction medium material wettability effect.This heat-conduction medium material is a soldering tin material for example, and the barrier layer 432 on these groove 431 surfaces is for to utilize laser to burn the metal oxide layer on fin 43 these groove 431 surfaces that result from of metal material.This then distinguish 430 area can select roughly to equal, less than or greater than the area of semiconductor chip.
Therefore, radiating semiconductor packer of the present invention and applied radiator structure thereof, main promptly on fin in order to form groove around the zone of following with the flip-chip type semiconductor chip, and in this groove surfaces formation metal oxide layer, thereby this fin interval one scolding tin heat-conduction medium material is then connect the non-active surface of flip-chip type semiconductor chip of putting chip to finishing, make scolding tin heat-conduction medium material when heating and melting, because of be formed with the groove of metal oxide layer in the heat sink surface, and reduce the wetting power of this scolding tin heat-conduction medium material, do not cause it moistening to groove, to guarantee that scolding tin heat-conduction medium material thickness enough can produce golden combination the altogether with fin and the non-active surface of flip-chip type semiconductor chip, guarantee that heat sink and this flip-chip type semiconductor chip effectively follow, need not use simultaneously existing complicated radiator structure and pre-metal cladding on fin and semiconductor chip, to save manufacture process time and cost.
The foregoing description is illustrative principle of the present invention and effect thereof only, but not is used to limit the present invention.What especially should be specifically noted that is the employing of the electric connection mode of the selection of this chip bearing member and chip and chip bearing member, and any those skilled in the art all can be under spirit of the present invention and scope, and the foregoing description is modified and changed.Therefore, the scope of the present invention should be listed as the claim of enclosing.
Claims (13)
1. radiating semiconductor packer comprises:
Chip bearing member;
Semiconductor chip connects and puts and be electrically connected to this chip bearing member; And
Fin, a heat-conduction medium material and then on this semiconductor chip at interval, wherein circumferential surface relative and that the heat-conduction medium material is then regional is formed with groove on this fin, and this groove surfaces is formed with and the not good barrier layer of heat-conduction medium material wettability effect, to limit the humidification zones of this heat-conduction medium material.
2. radiating semiconductor packer according to claim 1, wherein, this chip bearing member is one of them of spherical grid array type substrate and lead frame.
3. radiating semiconductor packer according to claim 1, wherein, this semiconductor chip has relative active surface and non-active surface, with with its active surface a plurality of conductive projections and connect and put and be electrically connected to this chip bearing member at interval, and make this heat sink spaced heat transmitting medium material and then in the non-active surface of this semiconductor chip.
4. radiating semiconductor packer according to claim 1, wherein, this fin material is a metallic copper, and this heat-conduction medium material is a soldering tin material, and this barrier layer is a cupric oxide.
5. radiating semiconductor packer according to claim 1, wherein, this groove burns formation with laser.
6. radiating semiconductor packer according to claim 1, wherein, this barrier layer is a metal oxide layer.
7. radiating semiconductor packer according to claim 1, wherein, then the area in zone can select to equal, less than and greater than one of them of semiconductor area.
8. radiator structure comprises:
Fin, and this fin is preset with then district, thereby a heat-conduction medium material and then on semiconductor chip at interval;
Groove is formed on this fin corresponding to this then around the district; And
Barrier layer is formed at this groove surfaces, and this barrier layer and this heat-conduction medium material wettability effect are not good.
9. radiator structure according to claim 8, wherein, this fin material is a metallic copper, and this heat-conduction medium material is a soldering tin material, and this barrier layer is a cupric oxide.
10. radiator structure according to claim 8, wherein, this barrier layer is a metal oxide layer.
11. radiator structure according to claim 8, wherein, this barrier layer is to utilize laser to burn the metal oxide layer of this groove surfaces that fin results from of metal material.
12. radiator structure according to claim 8, wherein, this semiconductor chip has relative active surface and non-active surface, with with its active surface a plurality of conductive projections and connect and put and be electrically connected to a chip bearing member at interval, and make this heat sink spaced heat transmitting medium material and then in the non-active surface of this semiconductor chip.
13. radiator structure according to claim 8, wherein, then the area in district can select to equal, less than and greater than one of them of semiconductor area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101699875A CN101211872A (en) | 2006-12-26 | 2006-12-26 | Radiation-type semiconductor package member and its used radiation structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101699875A CN101211872A (en) | 2006-12-26 | 2006-12-26 | Radiation-type semiconductor package member and its used radiation structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101211872A true CN101211872A (en) | 2008-07-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2006101699875A Pending CN101211872A (en) | 2006-12-26 | 2006-12-26 | Radiation-type semiconductor package member and its used radiation structure |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106449557A (en) * | 2015-08-12 | 2017-02-22 | 旭宏科技有限公司 | Semiconductor radiating fin device and packaging structure using radiating fin |
| CN108493165A (en) * | 2018-04-19 | 2018-09-04 | 苏州通富超威半导体有限公司 | Encapsulating structure and welding method |
| CN109346442A (en) * | 2018-10-10 | 2019-02-15 | 唐燕 | It is a kind of be easy to radiate chip-packaging structure and its packaging method |
| CN111128912A (en) * | 2019-12-23 | 2020-05-08 | 海光信息技术有限公司 | Packaging structure and preparation method thereof |
| WO2020103147A1 (en) * | 2018-11-23 | 2020-05-28 | 北京比特大陆科技有限公司 | Chip heat dissipation structure, chip structure, circuit board and supercomputing device |
| CN114823573A (en) * | 2022-06-24 | 2022-07-29 | 威海市泓淋电力技术股份有限公司 | Heat dissipation type packaging structure and forming method thereof |
-
2006
- 2006-12-26 CN CNA2006101699875A patent/CN101211872A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106449557A (en) * | 2015-08-12 | 2017-02-22 | 旭宏科技有限公司 | Semiconductor radiating fin device and packaging structure using radiating fin |
| CN106449557B (en) * | 2015-08-12 | 2019-05-31 | 旭宏科技有限公司 | Semiconductor heat-dissipating sheet devices and the encapsulating structure for using the cooling fin |
| CN108493165A (en) * | 2018-04-19 | 2018-09-04 | 苏州通富超威半导体有限公司 | Encapsulating structure and welding method |
| CN109346442A (en) * | 2018-10-10 | 2019-02-15 | 唐燕 | It is a kind of be easy to radiate chip-packaging structure and its packaging method |
| WO2020103147A1 (en) * | 2018-11-23 | 2020-05-28 | 北京比特大陆科技有限公司 | Chip heat dissipation structure, chip structure, circuit board and supercomputing device |
| CN111128912A (en) * | 2019-12-23 | 2020-05-08 | 海光信息技术有限公司 | Packaging structure and preparation method thereof |
| CN114823573A (en) * | 2022-06-24 | 2022-07-29 | 威海市泓淋电力技术股份有限公司 | Heat dissipation type packaging structure and forming method thereof |
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