CN114823573A - Heat dissipation type packaging structure and forming method thereof - Google Patents
Heat dissipation type packaging structure and forming method thereof Download PDFInfo
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- CN114823573A CN114823573A CN202210720284.6A CN202210720284A CN114823573A CN 114823573 A CN114823573 A CN 114823573A CN 202210720284 A CN202210720284 A CN 202210720284A CN 114823573 A CN114823573 A CN 114823573A
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- heat dissipation
- annular groove
- semiconductor dies
- dissipation plate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention relates to a heat dissipation type packaging structure and a forming method thereof, relating to the field of semiconductor packaging, the method includes flip-chip mounting a plurality of semiconductor dies on a circuit substrate, forming a step portion, a first annular groove, and a second annular groove on a first surface of a heat dissipation plate, the first annular groove is located between the step part and the second annular groove, the heat dissipation plate is bonded on the plurality of semiconductor dies by using a heat conduction bonding layer, pressing a separation film on the first surface of the heat dissipation plate, the separation film being directly attached to the bottom and side surfaces of the plurality of continuous steps, and the separation film covers the top ends of the first and second annular grooves, a molding compound is injected between the separation film and the circuit substrate, the mold compound holds up the separation membrane such that the mold compound fills the step. The invention can improve the heat dissipation of the chip.
Description
Technical Field
The invention relates to the field of semiconductor packaging, in particular to a heat dissipation type packaging structure and a forming method thereof.
Background
In the conventional chip package structure, in order to ensure high heat dissipation of the chip, so as to facilitate normal operation of the chip and prolong the service life of the chip, the surface of the chip is usually exposed, thereby facilitating heat dissipation of the chip. In the existing packaging structure requiring the chip to be exposed, steps are usually directly arranged on the periphery of the chip, and then the glue overflow on the surface of the chip is inhibited in the subsequent packaging process. However, when the steps are arranged around the chip, the chip is easily cracked, and the chip is damaged.
Disclosure of Invention
The invention aims to provide a heat dissipation type packaging structure and a forming method thereof, which can improve the heat dissipation of a chip.
In order to achieve the above object, the present invention provides a method for forming a heat dissipation package structure, including the steps of:
providing a circuit substrate; providing a plurality of semiconductor dies, flip-chip mounting the plurality of semiconductor dies on the circuit substrate with a gap between adjacent semiconductor dies; providing a heat dissipation plate, wherein the heat dissipation plate is provided with a first surface and a second surface opposite to the first surface; forming a stepped portion, a first annular groove and a second annular groove on a first surface of the heat dissipation plate, wherein the stepped portion is located at the peripheral edge of the first surface and comprises a plurality of continuous steps, and the first annular groove is located between the stepped portion and the second annular groove; arranging a heat conduction bonding layer on the second surface of the heat dissipation plate, and further bonding the heat dissipation plate on the plurality of semiconductor dies by using the heat conduction bonding layer; pressing a separation film on the first surface of the heat dissipation plate, wherein the separation film is directly attached to the bottom surfaces and the side surfaces of the plurality of continuous steps, and covers the top ends of the first annular groove and the second annular groove; injecting a molding compound between the separation film and the circuit substrate, the molding compound supporting the separation film such that the molding compound fills the stepped portion.
Further preferably, the lower surfaces of the plurality of semiconductor dies are provided with conductive pads, and conductive bumps are provided on the conductive pads before the plurality of semiconductor dies are flip-chip mounted on the circuit substrate.
It is further preferred that an underfill layer is disposed between each of the semiconductor dies and the circuit substrate.
Further preferably, a bottom surface of the first annular groove is higher than a bottom surface of the stepped portion, and a bottom surface of the second annular groove is lower than the bottom surface of the first annular groove.
Further preferably, a projection of the heat dissipation plate on the circuit substrate completely covers a projection of the plurality of semiconductor dies on the circuit substrate.
Further preferably, the plurality of continuous steps includes a first step and a second step located above the first step, and the height of the first step is smaller than the height of the second step.
Further preferably, the molding compound fills the first step and the second step such that an upper surface of the molding compound is flush with the first surface of the heat dissipation plate.
The invention also provides a heat dissipation type packaging structure which is manufactured by adopting the method.
Compared with the prior art, the heat dissipation type packaging structure and the forming method thereof have the following beneficial effects: in the present invention, the heat dissipation plate is provided on the plurality of semiconductor dies by forming the step portion on the first surface of the heat dissipation plate. During the packaging process, the glue overflow phenomenon can be effectively inhibited while the damage of the semiconductor die is avoided. And the projection of the heat dissipation plate on the circuit substrate completely covers the projection of the plurality of semiconductor dies on the circuit substrate, so that the semiconductor dies are effectively protected. Further, through further in first surface formation first annular groove and second annular groove of heating panel, set up the step includes a plurality of continuous ladders, just first annular groove is located the step with between the second annular groove, further effectively restrain the overflow and glue and produce, and effectively improve heat dissipation type packaging structure's steadiness.
Drawings
FIG. 1 is a schematic diagram of a structure for flip-chip mounting a plurality of semiconductor dies on a circuit substrate;
FIG. 2 is a schematic view of a heat sink;
FIG. 3 is a schematic view of a structure for bonding a heat spreader plate to a plurality of semiconductor dies;
fig. 4 is a schematic view of a structure in which a molding compound is injected between the separation film and the circuit substrate.
Detailed Description
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Please refer to fig. 1 to 4. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
As shown in fig. 1 to 4, the present embodiment provides a method for forming a heat dissipation package structure, which includes the following steps:
as shown in fig. 1, a circuit substrate 100 is provided. Next, a plurality of semiconductor dies 200 are provided, and the plurality of semiconductor dies 200 are flip-chip mounted on the circuit substrate 100 with a gap between adjacent semiconductor dies 200.
In a specific embodiment, the lower surfaces of the plurality of semiconductor dies 200 are provided with conductive pads, and before the plurality of semiconductor dies 200 are flip-chip mounted on the circuit substrate 100, conductive bumps 201 are provided on the conductive pads. An underfill layer 300 is disposed between each of the semiconductor dies 200 and the circuit substrate 100.
In a specific embodiment, the circuit substrate 100 may be a multilayer printed circuit board, or may be a ceramic substrate or a plastic substrate provided with a metal wiring layer, and the plurality of semiconductor dies 200 may be dies with the same function or dies with different functions.
In a specific embodiment, a conductive pad is disposed on a lower surface of each of the semiconductor dies 200, the conductive pad is a copper pad or an aluminum pad, a conductive bump 201, specifically a solder bump, is disposed on the conductive pad before the semiconductor dies 200 are flip-chip mounted on the circuit substrate 100, and the semiconductor dies 200 are flip-chip mounted on the circuit substrate 100 by using the solder bump through a reflow process.
In a specific embodiment, after flip-chip mounting a plurality of semiconductor dies 200 on the circuit substrate 100, an underfill layer 300 is disposed between the semiconductor dies 200 and the circuit substrate 100 to protect the semiconductor dies 200 for subsequent mounting of a heat dissipation plate.
As shown in fig. 2, a heat dissipation plate 400 is provided, the heat dissipation plate 400 having a first surface and a second surface opposite to the first surface.
A stepped portion 401, a first annular groove 402, and a second annular groove 403 are formed on a first surface of the heat dissipation plate 400, the stepped portion 401 is located at a peripheral edge of the first surface and includes a plurality of continuous steps, and the first annular groove 402 is located between the stepped portion 401 and the second annular groove 403.
In a specific embodiment, the bottom surface of the first annular groove 402 is higher than the bottom surface of the step portion 401, and the bottom surface of the second annular groove 403 is lower than the bottom surface of the first annular groove 402, and due to the fact that the first annular groove 402 is close to the step portion 401, if the depth of the first annular groove 402 is set too deep, the edge stability of the heat dissipation plate 400 is easily reduced, and the edge of the heat dissipation plate is easily broken. In addition, the first annular groove 402 is disposed such that, in a subsequent packaging process, even if a small portion of the molding compound overflows the first surface of the heat dissipation plate 400, the portion of the molding compound is received by the first annular groove 402, even if the first annular groove 402 is filled, the second annular groove 403 can be used for receiving the molding compound, so that the molding compound can be effectively prevented from covering the first surface of the heat dissipation plate 400, and the heat dissipation effect of the heat dissipation plate is prevented from being affected. And the bottom surface of the second annular groove 403 is lower than the bottom surface of the first annular groove 402, so that the heat dissipation area of the heat dissipation plate 400 can be increased, and the heat dissipation effect of the heat dissipation type package structure can be improved.
In a specific embodiment, the plurality of continuous steps includes a first step 4011 and a second step 4012 located above the first step 4011, wherein the height of the first step 4011 is smaller than the height of the second step 4012, and more specifically, the height of the first step 4011 is 100-. By providing a specific structure for each step, it may be convenient for the mold compound to fill the step 401 during a subsequent injection of the mold compound.
As shown in fig. 3, a heat conductive adhesive layer 404 is disposed on the second surface of the heat spreader 400, and the heat spreader 400 is bonded to the plurality of semiconductor dies 200 by the heat conductive adhesive layer 404.
In a specific embodiment, a separation film 500 is pressed on the first surface of the heat dissipation plate 400, the separation film 500 is directly attached to the bottom and side surfaces of the plurality of continuous steps, and the separation film 500 covers the top ends of the first annular groove 402 and the second annular groove 403.
In a specific embodiment, the projection of the heat dissipation plate 400 on the circuit substrate 100 completely covers the projection of the plurality of semiconductor dies 200 on the circuit substrate 100, so as to effectively protect the semiconductor dies.
In a specific embodiment, the release film 500 includes a base layer and a low-tack layer, the base layer is made of suitable material such as PET, PI, etc., and the release film 500 has a thickness of 50-100 μm.
As shown in fig. 4, a mold compound 600 is injected between the separation film 500 and the circuit substrate 100, and the mold compound 600 holds up the separation film 500 so that the mold compound 600 fills the stepped portion 401.
In a specific embodiment, the molding compound 600 fills the first step 4011 and the second step 4012 such that an upper surface of the molding compound 600 is flush with the first surface of the heat sink 400.
The invention also provides a heat dissipation type packaging structure which is manufactured by adopting the method.
In another embodiment, the present invention provides a method for forming a heat dissipation package structure, including the following steps:
a circuit substrate is provided.
Providing a plurality of semiconductor dies, flip-chip mounting the plurality of semiconductor dies on the circuit substrate with a gap between adjacent semiconductor dies.
A heat dissipation plate is provided, and the heat dissipation plate is provided with a first surface and a second surface opposite to the first surface.
A step part, a first annular groove and a second annular groove are formed on the first surface of the heat dissipation plate, the step part is located on the periphery edge of the first surface and comprises a plurality of continuous steps, and the first annular groove is located between the step part and the second annular groove.
And arranging a heat conduction adhesive layer on the second surface of the heat dissipation plate, and further adhering the heat dissipation plate on the plurality of semiconductor dies by using the heat conduction adhesive layer.
Pressing a separation film on the first surface of the heat dissipation plate, wherein the separation film is directly attached to the bottom surfaces and the side surfaces of the plurality of continuous steps, and covers the top ends of the first annular groove and the second annular groove.
Injecting a molding compound between the separation film and the circuit substrate, the molding compound supporting the separation film such that the molding compound fills the stepped portion.
According to one embodiment of the present invention, the lower surfaces of the plurality of semiconductor dies are provided with conductive pads on which conductive bumps are provided before the plurality of semiconductor dies are flip-chip mounted on the circuit substrate.
According to one embodiment of the invention, an underfill layer is disposed between each of the semiconductor dies and the circuit substrate.
According to an embodiment of the present invention, a bottom surface of the first annular groove is higher than a bottom surface of the stepped portion, and a bottom surface of the second annular groove is lower than the bottom surface of the first annular groove.
According to one embodiment of the present invention, the projection of the heat dissipation plate on the circuit substrate completely covers the projection of the plurality of semiconductor dies on the circuit substrate.
According to one embodiment of the invention, the plurality of consecutive steps comprises a first step and a second step located above the first step, the first step having a height smaller than the second step.
According to one embodiment of the present invention, the molding compound fills the first step and the second step such that an upper surface of the molding compound is flush with the first surface of the heat dissipation plate.
The invention also provides a heat dissipation type packaging structure which is manufactured by adopting the method.
In the invention, the step part is formed on the first surface of the heat dissipation plate, so that the heat dissipation plate is arranged on the plurality of semiconductor dies, and the glue overflowing phenomenon can be effectively inhibited while the semiconductor dies are prevented from being damaged in the packaging process. And the projection of the heat dissipation plate on the circuit substrate completely covers the projection of the plurality of semiconductor dies on the circuit substrate, so that the semiconductor dies are effectively protected. Further, through further in first surface formation first annular groove and second annular groove of heating panel, set up the step includes a plurality of continuous ladders, just first annular groove is located the step with between the second annular groove, further effectively restrain the overflow and glue and produce, and effectively improve heat dissipation type packaging structure's steadiness.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (8)
1. A method for forming a heat dissipation type packaging structure is characterized in that: the method comprises the following steps:
providing a circuit substrate;
providing a plurality of semiconductor dies, flip-chip mounting the plurality of semiconductor dies on the circuit substrate with a gap between adjacent semiconductor dies;
providing a heat dissipation plate, wherein the heat dissipation plate is provided with a first surface and a second surface opposite to the first surface;
forming a stepped portion, a first annular groove and a second annular groove on a first surface of the heat dissipation plate, wherein the stepped portion is located at the peripheral edge of the first surface and comprises a plurality of continuous steps, and the first annular groove is located between the stepped portion and the second annular groove;
arranging a heat conduction bonding layer on the second surface of the heat dissipation plate, and further bonding the heat dissipation plate on the plurality of semiconductor dies by using the heat conduction bonding layer;
pressing a separation film on the first surface of the heat dissipation plate, wherein the separation film is directly attached to the bottom surfaces and the side surfaces of the plurality of continuous steps, and covers the top ends of the first annular groove and the second annular groove; and injecting a molding compound between the separation film and the circuit substrate, the molding compound supporting the separation film such that the molding compound fills the stepped portion.
2. The method of claim 1, wherein: the lower surfaces of the semiconductor dies are provided with conductive pads, and conductive bumps are arranged on the conductive pads before the semiconductor dies are flip-chip mounted on the circuit substrate.
3. The method of claim 1, wherein: an underfill layer is disposed between each of the semiconductor dies and the circuit substrate.
4. The method of claim 1, wherein: the bottom surface of the first annular groove is higher than the bottom surface of the step portion, and the bottom surface of the second annular groove is lower than the bottom surface of the first annular groove.
5. The method of claim 1, wherein: the projection of the heat dissipation plate on the circuit substrate completely covers the projection of the plurality of semiconductor dies on the circuit substrate.
6. The method of claim 1, wherein: the plurality of consecutive steps includes a first step and a second step located above the first step, the first step having a height less than a height of the second step.
7. The method of claim 6, wherein: the molding compound fills the first step and the second step such that an upper surface of the molding compound is flush with the first surface of the heat dissipation plate.
8. A heat-dissipating package manufactured by the method of any one of claims 1 to 7.
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| CN202210720284.6A CN114823573B (en) | 2022-06-24 | 2022-06-24 | Heat dissipation type packaging structure and forming method thereof |
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| CN202210720284.6A CN114823573B (en) | 2022-06-24 | 2022-06-24 | Heat dissipation type packaging structure and forming method thereof |
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| CN114823573A true CN114823573A (en) | 2022-07-29 |
| CN114823573B CN114823573B (en) | 2022-09-09 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116403978A (en) * | 2023-04-11 | 2023-07-07 | 江西万年芯微电子有限公司 | Semiconductor packaging structure and packaging method |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101090098A (en) * | 2006-06-16 | 2007-12-19 | 索尼株式会社 | Semiconductor device and method for manufacturing the same |
| CN101114624A (en) * | 2006-07-27 | 2008-01-30 | 矽品精密工业股份有限公司 | Heat radiation type semiconductor package and heat radiating structure |
| CN101211872A (en) * | 2006-12-26 | 2008-07-02 | 矽品精密工业股份有限公司 | Radiation-type semiconductor package member and its used radiation structure |
| CN101465329A (en) * | 2007-12-21 | 2009-06-24 | 新光电气工业株式会社 | Radiating plate for semiconductor package and electroplating method therefor |
| CN101728340A (en) * | 2008-10-22 | 2010-06-09 | 索尼株式会社 | Semiconductor device and method of manufacturing the same |
| CN102915978A (en) * | 2012-11-08 | 2013-02-06 | 南通富士通微电子股份有限公司 | Semiconductor packaging structure |
| US20150003019A1 (en) * | 2011-12-15 | 2015-01-01 | Hitachi Automotive Systems, Ltd. | Power Semiconductor Module and Power Module |
-
2022
- 2022-06-24 CN CN202210720284.6A patent/CN114823573B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101090098A (en) * | 2006-06-16 | 2007-12-19 | 索尼株式会社 | Semiconductor device and method for manufacturing the same |
| CN101114624A (en) * | 2006-07-27 | 2008-01-30 | 矽品精密工业股份有限公司 | Heat radiation type semiconductor package and heat radiating structure |
| CN101211872A (en) * | 2006-12-26 | 2008-07-02 | 矽品精密工业股份有限公司 | Radiation-type semiconductor package member and its used radiation structure |
| CN101465329A (en) * | 2007-12-21 | 2009-06-24 | 新光电气工业株式会社 | Radiating plate for semiconductor package and electroplating method therefor |
| CN101728340A (en) * | 2008-10-22 | 2010-06-09 | 索尼株式会社 | Semiconductor device and method of manufacturing the same |
| US20150003019A1 (en) * | 2011-12-15 | 2015-01-01 | Hitachi Automotive Systems, Ltd. | Power Semiconductor Module and Power Module |
| CN102915978A (en) * | 2012-11-08 | 2013-02-06 | 南通富士通微电子股份有限公司 | Semiconductor packaging structure |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116403978A (en) * | 2023-04-11 | 2023-07-07 | 江西万年芯微电子有限公司 | Semiconductor packaging structure and packaging method |
| CN116403978B (en) * | 2023-04-11 | 2024-02-06 | 江西万年芯微电子有限公司 | Semiconductor packaging structure and packaging method |
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| CN114823573B (en) | 2022-09-09 |
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