CN101166627A - 防静电瓷砖 - Google Patents
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Abstract
本发明涉及一种防静电瓷砖，本发明防静电瓷砖的体积电阻低于现有瓷砖，可以防止基于表面活性剂的防静电瓷砖发生渗色(bleeding)现象，从而避免表面活性剂出现渗色而使各层之间剥离的剥离现象，可以遮蔽电磁波与水脉波，还能发挥出较佳保湿功能的防静电瓷砖。本发明防静电瓷砖(100)包括上层(10)、积层在上述上层(10)的下部面并由含表面活性剂的合成树脂材料构成的下层(20)，其特征为，在上述上层(10)与下层(20)之间插入遮蔽单元(50)以防止表面活性剂的渗色现象。本发明防静电瓷砖的体积电阻可以降低到106～1010cm2，低于现有防静电瓷砖，可以防止合成树脂材料下层所含表面活性剂的渗色现象，从而有效避免表面活性剂出现渗色而使各层之间剥离的剥离现象，还可以遮蔽电磁波与水脉波。
Description
技术领域
本发明涉及一种防静电瓷砖，本发明防静电瓷砖的体积电阻低于现有瓷砖，可以防止基于表面活性剂的防静电瓷砖发生渗色(bleeding)现象，从而避免表面活性剂出现渗色而使各层之间剥离的剥离现象，可以遮蔽电磁波与水脉波，还能发挥出优异的保湿功能。
本发明防静电瓷砖主要用于下列地点并可以有效地吸收进静电或导引到其它地方：半导体和其它电气电子产品的生产与组装线的地板；实验室、无尘室及医院手术室等的地板；需要遮蔽有害电磁波的办公室的地板等。
背景技术
实际上，现有防静电瓷砖(也称为“mat”或“sheet”，以下简称“瓷砖”)的普及率很高。现有静电瓷砖的制造方法可以区分为下列几种：在表面等处涂布或加入铜、金及银之类导电性金属粉末的方法；在片(Sheet)的成型过程中混合表面活性剂等物的方法；或者在制作垫(Mat)之前把碳投入合成树脂材料或橡胶材料里并加以混合后成型的方法等。
目前，基于碳的静电瓷砖除了在合成树脂件里混入碳后滚轮压接成型的一般碳瓷砖，还有大韩民国注册实用新型实1987-2585号与大韩民国公开实用新型公报第97-732号之类的特殊形态。
上述实1987-2585号实用新型为了节约成本而以减少碳添加量为目的在合成树脂件颗粒的表面涂覆碳层后在模具内对多个颗粒施加压力后制成垫(Mat)。上述97-732号公开实用新型改善了上述实1987-2585号实用新型，把上述实1987-2585号实用新型所制成的导电性瓷砖裁剪成1mm左右的厚度后，在底面配置了由PVC合成树脂构成的中间层，在上述中间层的下部配置了由软质橡胶构成的片(Sheet)后进行热粘接。
然而上述基于碳的现有导电性瓷砖或防静电瓷砖具有下列问题。
第一、事先把碳混入合成树脂件后制作导电性瓷砖时，所制成的瓷砖的表面会变得很软而不适合作为地板材。尤其是容易受到鞋底等物的影响而形成裂缝而不宜作为地板材。
第二、按照事先把碳混入合成树脂件的现有方法所制造的防静电瓷砖，当表面发生摩擦时会使碳暴露于外并污染所接触的物体。
第三、在合成树脂件的颗粒上涂覆后加压成型的防静电瓷砖无法避免碳的非连续区段，因此将局部性地发生静电。
第四、需要增加针对合成树脂件颗粒进行的涂覆工序等作业而使工序复杂并提高生产成本。
本申请人为了克服上述问题而申请并获得专利的防静电瓷砖以大韩民国专利公开公报第2001-44707号(2001.06.05)及第2002-47078号(2002.06.21)向大众公开，上述发明的核心特征为在瓷砖本体下部面把碳膜、含碳膜或覆碳层加以结合(合纸)，在作为非导电体的透明膜下部把表面电阻低于106Ω/cm2的碳膜加以结合时，可以凭借隧道效应把透明膜表面的电阻降低到1010～1012Ω/cm2并防止静电。
然而，上述专利在实际上很难把表面电阻降低到109Ω/cm2以下，而且即使降低了表面电阻，也因为无法降低体积电阻而使体积电阻维持在1014Ω/cm2，使上述防静电瓷砖在整体上呈现近似于非导电体的性质而无法有效地发挥出防静电效果。
为了解决上述问题，虽然可以把表面活性剂混入瓷砖本体里而降低表面电阻与体积电阻，但表面活性剂的渗色现象却污染瓷砖表面并使各层剥离。
发明内容
本发明的目的是提供一种体积电阻低于现有瓷砖，可以防止基于表面活性剂的防静电瓷砖发生渗色(bleeding)现象，从而避免表面活性剂出现渗色而使各层之间剥离的剥离现象，可以遮蔽电磁波与水脉波，还能发挥出较佳保湿功能的防静电瓷砖。
为了解决实现目的，本发明防静电瓷砖包括上层、积层在上述上层下部面并由含表面活性剂的合成树脂材料构成的下层，其特征为，在上述上层与下层之间插入遮蔽单元以防止表面活性剂的渗色现象。
本发明防静电瓷砖包括上层、积层在上述上层下部面并由含表面活性剂的合成树脂材料构成的下层，其特征为，在上述下层的下部面插入遮蔽单元以防止表面活性剂的渗色现象。
上述下层或遮蔽单元下部面另外配置导电性单元。
上述导电性单元是碳膜、把碳涂覆或印刷的覆碳膜、或者含碳并热压接成型的导电膜之一。
上述导电性单元是含有或涂覆镍、铜、银、钾、镁、镉及铝之任一金属的片。
上述遮蔽单元使用铝片，在上述铝片的单面或两面结合了由合成树脂材料制成的膜。
上述遮蔽单元在聚酰胺、聚酯、EVOH及尼龙膜之一的密封层上含浸了碳或金属。
上述瓷砖的表面电阻为106～1012Ω/cm2，上述瓷砖的体积电阻为106～1010Ω/cm2。
本发明防静电瓷砖的体积电阻可以降低到106～1010cm2，低于现有防静电瓷砖，可以防止合成树脂材料下层所含表面活性剂的渗色现象，从而有效地防止瓷砖出现剥离现象，还可以遮蔽电磁波与水脉波。
附图说明
图1a是本发明的分解立体图；图1b是图1a的剖面图。
图2a是本发明的分解立体图；图2b是图1a的剖面图。
<图形主要符号的说明>
10：上层 12：彩色印刷膜
14：透明膜 20：下层
22：聚乙烯膜 30：密封层(防空气穿透)
40：导电性单元 50：遮蔽单元
52：片 54：聚乙烯膜
60：密封层(防空气穿透) 100：防静电瓷砖
具体实施方式
下部面结合图1和图2及较佳实施例对本发明作进一步说明。
图1a是本发明的分解立体图，图1b是图1a的剖面图，图2a是本发明另一实施例的分解立体图；图2b是图2a的剖面图。
如图1a和图1b所示，本发明防静电瓷砖(100)包括：上层(10)、在上述上层(10)的下部面结合的下层(20)、结合在上述上层(10)与下层(20)之间的遮蔽单元(50)、以及结合在上述下层(20)下部面的导电性单元(40)。
上述上层(10)包括：透明膜(12)和结合在上述透明膜(12)下部面的彩色印刷膜(14)。上述透明膜(12)的厚度为0.3mm左右，彩色印刷膜(14)的厚度为0.1mm左右。
上述下层(20)应该使用合成树脂制作，其中以PVC最好。上述下层(20)含浸了可以降低防静电瓷砖(100)的表面电阻与体积电阻的表面活性剂。上述表面活性剂的含浸比例应该是PVC体积的3～10％。
虽然现有瓷砖也在PVC含浸了表面活性剂，但因为具有具蒸发性的表面活性剂被蒸发而降低了导电性，并且随着表面活性剂被蒸发而出现了污染瓷砖表面的渗色现象，上述渗色现象则引起瓷砖的剥离现象。
然而，本发明为了防止表面活性剂被蒸发而引起渗色现象及防静电瓷砖(100)的剥离现象，采取了在上层(10)与下层(20)之间结合遮蔽单元(50)或者在下层(20)下部面结合遮蔽单元(50)的方法。
上述遮蔽单元(50)应该使用铝、镍、铜、银、钾、镁及镉中的任何一种金属片(52)，上述片(52)以延性率良好的铝较佳。而且，上述片(52)的单面或两面应该结合聚乙烯膜(54)，上述聚乙烯膜(54)可以使上层(10)与下层(20)轻易结合。
上述遮蔽单元(50)可以防止表面活性剂的渗色现象，上述遮蔽单元(50)不仅可以防止高挥发性的表面活性剂在下层渗色而污染瓷砖表面的现象，还可以防止湿气浸入合成树脂件的下层。
如图2a与图2b所示，上述遮蔽单元(50)可以是结合在上述下层(20)的单面或两面的密封层(60)，上述密封层(60)的材料可以使用聚酰胺、聚酯、尼龙或EVOH。应该把碳或金属含浸到上述密封层(60)。
上述密封层(60)可以防止表面活性剂的渗色现象。
图2a与图2b所示实施例除了不包含遮蔽单元以外，其余部分则和图1a与图1b所示实施例相同。
在上述下层(20)下部面进行结合的导电性单元(40)可以使用碳膜、把碳涂覆或印刷的覆碳膜、或者含碳并热压接成型的导电膜，上述导电性单元(40)不仅可以提高含有表面活性剂的瓷砖本体的导电性，还可以永久性地防止静电。
本发明实施例的防静电瓷砖(100)的表面电阻为106～1012Ω/cm2，体积电阻为106～1010Ω/cm2，可以有效地遮蔽静电与电磁波。
本发明的另一实施例可以把上述遮蔽单元配置在下层的下部面。
实施例
实施例1(本发明瓷砖的表面电阻)
在位于上述下层下部面的导电性单元(40)上涂覆碳，在下层加入5％(体积比)的表面活性剂，在上层(10)与下层(20)之间插入其上下两面涂覆了聚乙烯的铝片(52)，然后针对同一平面的电极之间所出现的电阻进行评估的结果得知，其表面电阻为108Ω/cm2而低于现有防静电瓷砖(100)，不仅有助于防静电效果，还可以发挥出如下所示的电磁波遮蔽效果。
实施例2(本发明瓷砖的体积电阻)
在上述实施例1的发明中沿着厚度方向配置电极后量测电阻值，可以得知当体积电阻沿着厚度方向配置电极时其体积电阻值为108Ω/cm2。
因此，把本发明实施例上的体积电阻从1014Ω/cm2降低到108Ω/cm2而突显出瓷砖整体的导电性时，可以有效降低静电。
实施例3(本发明瓷砖的电磁波遮蔽实验)
测试本发明防静电瓷砖的电磁波遮蔽能力时，使用“ASTM D4935-89”试验法进行量测，其分贝值(A)为8±05dB。
因此，把上述试验法(A)代入电磁波遮蔽效果的计算式(遮蔽效果(％)＝(1-10-A/10)×100％)进行计算的结果，得知其可以遮蔽82.21％～～85.87％的电磁波。
实施例4(本发明瓷砖的水脉波遮蔽实验)
而且，确认了本发明可以遮蔽现代社会生活中日益重视的水脉波。水脉波是从地下100～200m以上的深处冲上地表时生成的有害波，在有害波存在的地方引起有益波就能有效地减弱有害波。目前，世界各国没有可以科学地量测水脉波的仪器，只能使用着重于人类本身感性的L形杆或锥进行量侧，或者使用远红外线辐射试验或红外线热成像量测法检测能否遮蔽水脉波。把实际上不存在的理论试片BLACKBODY的辐射率设定为1并透过FT-IR spectrometer法量测的结果，本发明防静电瓷砖的远红外线辐射率达到0.68，即68％的辐射率，所生成的250瓦特辐射能量中和了水脉波。根据本发明防静电瓷砖的红外线热成像量测试验结果，大多数可以在室内温度26℃辐射30℃的远红外线并可以中和水脉波。
根据本发明防静电瓷砖的红外线热成像量测试验结果，大多数的防静电瓷砖可以在室内温度26℃辐射30℃的远红外线并可以中和水脉波。
本说明书结合较佳实施例对本发明做了详细说明，但在本发明的技术思想范畴内，可以根据本发明的详细说明而实现各种变形及修改，而且本说明书没有介绍的其它等价手段也可以视为本发明的范围，这在同一行业人士来说是非常明显的，因此上述实施例不能限定本发明，本发明真正的权利范围应根据权利要求范围而定。
Claims (12)
1.一种防静电瓷砖，包括上层、积层在上述上层下部面并由含表面活性剂的合成树脂材料构成的下层，其特征为：
在上述上层与下层之间插入遮蔽单元以防止表面活性剂的渗色现象。
2.一种防静电瓷砖，包括上层、积层在上述上层下部面并由含表面活性剂的合成树脂材料构成的下层，其特征为：
在上述下层下部面插入遮蔽单元以防止表面活性剂的渗色现象。
3.根据权利要求1所述的防静电瓷砖，其特征为：
上述下层下部面另外配置了导电性单元。
4.根据权利要求2所述的防静电瓷砖，其特征为：
上述遮蔽单元下部面另外配置了导电性单元。
5.根据权利要求2或3所述的防静电瓷砖，其特征为：
上述导电性单元是碳膜、把碳涂覆或印刷的覆碳膜、或者含碳并热压接成型的导电膜之一。
6.根据权利要求2或3所述的防静电瓷砖，其特征为：
上述导电性单元是含有或涂覆镍、铜、银、钾、镁、镉及铝之任一金属的片。
7.根据权利要求1或2所述的防静电瓷砖，其特征为：
上述遮蔽单元是铝、镍、铜、银、钾、镁及镉之任一金属构成的片。
8.根据权利要求7所述的防静电瓷砖，其特征为：
在上述铝片的单面或两面结合了由合成树脂材料制成的膜。
9.根据权利要求1或2所述的防静电瓷砖，其特征为：
上述遮蔽单元结合了作为聚酰胺、聚酯、EVOH及尼龙膜之一的密封层。
10.根据权利要求9所述的防静电瓷砖，其特征为：
上述密封层含浸了碳或金属。
11.根据权利要求1到权利要求4之任一项所述的防静电瓷砖，其特征为：
上述瓷砖的表面电阻为106～1012Ω/cm2。
12.根据权利要求1到权利要求4之任一项所述的防静电瓷砖，其特征为：
上述瓷砖的体积电阻为106～1010Ω/cm2。
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| CN102094511A (zh) * | 2010-12-29 | 2011-06-15 | 北京工业大学 | 一种线性规则区域布料大颗粒的抗静电瓷砖 |
| KR101702699B1 (ko) | 2013-11-18 | 2017-02-06 | 이주엽 | 정전기 방지 시트 |
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| JPH01318658A (ja) * | 1988-06-17 | 1989-12-25 | Toyo Linoleum Co Ltd | 耐久性床材 |
| US5284701A (en) * | 1991-02-11 | 1994-02-08 | Ashland Oil, Inc. | Carbon fiber reinforced coatings |
| KR19990016633A (ko) * | 1997-08-18 | 1999-03-15 | 손영일 | 수맥파차단장판 |
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| KR100367885B1 (ko) * | 2002-05-27 | 2003-01-14 | 이문수 | 정전기 방지 타일 |
| KR100552980B1 (ko) * | 2004-02-04 | 2006-02-15 | 이문수 | 전자파차폐용 방진타일 |
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| KR20060111917A (ko) | 2006-10-31 |
| KR100663628B1 (ko) | 2007-01-02 |
| US20080206581A1 (en) | 2008-08-28 |
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