CN101162568A - Source-follower type analogue buffer, compensating operation method thereof, and display therewith - Google Patents
Source-follower type analogue buffer, compensating operation method thereof, and display therewith Download PDFInfo
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- CN101162568A CN101162568A CNA2007101226842A CN200710122684A CN101162568A CN 101162568 A CN101162568 A CN 101162568A CN A2007101226842 A CNA2007101226842 A CN A2007101226842A CN 200710122684 A CN200710122684 A CN 200710122684A CN 101162568 A CN101162568 A CN 101162568A
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Abstract
A source-follower-type analogue buffer with an active load, a new compensating operation and a display with the source-follower-type analogue buffers are developed to reduce an error voltage which is the difference between an input voltage and an output voltage of the analogue buffer. The source-follower type analogue buffer can also minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage.
Description
Technical field
The present invention relates to a kind of analogue buffer.More particularly, the present invention relates to the source electrode follower type analogue buffer that a kind of active matrix displays is used many silicon thin film transistors (TFT).
Background technology
Low temperature polycrystalline silicon (LTPS, low temperature poly-Si) thin film transistor (TFT) (TFT, thinfilm transistor) allows to integrate owing to the periphery of the pixel panel of the driving circuit of high current driving ability and active matrix displays.Yet, as everyone knows, have the characteristic and the heterogencity of being on duty mutually because polycrystalline SiTFT and monocrystalline silicon large scale integrated circuit (LSI, large scale integrated circuit) are compared, it is very difficult that whole driving circuit and polycrystalline SiTFT (TFT) are integrated.Polysilicon is in a plurality of driving circuits that use polycrystalline SiTFT (TFT), and analogue buffer is indispensable for the load capacitance that drives data bus in the panel.Because the simplicity and the low power consumption of source follower, it is regarded as being used for the splendid candidate of the analogue buffer circuit of " system on the panel " (SOP, System on Panel) application.
The typical source follower 100 of active matrix displays use LTPS thin film transistor (TFT) has been shown among Figure 1A.The gate coupled of the thin film transistor (TFT) 110 in the source follower 100 is to input voltage vin, and the drain coupled of thin film transistor (TFT) 110 is to operating voltage Vdd.The source electrode of thin film transistor (TFT) 110 is coupled to ground connection via load capacitor (Cload).Figure 1B shows the waveform of the output voltage V out of source follower 100.Can observe, final output voltage V out does not keep constant, but can surpass the value of desired Vin-Vth in principle, and wherein Vth is the critical value voltage of TFT 110.It is owing to the sub-threshold electric current.Shown in Fig. 1 C, it shows drain current (I
D) and the grid of thin film transistor (TFT) 110 and the voltage (V between the source electrode
GS) curve, the sub-threshold amplitude of oscillation of LTPS thin film transistor (TFT) is about 0.3V/dec, this sub-threshold amplitude of oscillation (0.06V/dec) than metal oxide semiconductcor field effect transistor (MOSFET, metal-oxide-semiconductorfield effectt ransistor) is much bigger.Thereby typical source follower 100 will be comparatively responsive for the duration of charging of various product specifications (for example frame rate of active matrix displays) as the analogue buffer of active matrix displays, and can not have constant output voltage.
Fig. 2 A shows another source follower that uses polycrystalline SiTFT in the available liquid crystal display.Source follower 200 comprises thin film transistor (TFT) M1 and M2, capacitor C1 and a plurality of switch S 1 to S4.The node N1 that is coupled to input voltage vin via switch S 1 is connected to node N2 under the control of switch S 2, and is also connected to the grid of thin film transistor (TFT) M1.Node N2 is connected to node N3 under the control of switch S 3, and further is connected to node N4.Node N3 is connected to the terminal of capacitor C1 and the gate terminal of thin film transistor (TFT) M2.Node N4 is connected to data line under the control of switch S 4.The voltage level of node N4 is the output voltage V out of source follower 200.The source electrode of thin film transistor (TFT) M1 is connected to ground connection, and the drain electrode of thin film transistor (TFT) M1 is connected to node N4 (lead-out terminal).Thin film transistor (TFT) M2 is the PMOS transistor, and its drain electrode is connected to operating voltage Vdd and its source electrode is connected to node N4.
Referring to Fig. 2 B, it shows the relation between input voltage vin and the output voltage V out, shown in reference component symbol 210.At source follower ideally, output voltage V out should be identical with input voltage vin.Yet, in actual conditions, have error voltage, i.e. difference between input voltage vin and the output voltage V out.Shown in reference component symbol 220, it shows when input voltage vin increases, and output voltage V out and input voltage vin are inequality, and if input Vin change to 8V from 2.5V, so error voltage at 80mV to floating between the 175mV.If the output voltage of source follower is big (for example 10V) for the driving of display, error voltage may not can cause and has a strong impact on driving operation so.Yet if the output voltage of source follower less for the driving of display voltage (for example 0.5V is to 2V), error voltage may be greater than a gray scale voltage so, and gray scale voltage will cause display quality and have a strong impact on.
Summary of the invention
Therefore, purpose of the present invention is providing a kind of source-follower type analogue buffer with service load, and a kind of novel compensating operation method through exploitation reducing error voltage, and make the minimize variations of duration of charging and apparatus characteristic, and make the scope maximization of input voltage.
In one embodiment of the invention, provide a kind of analogue buffer and a kind of display, described display has multiple source utmost point follower pattern and intends impact damper to be used for the load capacitance of a plurality of data buss of driving display.Described analogue buffer comprises holding capacitor, driving transistors and service load.The first terminal of holding capacitor is connected to operating voltage source via first switch, and second terminal of holding capacitor is connected to the input terminal of source-follower type analogue buffer via the 3rd switch.In driving transistors, the gate terminal of driving transistors is connected to the first terminal of holding capacitor, the drain terminal of driving transistors is connected to operating voltage source, and the source terminal of driving transistors is connected to second terminal of holding capacitor via second switch.The first terminal of service load is connected to the source terminal of driving transistors and is connected to the lead-out terminal of source-follower type analogue buffer via the 4th switch, and second terminal of service load is connected to ground connection, service load is controlled by bias voltage, and wherein the input terminal of source-follower type analogue buffer is connected to the lead-out terminal of source-follower type analogue buffer via the 5th switch.
During compensation cycle, first switch and second switch are switched on, thereby voltage drop is stored in the holding capacitor; And during the data input cycle, input voltage is displaced to logic high, first switch and second switch are disconnected, and the 3rd switch and the 4th switch are switched on, the gate terminal of driving transistors is applied in input voltage and the voltage difference that remains in the holding capacitor, thereby the output voltage of analogue buffer is by the voltage compensation that is stored in holding capacitor.
The compensating operation method of above-mentioned analogue buffer is provided in one embodiment of the invention.Analogue buffer comprises driving transistors and load capacitor.The holding capacitor and first switch are placed between the gate terminal and source terminal of driving transistors, and the drain terminal of driving transistors is connected to operating voltage source, and load capacitor is placed between the contact and ground connection of switch and source terminal.The input terminal of source-follower type analogue buffer is connected to the lead-out terminal of source-follower type analogue buffer via second switch.Described compensating operation method is included in during the compensation cycle, and first switch is switched on and holding capacitor is coupled to operating voltage source, thereby voltage drop is stored in the holding capacitor.During the data input cycle, in the data period 1 in input cycle, input voltage is applied to the contact place between the holding capacitor and first switch, thereby the gate terminal of driving transistors is applied in input voltage and the voltage difference that remains in the holding capacitor, and the output voltage of analogue buffer is by the voltage compensation that is stored in the holding capacitor, and in the second round in data inputs cycle, second switch is switched on and the input terminal of source-follower type analogue buffer is connected to the lead-out terminal of source-follower type analogue buffer.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Figure 1A is the circuit diagram that uses the typical source follower of LTPS thin film transistor (TFT) in the active matrix displays.
Figure 1B shows the waveform of the output voltage V out of Figure 1A source follower.
Fig. 1 C shows drain current (I
D) and the grid of the thin film transistor (TFT) of Figure 1A and the voltage (V between the source electrode
GS) curve.
Fig. 2 A shows source follower.
Fig. 2 B shows the output voltage waveforms of Fig. 2 A source follower.
Fig. 3 A shows the source-follower type analogue buffer with service load.
Fig. 3 B and Fig. 3 C show indivedual compensating operations of the source-follower type analogue buffer that is applied to Fig. 3 A.
Fig. 4 A shows the source-follower type analogue buffer with service load.
Fig. 4 B and Fig. 4 C show indivedual compensating operations of the source-follower type analogue buffer that is applied to Fig. 4 A.
Fig. 5 A shows the source-follower type analogue buffer with service load of the preferred embodiment of the present invention.
Fig. 5 B shows indivedual compensating operations of the source-follower type analogue buffer that is applied to Fig. 5 A.
Fig. 6 A shows the analog result of the source-follower type analogue buffer of Fig. 5 A when input voltage changes.
Fig. 6 B shows the input voltage vin of source-follower type analogue buffer of Fig. 5 A and the relation between the output voltage V out.
Fig. 6 C shows the input voltage vin of proposed source-follower type analogue buffer of Fig. 5 A and the relation between the error voltage.
Fig. 7 A shows Mondicaro (Monte Carlo) analog result of the source-follower type analogue buffer of Fig. 3 A when input voltage is 4V, 5V or 6V.
Two skews that Fig. 7 B shows analogue buffer, the Kida of Chung are eliminated in analogue buffers and the proposed analogue buffer of the present invention according to the output voltage standard deviation relevant with Vbias of Mondicaro simulation and the result of power consumption.
Fig. 8 A shows the analogue buffer of the Chung with service load and the synoptic diagram of its principle of operation.
Fig. 8 B shows the Mondicaro analog result that the output voltage of analogue buffer of the Chung of Fig. 8 A changes.
Fig. 9 A shows the two offset cancellation analogue buffers of the Kida with service load.
Fig. 9 B shows the Mondicaro analog result that the output voltage of the two offset cancellation analogue buffers of the Kida with service load changes.
Figure 10 A shows the comparative result of the output voltage standard deviation that obtains according to the Mondicaro simulation calculation in the two offset cancellation analogue buffers of analogue buffer, Kida of existing source follower, Chung and the proposed analogue buffer of the present invention.
Figure 10 B shows in two offset cancellation analogue buffers and the proposed analogue buffer of the present invention of analogue buffer, Kida of Chung according to the output voltage standard deviation relevant with Vbias of Mondicaro simulation and the result of power consumption.
Figure 11 shows one embodiment of the invention relevant with display, and described display has multiple source utmost point follower pattern and intends impact damper to be used to drive the wherein load capacitance of a plurality of data buss.
The reference numeral explanation
100: source follower
110: thin film transistor (TFT)
200: source follower
300: source follower
320: service load
400,500: source-follower type analogue buffer
410,510: driving transistors
420,520: service load
430: load capacitor
440,530: holding capacitor
1100: display
1110: gate driving equipment
1112
1, 1112
2, 1112
3..., 1112
n: gate line
1120: source drive equipment
1130: panel
1122
1, 1122
2, 1122
3..., 1122
m: data line
1121: shift register
1123: the data latching circuit
1125: level shifter
1127: digital/analog converter
1129: impact damper
1129
1, 1129
2, 1129
3..., 1129
m: buffer cell
M1, M2: thin film transistor (TFT)
C1: capacitor
S1～S4: switch
N1, N2, N3, N4, N5, N6: node
T1: compensation cycle
T2: data input cycle
Cload: load capacitor
I
D: drain current
Vin: input voltage
Vdd: operating voltage
Vout: output voltage
Vbias: bias voltage
Embodiment
The invention provides a kind of source-follower type analogue buffer with service load, and the difference of a kind of novel compensating operation method error voltage between development is with the input voltage that reduces analogue buffer and output voltage.Source-follower type analogue buffer also can make the minimize variations of duration of charging and apparatus characteristic, and makes the input voltage range maximization.
On February 16th, 2006 application name be called " SOURCE-FOLLOWER TYPE ANALOGUE BUFFER; COMPENSATING OPERATION METHOD THEREOF; AND DISPLAY THEREWITH " the 11/356th, propose a kind of source follower in No. 160 patent application cases, wherein the full text of above-mentioned patent application case is incorporated herein by reference and becomes the part of this instructions.As shown in Fig. 3 A, add service load 320, it is a thin film transistor (TFT).Service load 320 through design to have than major path length (L) so that direct current (DC) electric current minimizes and reduces kink effect (kink effect).Output voltage V out waveform has been shown among Fig. 3 B.Obviously, reduced the unsaturation of output voltage V out.As a result, the source follower 300 with service load preferentially has the variation characteristic of anti-the duration of charging.
Yet,, for using, to consider the variation (for example critical value voltage or mobility etc.) of LTPS thin film transistor (TFT) so if the proposed source follower of Fig. 3 A is applied directly in the analogue buffer of active matrix displays.Then, please referring to Fig. 3 C, it shows analog output voltage (Vout) waveform and the running time of source follower, wherein it is applied identical input voltage vin (4V or 6V).Obviously, typical source follower is subjected to changing the great variety that causes because of the LTPS thin film transistor (TFT).
Please referring to Fig. 4 A, this paper introduces a kind of source-follower type analogue buffer 400 with service load 420, and it also proposes in above-mentioned patent application case.Described source-follower type analogue buffer 400 comprises driving transistors 410, service load 420, load capacitor 430, holding capacitor 440 and a plurality of switch S 1 to S4.Described driving transistors 410 is thin film transistor (TFT)s, for example low-temperature polysilicon film transistor.Service load 420 is thin film transistor (TFT)s, and gate terminal constant bias under voltage level Vbias.
The node N1 that is coupled to input voltage vin is connected to node N2 under the control of switch S 3.Node N2 is connected to a terminal of holding capacitor 440, and further is connected to node N5 under the control of switch S 2.Node N3 is connected to another terminal of holding capacitor 440 and the gate terminal of driving transistors 410, and further is connected to node N4 under the control of switch S 1.Node N4 is coupled to operating voltage Vdd and is also connected to the drain terminal of driving transistors 410.Node N5 is connected to the source terminal of service load 420 and driving transistors 410, and further is connected to node N6 under the control of switch S 4.Node N6 is connected to load capacitor 430.The voltage level of node N6 is the output voltage V out of source-follower type analogue buffer 400.
In above-mentioned patent application case, propose a kind of compensating operation method so that the minimize variations of duration of charging and apparatus characteristic and make the input voltage range maximization.For instance, in Fig. 4 B and Fig. 4 C, alternative offers has been shown.At first please together with the analogue buffer 400 shown in Fig. 4 A referring to Fig. 4 B.At the time t0 place, as grid voltage constant bias under voltage level Vbias of the thin film transistor (TFT) of service load 420.During compensation cycle T1, switch S 1 and S2 are being switched on to time t1 from time t0, and at time t1 place, switch S 1 is disconnected.In compensation cycle T1 ending (that is, time t2), switch S 2 is disconnected.Thereby voltage drop is stored in the holding capacitor 440.
During data inputs period T 2, input voltage vin is displaced to logic high and is applied to node N1, and switch S 3 and S4 are switched on.The gate terminal of driving transistors 410 is applied in input voltage vin voltage and the voltage difference that remains in the holding capacitor 440.Therefore, output voltage is by the voltage compensation that is stored in the holding capacitor 440.
Propose please together with the analogue buffer 400 shown in Fig. 4 A referring to Fig. 4 C for another compensating operation.At the time t0 place, as grid voltage constant bias under voltage level Vbias of the thin film transistor (TFT) of service load 420.During compensation cycle T1, switch S 1 and S2 are switched in whole compensation cycle T1.In compensation cycle T1 ending (being time t1), switch S 1 and S2 are disconnected.Thereby voltage drop is stored in the holding capacitor 440.During data inputs period T 2, input voltage vin is displaced to logic high and is applied to node N1, and switch S 3 and S4 are switched on.The gate terminal of driving transistors 410 is applied in input voltage vin voltage and the voltage difference that remains in the holding capacitor 440.Therefore, output voltage is by the voltage compensation that is stored in the holding capacitor 440.
Yet, consider error voltage (it is the difference between the input voltage of analogue buffer and the output voltage), a kind of novel structure is proposed among the present invention.Please referring to Fig. 5 A, this paper introduces a kind of source-follower type analogue buffer 500 with service load 520, and it is the preferred embodiments of the present invention.Source-follower type analogue buffer 500 comprises driving transistors 510, service load 520, holding capacitor 530 and a plurality of switch S 1 to S5.Driving transistors 510 is thin film transistor (TFT)s, for example low-temperature polysilicon film transistor.Service load 520 is thin film transistor (TFT)s, and gate terminal constant bias under voltage Vbias.
The node N1 that is connected to input voltage (Vin) source is connected to node N2 under the control of switch S 3, and also is connected to node N6 under the control of switch S 5.Node N2 is connected to a terminal of holding capacitor 530, and further is connected to node N5 under the control of switch S 2.Node N3 is connected to another terminal of holding capacitor 530 and the gate terminal of driving transistors 510, and further is connected to node N4 under the control of switch S 1.Node N4 is coupled to operating voltage Vdd and is also connected to the drain terminal of driving transistors 510.Node N5 is connected to the source terminal of service load 520 and driving transistors 510, and further is connected to node N6 under the control of switch S 4.The voltage level at node N6 place is the output voltage V out of source-follower type analogue buffer 500.
This paper mentions proposed compensating operation method among the present invention reducing the error voltage between input voltage and the output voltage, and makes the minimize variations of duration of charging and apparatus characteristic and make the input voltage range maximization.For instance, the embodiment of the invention for principle of operation has been shown among Fig. 5 B.At first please follow the analogue buffer 500 shown in Fig. 5 A referring to Fig. 5 B.At the time t0 place, as grid voltage constant bias under voltage level Vbias of the thin film transistor (TFT) of service load 520.During compensation cycle T1, switch S 1 and S2 are being switched on to time t1 from time t0, and at time t1 place, switch S 1 is cut off.In compensation cycle T1 ending (that is, time t2), switch S 2 is disconnected.Thereby voltage drop is stored in the holding capacitor 530.
During cycle from time t2 to time t3 in data inputs period T 2, input voltage vin converts logic high to and is applied to node N1, and switch S 3 and S4 are switched on.The gate terminal of driving transistors 510 is applied in input voltage vin voltage and the voltage difference that remains in the holding capacitor 530.Therefore, output voltage is compensated by the voltage that is stored in the holding capacitor 530.During cycle from time t3 to time t4 in data input period T 2, switch S 3 and S4 are disconnected and switch S 5 is switched on, so that output voltage V out is coupled to input voltage vin.During cycle from time t3 to time t4, output voltage V out is coupled to the influence that input voltage vin significantly reduces error voltage, wherein error voltage is the input voltage of analogue buffer 500 and the difference between the output voltage.
Please referring to Fig. 6 A, it shows the analog result of the source-follower type analogue buffer 500 of Fig. 5 A when input voltage changes.In Fig. 6 A, show analog output voltage (Vout) waveform and the running time of source-follower type analogue buffer 500.Source-follower type analogue buffer 500 and its compensating operation method proposed by the invention can make the minimize variations of duration of charging and apparatus characteristic, and make input voltage range maximize.The duration of charging of proposed source-follower type analogue buffer 500 is lower than 15 μ s (microsecond), and the duration of charging of existing source follower type is greater than the duration of charging of the present invention.As seen, the duration of charging is about 8 μ s from Fig. 6 A.
Please referring to Fig. 6 B, it shows the input voltage vin of proposed source-follower type analogue buffer 500 and the relation between the output voltage V out in addition.Linear relationship between input voltage vin and the output voltage V out has obtained improvement.Voltage difference between input voltage vin and the output voltage V out significantly reduces, and this means that proposed source-follower type analogue buffer 500 and its compensating operation method have reduced error voltage.Please referring again to Fig. 6 C, it shows input voltage vin in the proposed source-follower type analogue buffer 500 and the relation between the error voltage.Error voltage is lowered to and is lower than 0.05 (5.00E-02) V, and it reduces significantly and is not error voltage in existing source-follower type analogue buffer.
Illustrated among Fig. 7 A when input voltage is 4V, 5V or 6V, the Mondicaro analog result of the source-follower type analogue buffer 500 of Fig. 5 A, it shows emulation output voltage (Vout) waveform and the running time of source-follower type analogue buffer 500.For the influence of research equipment variation, in mean value, carry out the Mondicaro emulation of hypothesis normal distribution, and the deviation of critical value voltage and mobility is respectively 1V, 1V, 77.1cm to circuit performance
2/ vs and 20cm
2/ vs.Each independent variation of LTPS thin film transistor (TFT) in the circuit simulation.Via the result of the source follower 200 of comparison diagram 2A, obviously source follower 200 is subjected to more manying changing the variation that causes because of the LTPS thin film transistor (TFT) than the source-follower type analogue buffer 500 of Fig. 5 A.
High vulnerability to jamming feature, easy configuration ability, low power consumption and signal timing that source-follower type analogue buffer of the present invention has for the polycrystalline SiTFT changing features change (being unsaturation) minimized ability.Source-follower type analogue buffer of the present invention is suitable in the active matrix display, active matrix liquid crystal display (AMLCD for example, active matrix liquid crystaldisplay) or active-matrix organic light emitting display (AMOLED, active matrix organic lightemitting display).More particularly, source-follower type analogue buffer of the present invention is suitable for " system on the panel " application of AMLCD or AMOLED.In the driving circuit that uses polycrystalline SiTFT, proposed analogue buffer is indispensable for the load capacitance that drives data bus in the panel.
Some existing source-follower type analogue buffer with service load were once proposed in affiliated field.Please referring to Fig. 8 A, it shows analogue buffer and its principle of operation (H.J.Chung, S.W.Lee and the C.H.Han of the Chung with service load, IEE Electronics Letters, the 37th volume, the 1093rd page, calendar year 2001) synoptic diagram, and Fig. 8 B shows the Mondicaro analog result that output voltage changes.Please referring again to Fig. 9 A, it shows analogue buffer (Y.Kida, Y.Nakajima, M.Takatoku, M.Minegishi, S.Nakamura, Y.Maki and the T.Maekawa of the Kida with service load, EURODISPLAY, the 831st page, 2002), and its Mondicaro analog result has also illustrated in Fig. 9 B.
Please referring to Figure 10 A, the output voltage standard deviation that calculates according to the Mondicaro analog result in the analogue buffer of its relatively more existing source follower, Chung, two offset cancellation analogue buffers of Kida and the proposed analogue buffer of the present invention.All circuit comprise service load to offset the unsaturation behavior.Compared with prior art, the proposed analogue buffer of the present invention is to comprise broad opereating specification and less deviation in interior advantage and significantly.In addition, deviation still less depends on input voltage, and this has reflected the good compensation of proposed circuit.Output voltage standard deviation and the power consumption relevant with Vbias have been shown among Figure 10 B, and it represents, and Vbias should have appropriate design so that minimum deviation and while power consumption are minimum.
High vulnerability to jamming feature, easy configuration ability, low power consumption and signal timing that source-follower type analogue buffer of the present invention has for the polycrystalline SiTFT changing features change (promptly, unsaturation) minimized ability, it is suitable for driving the load of a plurality of data buss in the active matrix displays.Display has multiple source utmost point follower pattern and intends impact damper to be used for the load capacitance of a plurality of data buss of driving display, and it figure 11 illustrates.Display 1100 comprises panel 1130, gate driving equipment 1110 and source drive equipment 1120.A plurality of gate lines of gate driving equipment 1110 (for example, n gate line 1112
1, 1112
2, 1112
3..., 1112
n) be connected to panel 1130, and a plurality of data lines of source drive equipment 1120 (for example, m data line 1122
1, 1122
2, 1122
3..., 1122
m) be connected to panel 1130, and gate line and data line are connected to each other in the array mode.A plurality of pixels are inserted between the interconnection point of gate line and data line.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining of the present invention.
Claims (9)
1. source-follower type analogue buffer, it comprises:
Holding capacitor, wherein, the first terminal of described holding capacitor is connected to operating voltage source via first switch (S1), and second terminal of described holding capacitor is connected to input voltage (Vin) source via the 3rd switch (S3);
Driving transistors, wherein, the gate terminal of described driving transistors is connected to the described the first terminal of described holding capacitor, the drain terminal of described driving transistors is connected to described operating voltage source, and the source terminal of described driving transistors is connected to described second terminal of described holding capacitor via second switch (S2); And
Service load, wherein, the first terminal of described service load is connected to the described source terminal of described driving transistors and is connected to the lead-out terminal of described source-follower type analogue buffer via the 4th switch (S4), and second terminal of described service load is connected to ground connection, described service load is controlled by bias voltage, and wherein said input voltage source is connected to the described lead-out terminal of described source-follower type analogue buffer via the 5th switch (S5).
2. source-follower type analogue buffer as claimed in claim 1, wherein, described driving transistors is a low-temperature polysilicon film transistor.
3. source-follower type analogue buffer as claimed in claim 1, wherein, described service load is a low-temperature polysilicon film transistor.
4. the compensating operation method of an analogue buffer, described analogue buffer comprises driving transistors and load capacitor, wherein, the holding capacitor and first switch are placed between the gate terminal and source terminal of described driving transistors, and the drain terminal of described driving transistors is connected to operating voltage source, described load capacitor is placed between the contact and ground connection of described switch and described source terminal, wherein, input voltage source is connected to the lead-out terminal of described source-follower type analogue buffer via second switch, and wherein said compensating operation method comprises:
During compensation cycle, described first switch is switched on and described holding capacitor is coupled to described operating voltage source, thereby voltage drop is stored in the described holding capacitor; And
During the data input cycle, in the period 1 in described data input cycle, input voltage is applied to the contact place between described holding capacitor and described first switch, thereby the described gate terminal of described driving transistors is applied in described input voltage and the voltage difference that remains in the described holding capacitor, and the output voltage of described analogue buffer is compensated by the voltage that is stored in the described holding capacitor, and in the described data second rounds in input cycle, described second switch is switched on and described input voltage source is connected to the described lead-out terminal of described source-follower type analogue buffer.
5. compensating operation method as claimed in claim 4 wherein, is stopping the predetermined time interval of described holding capacitor after being coupled to described operating voltage source, and described first switch is disconnected.
6. compensating operation method as claimed in claim 5, wherein, described service load is a low-temperature polysilicon film transistor, and is controlled by bias voltage.
7. display, it has a plurality of source-follower type analogue impact dampers to be used for driving the load capacitance of a plurality of data buss of described display, and each of described source-follower type analogue buffer comprises:
Holding capacitor, the first terminal of wherein said holding capacitor is connected to operating voltage source via first switch (S1), and second terminal of described holding capacitor is connected to input voltage source via the 3rd switch (S3);
Driving transistors, the gate terminal of wherein said driving transistors is connected to the described the first terminal of described holding capacitor, the drain terminal of described driving transistors is connected to described operating voltage source, and the source terminal of described driving transistors is connected to described second terminal of described holding capacitor via second switch (S2); And
Service load, the first terminal of wherein said service load is connected to the described source terminal of described driving transistors and is connected to the lead-out terminal of described source-follower type analogue buffer via the 4th switch (S4), and second terminal of described service load is connected to ground connection, described service load is controlled by bias voltage, and wherein said input voltage source is connected to the described lead-out terminal of described source-follower type analogue buffer via the 5th switch (S5).
8. display as claimed in claim 7, wherein, described driving transistors is a low-temperature polysilicon film transistor.
9. display as claimed in claim 7, wherein, described service load is a low-temperature polysilicon film transistor.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/546,161 | 2006-10-10 | ||
| US11/546,161 US7742044B2 (en) | 2005-08-19 | 2006-10-10 | Source-follower type analogue buffer, compensating operation method thereof, and display therewith |
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| Publication Number | Publication Date |
|---|---|
| CN101162568A true CN101162568A (en) | 2008-04-16 |
| CN101162568B CN101162568B (en) | 2011-05-18 |
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| CN2007101226842A Expired - Fee Related CN101162568B (en) | 2006-10-10 | 2007-07-12 | Analogue buffer, compensating operation method thereof, and display therewith |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101267203B (en) * | 2008-05-06 | 2010-06-02 | 友达光电股份有限公司 | Simulation buffer with voltage compensation mechanism |
| CN104393865A (en) * | 2014-08-07 | 2015-03-04 | 杭州硅星科技有限公司 | Rapid-starting digital output buffer and control method thereof |
| CN105790745A (en) * | 2015-01-08 | 2016-07-20 | 株式会社东芝 | Analog switch and multiplexer |
| CN107196643A (en) * | 2017-05-07 | 2017-09-22 | 长沙方星腾电子科技有限公司 | A kind of analog buffer circuit |
| CN108694899A (en) * | 2017-04-10 | 2018-10-23 | 联咏科技股份有限公司 | The drive integrated circult of display panel and its it is fanned out to compensation method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP2075909A3 (en) * | 2007-12-26 | 2016-10-12 | TPO Displays Corp. | Current sampling method and circuit |
| JP2012256012A (en) * | 2010-09-15 | 2012-12-27 | Semiconductor Energy Lab Co Ltd | Display device |
| TWI454811B (en) * | 2011-05-20 | 2014-10-01 | Innolux Display Corp | Display panel |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3405333B2 (en) * | 1999-10-21 | 2003-05-12 | セイコーエプソン株式会社 | Voltage supply device, semiconductor device, electro-optical device, and electronic apparatus using the same |
| KR100696266B1 (en) * | 2000-08-11 | 2007-03-19 | 엘지.필립스 엘시디 주식회사 | Analog Buffer Device and Method of Driving the Same |
| JP4168668B2 (en) * | 2002-05-31 | 2008-10-22 | ソニー株式会社 | Analog buffer circuit, display device and portable terminal |
| JP4515082B2 (en) * | 2002-12-03 | 2010-07-28 | 株式会社半導体エネルギー研究所 | Analog circuit and display device and electronic device using analog circuit |
| KR101097914B1 (en) * | 2004-05-11 | 2011-12-23 | 삼성전자주식회사 | Analog buffer and display device having the same, method for driving of analog buffer |
| US7221194B2 (en) * | 2005-02-18 | 2007-05-22 | Tpo Displays Corp. | Analog buffers composed of thin film transistors |
| KR101219044B1 (en) * | 2006-01-20 | 2013-01-09 | 삼성디스플레이 주식회사 | DRIVING DEVICE, DISPLAY DEVICE having the same and DRIVING MATHOD of the same |
-
2007
- 2007-07-05 TW TW096124495A patent/TWI371023B/en not_active IP Right Cessation
- 2007-07-12 CN CN2007101226842A patent/CN101162568B/en not_active Expired - Fee Related
- 2007-08-21 JP JP2007214389A patent/JP2008112143A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101267203B (en) * | 2008-05-06 | 2010-06-02 | 友达光电股份有限公司 | Simulation buffer with voltage compensation mechanism |
| CN104393865A (en) * | 2014-08-07 | 2015-03-04 | 杭州硅星科技有限公司 | Rapid-starting digital output buffer and control method thereof |
| CN104393865B (en) * | 2014-08-07 | 2017-07-18 | 杭州硅星科技有限公司 | A kind of quick startup digital output buffer and its control method |
| CN105790745A (en) * | 2015-01-08 | 2016-07-20 | 株式会社东芝 | Analog switch and multiplexer |
| CN105790745B (en) * | 2015-01-08 | 2018-12-18 | 株式会社东芝 | Analog switch and multiplexer |
| CN108694899A (en) * | 2017-04-10 | 2018-10-23 | 联咏科技股份有限公司 | The drive integrated circult of display panel and its it is fanned out to compensation method |
| US10902816B2 (en) | 2017-04-10 | 2021-01-26 | Novatek Microelectronics Corp. | Integrated circuit for driving display panel and fan-out compensation method thereof |
| CN108694899B (en) * | 2017-04-10 | 2022-01-04 | 联咏科技股份有限公司 | Driving integrated circuit of display panel and fan-out compensation method thereof |
| CN107196643A (en) * | 2017-05-07 | 2017-09-22 | 长沙方星腾电子科技有限公司 | A kind of analog buffer circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI371023B (en) | 2012-08-21 |
| JP2008112143A (en) | 2008-05-15 |
| TW200818103A (en) | 2008-04-16 |
| CN101162568B (en) | 2011-05-18 |
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