TW200818103A - Analogue buffer, compensating operation method thereof, and display therewith - Google Patents

Abstract

A source-follower-type analogue buffer with an active load, a new compensating operation and a display with the source-follower-type analogue buffers are developed to reduce an error voltage which is the difference between an input voltage and an output voltage of the analogue buffer. The source-follower type analogue buffer can also minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage.

Description

200818103 P2005138 16232-op-twf.doc/n IX. Description of the Invention: [Technical Field] The present invention relates to an analog buffer. More specifically, the present invention relates to a source follower analog buffer using a multi-turn thin film transistor (TFT) for an active matrix display. • [Prior Art] • LTPS (low temperature poly-Si) thin film transistor (TFT, thin film transistor) allows the high-current drive energy to drive the circuit and the active matrix display. The perimeter of the panel is integrated. However, it is well known that since the polycrystalline germanium thin film transistor has relatively poor characteristics and non-uniformity compared to a single scale large scale integrated circuit (LSI), the entire driving circuit is integrated with a polycrystalline germanium thin film transistor (TFT). is very difficult. In the multiple drive circuits of polycrystalline magnets (TFTs), the analog buffer is indispensable for the load capacitance of the data bus in the drive surface. Due to the simplicity of the source-dependent coupling state and low power consumption, it is considered an excellent candidate for analog-like buffer circuits for "on-panel systems, 〇(s〇p, SystemonPanel) applications. Figure 1A The active matrix display uses a typical source follower 100 of the LTpS thin film transistor. The gate of the thin film transistor 110 in the source follower 100 is coupled to the input voltage Vin, and the drain of the thin film transistor 110 is coupled. To the operating voltage Vdd, the source of the thin film transistor 110 is lightly coupled to ground via the load capacitance jfload). Figure 1B shows the waveform of the output voltage Vcmt of the source with the lighter 1 (8). Observable, the final output voltage v〇ut Not 5 200818103 P2005138 16232-op-twf.doc/n remains constant, but will exceed the value of vin_vth expected in principle, where Vth is the threshold voltage of TFT 110. It is attributed to the sub-threshold current. Figure ic shows 'the drain current (Id) and the voltage (Vgs) curve between the gate and the source of the thin film transistor 11 ,, the subcritical _ of the LTps thin film transistor is G.3V/dee This is more than a metal oxide semiconductor field effect transistor (MOSFET, met The sub-threshold swing of the al-oxide_semic〇nduct〇r field (10) c (j transistor) is much larger (〇〇6v/dec). Thus, the typical source is turned over with 1(H) as the active matrix display. , will be sensitive to the charging time of various product specifications (such as active turn-to-display frame rate) 'and can not have a constant output voltage. Figure 2A shows the other source of the use of polycrystalline silicon thin film transistor in the conventional liquid crystal display The pole is reduced. The source package and the bump, the capacitor α and the plurality of „_84. body= the node N1 i ^ which is connected to the input voltage Vin is light, that is, N1 is connected to the node N2 under the control of the switch S2, and is connected to the thin film electricity. Under the control of the crystal group off S3, it is connected to the closed end of the node m2 at the opening point 进一步 and further connected to the node N4." One terminal of the package and the thin film transistor M2 ^ Ψ 卽 point Ν 4 at the switch S4 Controlled to connect to the data around the node Ν4 # voltage potential is ^ Lai Beike line. Thin film electro-crystal Wei: 200 output voltage _. The drain is connected to the node (10) (rounded the last surname milk crystal, and M2 "sub". Box transistor Μ 2 is pM 〇s point N4. u pole connection The operation touches Vdd and is connected to the section of the section. See Figure 2β for the relationship between the input and the output of the battery 虔ν_ 6 200818103 P2005138 16232-op-twf.doc/n, such as the reference symbol 210. As shown in the ideal case of the source follower, the output voltage Vout should be the same as the input voltage Vin. However, in the actual case, there is an error voltage, that is, a difference between the input voltage Vin and the output voltage Vout. As shown by the reference component symbol 22A, it is shown that when the input voltage Vin increases, the output voltage v〇ut is not the same as the input voltage wn, and if the input Vin changes from 2·5ν to 8V, the error voltage is at =iV to Floating between 175 mV. If the output voltage of the source follower is large for the drive of the display (eg 1 〇 V), the drive operation is severely affected. However, ^ is small for the drive of the display voltage (for example, w =). The job error voltage can be applied to the step voltage, and I will have a serious impact on the display quality. SUMMARY OF THE INVENTION: Coupling: Type: providing source polarization with a payload and minimizing changes in input voltage "X: device characteristics" for driving a display; The buffer ratio buffer includes a storage capacitor, and a load capacitor. The first of the capacitances p: drive the transistor and the payload. Stored in the capacitor crying μ ΐ! By the brother-switch connected to the operating power I source, Chu Guang 7 200818103 P2005138 ΐ6232-〇ρ^ά〇ε/η The first of the device:: '. a ^ ^儿芏", and the source terminal of the driving transistor is connected to the second terminal of the drive valley via the second. The first terminal of the payload is on the face of the crying type: the crystal source terminal is connected to the source connection via the fourth switch, the wheel terminal of the buffer, and the second terminal of the payload is crying than the buffer There is a load controlled by the bias voltage, where the source is connected to the source of the lighter type analog buffer = = via the fifth switch to the source with the light type voltage drop storage switch and the second switch is turned on, thus _ shift To the middle and = input side and the third switch and the fourth pull-up switch and the second switch are disconnected, applying the wheel-in voltage and the voltage of the gate terminal of the second drive transistor being held in the storage capacitor by the wheel Poor, and thus soil, in one embodiment of the invention, compensates for the method of operation. The analog buffer contains the driver: the 储存 buffer's complement storage capacitor and the first-to-switch ampere-free and load-capacitor. : 'The load capacitor is placed between the switch and the source. The source is versatile with the converter type buffer, and the 'core to ground' to the source follower type analog buffer; the 'terminal = the first, the switch connection method is included in the compensation period, the compensation operation is transferred to the operating surface 4 is turned on to read the capacitor t. In the data entry cycle, the voltage-free drop is stored during the storage entry cycle, during the data entry cycle 8

ϋ 200818103 P2005138 16232>op.twf.d〇c/n The input voltage is applied to the junction between the gate of the storage diode and thus the gate of the transistor, the voltage difference in the valley 'And analog buffer: the voltage compensation in the storage capacitor, and ^I ' is stored in the second switch is turned on and the source follower type is ^ 2 = two cycles, connected to the source with _ The transmission is slower than the enchantment; the terminal is described in detail in the [Embodiment] port description. Wei Cry Ben ί: A source-slave type analog buffer with a payload, and a new reconciliation operation method developed to reduce the difference between the error voltage between the input voltage and the output voltage of the analog buffer. The source is matched with the analog buffer H to maximize the variation of the charge_ and device (4) and maximize the input voltage range. On February 16, 2006, the application name was

A source follower is proposed in the "SOURCE-FOLLOWER TYPE ANALOGUE BUFFER COMPENSATING OPERATION METHOD THEREOF! AND DISPLAY THEREWITH" patent application No. 11/356,160, the entire disclosure of which is incorporated herein by reference. Become part of this manual. As shown in Figure 3A, a payload 320 is added which is a thin film transistor. The payload 320 is designed to have a larger channel length (L) to minimize direct current (DC) current and reduce the kink effect. The output voltage Vout waveform is shown in Fig. 3B. Obviously, the output voltage vout is reduced by the non-saturated 200818103 P2005138 16232-op-twf.doc/n and phenomenon. As a result, the source with the payload, with the lighter, 300 has the characteristics of resistance to charging time. However, if the proposed source follower of FIG. 3A is directly applied to the analog buffer of the active matrix display, then for the application to consider changes in the LTPS thin film transistor (eg, threshold voltage or mobility, then, Please refer to Figure 3C''''''''''''''''''''''''' Huge change. = See Figure 4A, which is described as having an effective: household == rush 1 400 '. It is also proposed in the above patent application that the source 酼 coupler type analog buffer, payload 420, load capacitor Body 日, 日山 2 + 贞戟420 is the 溥膜电晶o body and ·& is constantly biased at voltage potential Vbias. Node N1 connected to Vin is connected to storage capacitor by N2 under the control of switch S3 One end

Connect to the dazzle, control the next step - step to connect the point N5. The node N3 is connected to the other "P,, t51NJ gate terminal of the storage capacitor 44A, and is connected to the node N4 at the node (10) of the control body 410 of the _丨 to the operating power (4). Drain terminal. Node N, the source terminal of the copper drive transistor 410_, and the gate 4^ load 420 and the drive transistor per thousand and under the control of _S4 are further connected to the node 200818103 P2005138 16232-〇p-twf. Doc/n, section, N6 is connected to the load capacitor 43〇. The output of the node N6 is analogous to the output of the buffer 400. The potential is minimized in the above-mentioned patent application _ proposes a change in the complement feature and causes the charge to say 'in the figure 4b and the circle 4c, the alternative proposal = ίΓί Γ analog buffer 11 _ to see the figure . The gate of the thin film transistor of ί (2: ν: ί load 420 is just constantly biased under the electric 'voltage position vbias. During the compensation period T1, mf power and S2 are turned on from time t0 to time u, and S1 si is disconnected. At the end of the compensation period T1 (ie, time 曰2: off is disconnected. Thus 'the voltage drop is stored in the library capacitors and crying U S2 during the data input T2, the input voltage v The π potential and applied to the node milk, and the gate terminals of the switches S3 and S4 ^ 軏 transistors 4U) are applied with a voltage difference in the input voltage storage capacitor 440. The voltage 1 is idle and the voltage held in the capacitor 440 Compensation. 'The rain output voltage is stored in the storage. For other-compensation operation proposal, please refer to Figure 4C together with Figure 4 (4) 0. At time t0, the voltage is higher than the gate voltage of the buffered film transistor. 4 During the compensation period T1 of the load 420, the switch is biased. It is turned on. At the end of the compensation period T1 (in the instant ^ _ period T1 is disconnected. Therefore, the voltage drop is stored in the storage and between the weeks _ , the input voltage is two in the data input to the node m, and the switches S3 and S4 and the force application port 5 The voltage of the input voltage Vi tip is applied to the gate terminal of 200818103 P2005138 16232-op-twf.doc/n. Therefore, the voltage is compensated by the voltage in the crying container. The saving power is 440. Considering the error voltage (which is the difference between the class and the output voltage), the present input voltage is shown in FIG. 5A, and the present invention has a right-to-type structure. The analog-type buffer 500 is the present invention. Preferred source = the decoupler type analog buffer includes a drive transistor 5iG, a surface storage capacitor 530, and a plurality of switches S1 to S5. Driving a body, a crystal such as a low temperature polycrystalline slab film; = 疋 = = crystal 'and the gate terminal is biased under the voltage Vbias _ Ο 的 的 的 Ο 进一步 进一步 Ο Ο Ο Ο Ο Ο Ο Ο Ο Ο 节点 节点 节点 节点 节点 节点 节点 节点 节点 节点 节点 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ The intermediate terminal ^ is connected to the node voltage Vdd under the control of the switch S1 and is also connected to the drain source of the driving transistor 51A. The point N5 is connected to the payload 520 and the driving transistor 510. _ + and under the control of the % control step into the node N6. The compensation operation method of "reducing the error voltage between the electric L and the output voltage, and minimizing the charging time and the variation of the device and making the input voltage range For example, 'I will show an embodiment of the invention for the principle of operation. The first analog buffer 5' shown in Fig. 5A refers to Figure sB. At time =, the film as the payload 520 The gate voltage of the transistor is constantly biased at voltage · bit Vbms. During the compensation period T1, the switch is turned on from time t 〇 to time t1, and at time t1, the switch w is switched off. At the end of the compensation period T1 (i.e., time t2), the switch is turned off. Thus, the electric material is stored in the storage capacitor 53A. During the data input period T2, from time t2 to time β(4), the input voltage Vin is converted to a logic high level and applied to the node m, and the gate terminal of the driving transistor 510 is applied to the input county vln. The voltage and the voltage difference maintained in the storage capacitor 53A. Therefore, the output voltage is 仏 stored in the storage capacitor 53A. During the data input period T2, the period 时间 = and s: from time t3 to time w, and the switch S5 is turned on to turn the voltage V(10) I to the input voltage Vin. From the time t3 of the period t3, the output f voltage Vout# is matched with the human voltage Vi = slow === with 』===:: analogy of the variable source follower type analog buffer 500 The input and read-out methods can minimize the charging_and device characteristics and maximize the input voltage_. The charging time of the analog-type analog buffer 500 is less than 15 叩 seconds = the conventional source is 撼 (4) The money is larger than the current (4) charging) ^ As shown in Fig. 6A, the charging time is about 8. Please refer to FIG. 6B, which shows that the proposed source has a linear relationship between the input voltage Vin of the lighter 500 and the input voltage Vin of the output voltage (10) and the output voltage Vout = the input voltage Vin and the output The voltage difference between the voltages Vout is significantly reduced; the source-supplement analog buffer and method proposed by the thinker reduce the error voltage. Please refer to phase W again, and the relationship between the source voltage and the input voltage in the analog buffer is applied. The error voltage is reduced below 〇 〇 5 (5 〇〇e: 〇 2 - which is lower than the analogy of the analogy

The same as the voltage difference. TJ ϋ Figure 7A shows that when the input voltage is 4V, w or 6v, the source of Figure 5a is similar to the light type 11 analogy, and its f is not a source _ type analog buffer. 500 analog output voltage (ν_) f shape and operating time. In order to study the influence of equipment changes on the performance of the circuit, the emperor value is assumed to be a normal distribution of Monte Carlo, and the critical value is 2, and the deviation of the port mobility is 1 V, 1 V, 77.1 cm2/vs. And 20 (10)=. In the circuit simulation, each of the LTPS thin film transistors is independently changed. By comparing the source of Fig. 2A with the result of the gradual change, it is apparent that the source σ σ 00 is more than the source hopper type analog buffer 5 (8) of Fig. 5A. More changes due to changes in the LTPS film transistor. 14 200818103 P2005138 16232-op-twf.doc/n The source follower type analog buffer of the present invention has high immunity characteristics, simple configuration capability, low power consumption and signal timing variation for polycrystalline germanium transistor crystal characteristics. The ability to minimize (ie, non-saturation). The source of the present invention is suitable for use in an effective matrix display, such as an active matrix liquid crystal display (AMLCD, active liquid crystal display) or an active matrix organic light display (AMOLED, active matrix organic light). In particular, the source follower type analog buffer of the present invention is suitable for "on-panel systems, applications of [AMLCD or AMOLED." In a driving circuit using a polycrystalline silicon film transistor, The proposed analog buffer is indispensable for the load capacitance of the data bus in the drive panel. Several conventional source follower type analog buffers with payloads are proposed in the art. Please refer to FIG. 8A, which has Chung's analog buffer of the payload and its principle of operation (H j cj^g, sw Lee and C. ' Han ' IEE Electronics Letters, Vol. 37, p. 1093, 2001), and Figure 8B The result of the Monte Carlo simulation of the output voltage change. Please refer to Figure 9A again, which will show the payload.

Kida's analog buffer state (γ· Kida, Y·Nakajima, M. Takatoku, Μ·Mengegishi, S. Nakamura, Υ·Maki and Τ·Maekawa, EURODISPLAY, p. 831, 2002), and its Monte Carlo The simulation results are also shown in Figure 9B. Referring to FIG. 10A, the analog source follower 'chung's analog buffer, K i da's double offset cancellation analog buffer, and the proposed analog buffer are calculated according to Monte Carlo simulation results. The output power 15 200818103 P2005138 16232-op-twf.doc/n to show the deviation i. All circuits contain a payload to counteract the unsaturated behavior. /, the prior art, the present invention _ proposal _ more significant than the buffer ^ operating range and small deviation. In addition, the deviation is + the power M' which reflects the good compensation of the proposed circuit. The diagram should show that Vbias has _output electrical misalignment and power dissipation, which indicates that Vbias should be properly designed to minimize bias and minimize the same rate of consumption. The tree_source__-type buffer has minimized high-disturbance transitions, simple configuration capabilities, low power consumption, and signal timing variations (ie, non-saturation) for polycrystalline thin crystals. Capability of driving a load of multiple data busbars in an active matrix display. The display has a plurality of source-facer analog buffers for driving load capacitance of multiple data busbars in the display. The display 1100 includes a panel 1130, a gate driving device 111A, and a source driving device 1120. A plurality of gate lines of the gate driving device 111G (for example, n interpolar lines 1112!, 11122, 11123, ..., 1112η) is connected to the panel 113A, and a plurality of data lines (for example, m data lines. 11221, 11222, 11223, ..., U22m) of the source driving device 1120 are connected to the panel 113A, and the gate The polar lines and the data lines are connected to each other in an array. A plurality of elements are inserted between the interconnection points of the gate lines and the data lines. The source driver 1120 can include a displacement register η]! Lock circuit 1123, potential shifter 11 25. A digital/analog converter 1127 and a buffer device 1129. The buffer device 1129 includes m buffer units ii29l, 11292, 11293, ..., 1129m for coupling to respective data lines 1122ι, 16 200818103 P2005138 16232-op-twf. Doc/n 11222, 11223, ..., and 1122m. Buffering units 1129, η]%, 11293, ..., 1129m are analog buffers as described in the foregoing embodiments of the present invention. Source follower type of the present invention Analog buffers are suitable for "on-panel systems" (am〇p, System 〇n fine (1) applications for amlcd or AMOLED. In the driver circuit using polysilicon thin film transistors, the proposed analog buffer for the data in the driver panel The load capacitance of the bus bar is indispensable. Although the invention has been disclosed in the preferred embodiment as above, the iron defines the thorn 'any Ryna Lai _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The scope of protection of the present invention is as shown in the accompanying drawings [Simplified description of the drawings] Fig. 1A is a circuit diagram of a typical source in an active matrix display. Ο 电 Ο Figure 1 Β Figure 1 Α source follower wheel Figure 1c shows Waveforms of the pole currents (Id) and ^: The voltage (Vgs) between the pole and the source. The gate of the bonded transistor Figure 2A shows the source follower. : Figure 2A Source follower The turn-off voltage wave will show the source wave broadening with the payload and Figure 3C shows the application to: analog buffer. The individual compensation operation of the buffer benefit. The source follower type analogy is shown in Figure 4. Subhead +', the source of the payload follows the lighter type analog buffer. 17 200818103 P2005138 16232-op-twf.doc/n. Figures 4B and 4C illustrate individual compensation operations applied to the source follower type analog buffer of Figure 4A. The heart f 5A indicates that the source having the payload of the preferred embodiment of the present invention is a type analog buffer. The source of the individual application of the 5A is dependent on the ratio of the buffer to the voltage of the input voltage [Vln and the output voltage V(10) of the source of the pylon _11. Relationship. The input device analog buffer is the result of Figure 3A when the source i-light mode is 4 v, 5 v or 6 v. The Monte Carlo simulation of the 绫 绫 Ο analog 缓冲器 analog buffer is better than the double offset of the buffer, the shirt is simulated with the Vh·2 as the 6 sense analog buffer according to Monte Carlo. The correlation between the standard deviation of the output voltage and the power consumption of Fuyang Figure 8 A纟 will dry 100r »_ The sounding/figure of the operating principle. The chung's analog buffer of the payload and its analogy of the Monte Carlo simulation of the wheel-out voltage of the solid-state buffer Figure 9A, ♦ ι, /, political load of Kida double offset offset Analogy 18 200818103 P2005138 16232-〇p-twf.doc/n Punch. Figure 9 shows the Monte Carlo simulation of the output voltage variation of the double offset offset analog buffer with K i d a payload. FIG. 10A! shows a conventional source flip follower, a Chung (four) ratio buffer, a double offset ratio buffer of =, and an analogy of the present invention. Comparing results. =_ ! Shows Chung's analog buffer, which double offset offset = buffer ϋ and the current estimate of the axis is buffered according to Monte Carlo = Vbias related output voltage standard deviation and power consumption results 0 Fig. 11 shows an embodiment of the invention relating to a display, said display having a plurality of source-H type analog buffers (4) for driving the load capacitance of the bus. / [Main component symbol description] Ο 100 : Source follower 110 : Thin film transistor 200 : Source follower 300 · Source follower 320 : Payload 400, 50G: Source follow-up analog buffer 410, 510 ·• Drive transistor 420 420, 520: Payload 430 · Load capacitor 19 200818103 P2005138 16232-op-twf.doc/n 440, 530 · Storage capacitor 1100: Display 1110: Gate drive device 1112! , 11122, 11123, ..., 1112n: gate line 1120: source drive device 1130 · panel 1122i, 11222, 11223, ..., 1122m: data line 1121: shift register 1123: data latch circuit 1125 · potential Shifter 1127: Digital/analog converter 1129: buffer device 1129, 11292, 11293, ..., 1129m • Buffer unit M1, M2: thin film transistor C1: capacitor S1 to S4: switch

Nl, N2, N3, N4, N5, N6 ··Node T1: compensation period T2: data input period

Cload: load capacitor

Id ·Drain current

Vin : input voltage

Vdd: operating voltage

Vout: output voltage

Vbias ·· Bias 20

Claims (1)

200818103 P2005138 16232-〇p.twf.doc/n X. Patent scope: A source-source follower type analog buffer, the terminal is connected via the == (2), 'the second drive of the storage capacitor') To the input voltage (Vin) source; the storage: 3: the gate terminal of the electro-transistor is connected to the = voltage source, and the source terminal of the driving transistor; and the gate (S2) is connected to The second effective load of the storage capacitor 'the source terminal of the first crystal of the payload and via the fourth switch (s4) is the output terminal of the =ί pole== analog buffer, and The effective negative to ground, the effective load is controlled by the bias voltage, and the source described in item 1 follows the fine analog buffering effect, wherein the effective load is a low temperature polycrystalline thin film transistor. Every "4:: the ratio of the stomach to the stomach of the money, the material is more than the buffering crying transistor and the load capacitor, the cap capacitor is placed between the _ terminal and the source terminal of the drive transistor. The drain terminal of the transistor is connected to the operating electric source, Load 200818103 P2005138 16232-op-twf.doc/n an electric raft container is disposed between the junction of the switch and the source terminal and ground] wherein an input voltage source is coupled to the source with a second switch An output terminal of the analog analog buffer, wherein the compensation operation method comprises: -α during a compensation period, the first switch is turned on and the storage capacitor is coupled to the operating voltage source, and thus the voltage drop is stored In the two-storage capacitor; and during a data input period, during a first period of the data round-in period, an input voltage is applied to a point of the storage capacitor and the first switch' The gate terminal of the transistor is applied with a voltage difference between the input and the scale of the capacitor, and the output power (4) is stored in the storage capacitor and is in the data input period In the second cycle, the second operation mode of the fourth (4) compensation range, wherein the predetermined switch interval after the operation voltage source is disconnected. The method of compensating operation described in claim 5, wherein the low temperature polycrystalline film transistor is controlled by a bias voltage. For the load of each of the packages j having a plurality of source shafts than the buffers, the gates are connected to the gates, wherein the first terminal of the storage capacitors Butterfly switch (81) _ crane, _ object container of the ί 22 200818103 job 138 coffee, the purchase of the terminal is connected to the input voltage source via a third opening (S3); drive transistor, wherein the drive transistor The first terminal of the storage capacitor, the second terminal, the first terminal, the drain of the marine electrodynamic transistor, and the second 〇 payload connected to the storage capacitor by ???(8) Wherein the source terminal of the first drive transistor of the payload is via the fourth output terminal of the analog buffer of the class; the upper: 4 = the second terminal of the load is connected to the ground. The input voltage source of the center is controlled by the fifth switch, and the output terminal of the buffer type analog buffer n is connected with the source of the source according to 8. The electro-op crystal is as described in claim 7 Low temperature polycrystalline germanium thin film transistor. ', not state, wherein the drive 9. If the application scope of the patent application is "a low-temperature polycrystalline slab film transistor. ♦,,,,,,,,,,,