CN101137768B - Surface treatment method for copper and copper - Google Patents
Surface treatment method for copper and copper Download PDFInfo
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- CN101137768B CN101137768B CN2006800079286A CN200680007928A CN101137768B CN 101137768 B CN101137768 B CN 101137768B CN 2006800079286 A CN2006800079286 A CN 2006800079286A CN 200680007928 A CN200680007928 A CN 200680007928A CN 101137768 B CN101137768 B CN 101137768B
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Abstract
A copper surface treatment method is provided to ensure adhesive strength between a copper surface and an insulating layer without forming a recess and a protrusion over 1[mu]m due to copper surface treatment and to improve insulation reliability between wirings. A copper is also provided. The surface treatment method is provided with a step of discretely forming a metal nobler than copper on the copper surface, and a step of successively oxidizing the copper surface by an alkaline solution including an oxidizing agent. The copper whose surface is treated by such method is also provided.
Description
Technical field
The present invention relates to the surface treatment method of copper and be implemented surface-treated copper by this surface treatment method.
Background technology
In recent years, the development of informationized society is surprising, computer in the people's livelihood machine, mobile telephone etc. are towards miniaturization, lightweight, high performance, multifunction development, as industry with the machine relevant of the radio base station of machine, optical communication apparatus, server, router etc. etc. with network, no matter it is large-scale, small-sized, seek the raising of function equally, in addition, be accompanied by the increase of information reception and registration amount, handled signal is arranged year by year towards the tendency of high frequency development, the exploitation of high speed processing and high speed transmission technology is actively carried out.For the relation of installing, actively carry out simultaneously high speed, the multifunction of the LSI of CPU, DSP and various storeies etc., reach chip system (SoC, SYSTEM ON CHIP), package system (SiP, SYSTEMINPACKAGE) exploitation of Denging as new high-density installation technology.Therefore, carry the substrate of semi-conductor chip and motherboard also in order to deal with high frequencyization, high-density distributionization, multifunction, and transfer the multi-layered wiring board that increases layer (built-up) mode that use has formed the following fine distribution of L/S=30 μ m/30 μ m to.
Form the substrate of fine distribution, by removing method (subtractive process) or semi-additive process (semiadditive process) is carried out.
The general distribution that utilization removes method forms operation, is to form etching resistance agent on the copper surface, exposes then, develops and form resist pattern, follows copper that etching do not want, carries out resist and peel off and form distribution.
Utilizing the general distribution of semi-additive process to form operation, is to form plating resistance agent on copper (Seed Layer) surface, exposes then, develops and form resist pattern, follow by electroplate, resist is peeled off and etching forms distribution.
In addition, after these distributions form,, can form solder resist and tectum in distribution in order to protect distribution in addition such as external connection terminals and semi-conductor chip splicing ear.
In order to pass through the rate of formation of these methods raisings with respect to the fine distribution of the design load of L/S width, must form resist pattern according to design, but when the fine distribution below L/S=30 μ m/30 μ m forms, the copper surface that has glossiness in the exposure, because the influence of the halation that luminous reflectance produced, have the problem of the precision that is difficult to obtain resist pattern.
In addition, the power of connecting airtight that has copper surface and resist pattern reduces the problem that resist pattern is peeled off; On the other hand, between distribution (copper) and the solder resist and between distribution and the tectum,, and have the problem that can't obtain sufficient cementability along with the miniaturization of distribution.So in order to address these problems, the matte on copper surface and copper surface are very important with the reinforcement of connecting airtight power of resist.
On the other hand, increase the multi-layered wiring board of layer mode, interlayer insulating film is formed operation and distribution form operation and carry out repeatedly mutually and make.Guarantee in this manufacture method distribution and insulating resin bonding strength, and the insulating reliability of wiring closet very important.
In order to satisfy the characteristic shown in above-mentioned, carry out the copper surface treatment method shown in following at present all the time.
Also promptly, be the copper surface to be invested the alligatoring shape of micron order (micron order), and make the copper mattnessization, and obtain the method for the bonding force of copper surface and resist or copper surface and insulating resin by fixing (anchor) effect.For example, have and use the host that oxygenant constituted that contains by mineral acid and copper, and the aqueous solution of the auxiliary agent that is constituted by at least a azole and at least a etching inhibitor, the copper surface is invested the method (spy of Japan opens the 2000-282265 communique) of micron-sized alligatoring shape; By microetch form highly be the successive of 1.5~5.0 μ m concavo-convex after, impose the method (spy of Japan opens the 9-246720 communique) of chromate treating and coupler processing etc.
In addition, have by the needle crystal that the copper surface is invested fine cupric oxide concavo-convex to form, make the copper mattnessization, and obtain the method for copper surface and resist or copper surface and the bonding force of insulating resin by fixed effect, for example, have and use the alkaline aqueous solution that contains oxygenants such as Textone,, invest the method (the special fair 7-13304 communique of Japan) of the needle crystal of fine cupric oxide by dipping before and after 80 ℃.
In addition, have on the copper surface needle crystal by fine cupric oxide form concavo-convex after, by reducing processing, invest the needle crystal of fine metallic copper, make the copper mattnessization, and obtain the method for the bonding force of copper surface and resist or copper surface and insulating resin by fixed effect.For example, have and use the alkaline aqueous solution that contains oxygenants such as Textone, invest the needle crystal of fine cupric oxide by dipping before and after 80 ℃, and be that the acidic solution of medicine imposes reduction and handles by at least a and boron that has mixed the amine boranes then, invest the method (Japan speciallys permit communique No. 2656622) of the needle crystal of fine metallic copper etc.
Above-mentioned invests micron-sized alligatoring shape to the copper surface, improve first conventional art of the bonding force between copper surface and resist or copper surface and the insulating resin, be that to form Rz in copper surface be the concavo-convex of 1.5~5 μ m, guarantee bonding strength by fixed effect, but, during fine distribution forms, if become the concavo-convex alligatoring shape that surpasses 1 μ m at the narrow and copper interface that connect airtight with resist of L/S, will remove resist fully from the copper surface when then developing has any problem, when follow-up etch processes, have the problem that is short-circuited between copper wiring; In addition, when resist is peeled off, have any problem, so have the copper surface after obtaining and the problem of the connecting airtight property between insulating resin or copper surface and the solder resist because similarly will remove resist fully from the copper surface.In addition, during the gold-plated processing of external connection terminals etc., have not separating out or the uneven problem of plating of plating taken place.
In addition, utilize during the fine distribution of semi-additive process forms, because the Seed Layer thickness of copper is thin, particularly the thickness of the Seed Layer by the formed copper of sputter is 0.1 μ m~1.0 μ m, has the problem that can't make such copper surface become concaveconvex shape.
And, because the distribution surface is concavo-convex for surpassing the alligatoring shape of 1 μ m, when such distribution transmitting high speed electrical signal,, transmits loss and become big problem and have then because surface action and electrical signal are concentrated in the near surface of distribution and transmit.In addition, if become the finer distribution that does not reach L/S=25 μ m/25 μ m, then have distribution and attenuate, the distribution width difference becomes big problem.
The copper surface is invested the needle crystal of fine cupric oxide, improve second conventional art of the bonding strength of copper surface and resist or copper surface and insulating resin, be that surfaceness Rz (mean roughness at ten places) by forming the distribution surface is the concavo-convex of 0.1~1.5 μ m, guarantee bonding strength by fixed effect equally with first conventional art.But, during fine distribution forms, the concavo-convex needle-like shape that becomes on the copper surface of connecting airtight with resist, residual with above-mentioned same because resist, have the problem that wiring closet is short-circuited, can't obtain the problem of the connecting airtight property between copper surface and insulating resin or copper surface and the solder resist, gold-plated not separating out or gold-plated uneven problem takes place.
In addition, utilize during the fine distribution of semi-additive process forms, concavo-convex by forming on the Seed Layer of the formed copper of sputter, but, with above-mentioned same because can't remove resist fully, so the distribution that has on Seed Layer forms inconvenient problem, the problem that wiring closet is short-circuited from the copper surface, can't obtain the problem of the connecting airtight property between copper surface and insulating resin or copper surface and the solder resist, gold-plated not separating out or gold-plated uneven problem takes place.
And it is big that concavo-convex height tolerance becomes, if Rz<0.5 μ m, the problem that the bonding reliability when then having high temperature, high humidity reduces is if Rz>1.0 μ m then have equally with first conventional art and transmit loss and become big problem.In addition, because the needle crystal of cupric oxide is damaged easily,, have the problem of operability difference when handling thin plate so can not carry out horizontal processing.And, in the plating operation that communicating pores connects, because the dissolving of the needle crystal of this cupric oxide, and produce peach circle (pink circle) at the communicating pores periphery, in the short part of wiring closet insulation distance, easily peel off between insulating reliability reduction or copper surface and the insulating resin.In addition, because use the pyritous basic solution, the insulating resin surface is easily invaded, because ionic soil or insulation degradation and insulating reliability reduces easily.In addition, during the oxide treatment after washing, washing between the needle crystal can't fully be carried out because the needle crystal of the complexity of cupric oxide is concavo-convex, has the problem that insulating reliability reduces easily because of the residual ion between the crystallization.
The copper surface is invested the needle crystal of fine metallic copper, improve the 3rd conventional art of the bonding strength between copper surface and resist or copper surface and insulating resin, because in the plating operation that communicating pores connects, do not have the needle crystal dissolved situation of this metallic copper, so generation of no pink circle, but, same with the 2nd conventional art, in fine distribution forms, because resist is residual, have the problem that wiring closet is short-circuited, can't obtain the problem of the connecting airtight property between copper surface and insulating resin or copper surface and solder resist, gold-plated not separating out or gold-plated uneven problem takes place, have high temperature, the problem that bonding reliability during high humidity reduces, transmit loss and become big problem, the problem of operability difference when handling thin plate reduces the problem of insulating reliability because of the ionic soil of insulating material or insulation degradation, because the washing after the oxide treatment and problem that insulating reliability reduces.
Summary of the invention
The objective of the invention is to finish for the problem of improving above-mentioned conventional art, its purpose is to provide a kind of concavo-convex above 1000nm of not forming on the copper surface, and guarantee the bonding strength between copper surface and resist or copper surface and the insulating resin, can improve the surface treatment method of the copper of various reliabilities, and by this processed copper in surface treatment method surface.
It also is the item that following (1)~(12) are put down in writing that is characterized as of the present invention.
(1) a kind of surface treatment method of copper, it has: will be than the copper discrete operation that is formed at the copper surface of metal of inertia (nobler) more; Described copper surface with the basic solution that contain oxygenant carried out the operation of oxide treatment thereafter.
(2) surface treatment method of the copper of being put down in writing as (1), it has also that the reduction of being selected from is handled, coupling is handled, suppresses more than one the operation of processing in the group that corrosion treatment constituted after the operation of oxide treatment is carried out on described copper surface.
(3) surface treatment method of the copper of being put down in writing as (1) or (2), wherein said oxygenant are to be selected from the group that oxymuriate, chlorite, hypochlorite, perchlorate, peracetic dithionite constitute more than one.
(4) as the surface treatment method of each copper of putting down in writing in (1)~(3), wherein should than copper more the inert metal be the metal that is selected from the group that gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium constitutes, or contain the alloy of this metal.
(5) as the surface treatment method of each copper of putting down in writing in (1)~(4), wherein said than copper more the formation amount of inert metal be 0.001 μ mol/dm
2More than and 40 μ mol/dm
2Below.
(6) as the surface treatment method of each copper of putting down in writing in (1)~(5), the roughness Rz on the described copper surface after wherein handling is more than the 1nm and below the 1000nm.
(7) a kind of copper, its be with more the inert metal is discrete than copper be formed at the copper surface after, oxide treatment is carried out with the basic solution that contains oxygenant in described copper surface obtains.
(8) copper of being put down in writing as (7), it is after described oxide treatment, more than one the processing of bestowing and being selected from that reduction is handled, coupling is handled, suppress in the group that corrosion treatment constituted obtains
(9) copper of being put down in writing as (7) or (8), wherein said oxygenant are to be selected from the group that oxymuriate, chlorite, hypochlorite, perchlorate, peracetic dithionite constitute more than one
(10) as each copper of putting down in writing in (7)~(9), wherein said than copper more the inert metal be the metal that is selected from the group that gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium constitutes, or contain the alloy of described metal.
(11) as each copper of putting down in writing in (7)~(10), wherein be formed at the surface described than copper more the amount of inert metal be 0.001 μ mol/dm
2More than and 40 μ mol/dm
2Below.
(12) as each copper of putting down in writing in (7)~(11), the roughness Rz on the described copper surface after wherein handling is more than the 1nm, and below the 1000nm.
Foundation as above-mentioned the present invention, can be provided at the copper surface and not form concavo-convex above 1000nm, and guarantee the bonding strength between copper surface and resist or copper surface and insulating resin, can improve the surface treatment method of the copper of various reliabilities, and by this processed copper in surface treatment method surface.
Moreover, the application is with the Japan's patent application with applicant's first to file, serve as that right of priority is advocated on the basis promptly also, for reference is enrolled these specification sheetss among the application with 2005-069058 number (March 11 2005 applying date), 2005-277732 number (September 26 2005 applying date), 2005-287038 number (September 30 2005 applying date).
Description of drawings
Fig. 1 is the sectional drawing of substrate of using the lift-launch semi-conductor chip of the present invention's example wherein.
Fig. 2 (a)~(g) is the process picture sheet of an example wherein of manufacture method of the substrate of expression lift-launch semi-conductor chip of the present invention.
Fig. 3 is a sectional drawing of using the flip-chip semiconductor encapsulation of the present invention's example wherein
Fig. 4 is a sectional drawing of using the wire-bonded N-type semiconductorN encapsulation of the present invention's example wherein.
Fig. 5 is the orthographic plan that fan-in type of the present invention carries the substrate of semi-conductor chip.
Fig. 6 is the orthographic plan that fan-out type of the present invention carries the substrate of semi-conductor chip.
Fig. 7 is the orthographic plan of frame shape of the substrate of expression lift-launch semi-conductor chip of the present invention.
Fig. 8 is the sectional drawing of substrate of using the lift-launch semi-conductor chip of the present invention's example wherein.
Fig. 9 (a ')~(d ') be the process picture sheet of expression test of the present invention with an example wherein of estimating manufacture of substrates.
Figure 10 (a ')~(d ') be the process picture sheet of expression test of the present invention with an example wherein of estimating manufacture of substrates.
Figure 11 uses the orthographic plan of the galvanic corrosion test of the present invention's example wherein with the evaluation substrate.
Figure 12 uses the orthographic plan of the galvanic corrosion test of the present invention's example wherein with the evaluation substrate.
Embodiment
Below use description of drawings example of the present invention.Herein, as the application examples of the surface treatment method of copper of the present invention, describe as an example wherein with the surface treatment of the copper wiring of the substrate that carries semi-conductor chip, but the treatment process on other copper surface is applicable equally.
(the machicolated form established law on copper surface)
By will more the inert metal is discrete is formed at the copper surface than copper, thereafter oxide treatment is carried out with the basic solution that contains oxygenant in this copper surface, can form micro concavo-convex by crystallization fine and close and cupric oxide uniformly in the copper surface.In addition, after oxide treatment is carried out on this copper surface, reduce processing, can form micro concavo-convex by the crystallization of densification and even metal copper.And, after the above-mentioned oxide treatment, carry out coupling and handle, suppress at least a above in the corrosion treatment and be treated to good.After the above-mentioned oxide treatment, or after the above-mentioned reduction processing, or after the above-mentioned coupling processing, or after the above-mentioned inhibition corrosion treatment, by these the roughened copper surface degree that surface treatment produced of copper, be that Rz (ten place's mean roughness) is preferably more than the 1nm and below the 1000nm, Rz is more preferred from more than the 1nm and below the 100nm in addition, is more preferred from more than the 1nm and below the 50nm again.If Rz, then has the tendency that reduces with the bonding force of resist or insulating resin etc. less than 1nm,, then have the tendency of the problem points of easy generation conventional art if Rz surpasses 1000nm.Moreover, so-called " fine and close and even ", be meant the shape on copper surface is passed through scanning electron microscope (SEM), or process observing device (FIB) by cluster ion beam and process, use scanning ion microscope (SIM) when image is observed, the crystalline of formed cupric oxide or metallic copper size and highly be more than the 1nm and below the 1000nm, its formed crystallization is intensive.
Below describe in detail about above-mentioned respectively handling, moreover in the present invention, as handling before each processing, hope is carried out these processing of the skimming treatment that cleans, cleanup acid treatment or appropriate combination on copper surface and is carried out.
(than copper inert metal forming method more)
As will be than the copper discrete method that is formed at the copper surface of inert metal more, not special the qualification, preferably will be than copper inert metal more, apply, electroplate, replace plating, spraying, coating, sputter, evaporation etc. by electroless plating, be not the copper surface that covers the bottom surface completely, but homodisperse is formed at the copper surface.More preferably will than copper more the inert metal disperse and be formed at the method on copper surface by the displacement plating, the displacement plating be utilize copper with than copper ionization tendency different of inert metal more, thus can be with more the inert metal is easily and the discrete at an easy rate copper surface that is formed at than copper.
As than copper inert metal more, not special the qualification, but can use the metal that is selected from gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium, or contain the alloy of this metal.
In addition, the discrete copper that is formed at is lip-deep above-mentioned than the copper formation amount of inert metal more, not special qualification the, but 0.001 μ mol/dm
2More than and 40 μ mol/dm
2Below be good, formation amount in addition is 0.01 μ mol/dm more preferably
2More than and 10 μ mol/dm
2Below, the formation amount is 0.1 μ mol/dm more preferably
2More than and 4 μ mol/dm
2Below.If the formation amount is less than 0.001 μ mol/dm
2, then have the tendency that is not easy to form densification and equal micro concavo-convex, if surpass 40 μ mol/dm
2, then have the tendency that bonding strength reduces.Moreover, than the copper discrete amount that is formed at the copper surface of inert metal more, be after making the lip-deep precious metal dissolving of copper by chloroazotic acid, to use the atom extinction photometer that this lysate is carried out quantitative analysis, calculate thus.In addition, so-called " dispersing " is meant not to be the copper surface precious metal that is covered fully, but with 0.001 μ mol/dm
2More than and 40 μ mol/dm
2The following formed precious metal of amount is scattered on the copper surface.
(oxidation treatment method on copper surface)
The present invention be as above-mentioned will than copper more the inert metal is discrete be formed at the copper surface after, oxide treatment is carried out with the basic solution that contains oxygenant in this copper surface.
As the above-mentioned basic solution that contains oxygenant, not special the qualification, but for example be preferably in the basic solution that contains basic metal or alkaline-earth metal etc., contain the basic solution of the oxygenant of oxymuriate, chlorite, hypochlorite, perchlorate, peracetic dithionite etc. again.The above-mentioned basic solution that contains basic metal or alkaline-earth metal etc. for example can add the alkali metal compound of sodium hydroxide, potassium hydroxide, yellow soda ash etc. and alkali earth metallic compound and obtains in water or the solvent via water of ion exchange resin treatment etc.In addition, above-mentioned oxygenant more specifically, can be enumerated for example clorox, Textone, sodium chlorate, sodium perchlorate, potassium hypochlorite, potassium chlorite, Potcrate, potassium perchlorate, peroxo disulfate acid ammonium, potassium peroxydisulfate, sodium peroxydisulfate etc.In addition, also can in above-mentioned basic solution, add phosphoric acid salt, as spendable phosphoric acid salt, not special the qualification, but can enumerate for example tertiary sodium phosphate, Tripotassium phosphate, tricresyl phosphate lithium etc., and, also can in above-mentioned basic solution, add known organic acid or sequestrant.
By with as the above-mentioned basic solution that contains oxygenant carry out oxide treatment, can form concavo-convexly in the copper surface by the crystallization of cupric oxide, the crystallization content of cupric oxide is 0.001mg/cm
2More than and 0.3mg/cm
2Below be good, be more preferred from 0.01mg/cm
2More than and 0.2mg/cm
2Below, good especially is 0.03mg/cm
2More than and 0.1mg/cm
2Below.The cupric oxide crystallization content is less than 0.001mg/cm
2, then have resist and peel off, and with the tendency that the bonding force of insulating resin reduces, surpass 0.3mg/cm
2, then have the tendency of the problem points of easy generation conventional art.Moreover, in the formed cupric oxide crystallization content in copper surface, be to investigate by measuring the electrolytic reduction amount, the copper that for example imposes oxide treatment uses 0.5mA/cm as the effect utmost point (negative electrode)
2Certain electric weight switch on, the current potential of measuring the surface potential autoxidation copper of copper changes till the current potential that becomes metallic copper fully, also promptly measure up to become-stable current potential below the 1.0V till the required time, can calculate the cupric oxide crystallization content by its electrolytic reduction amount.
In addition, the temperature of this basic solution when carrying out oxide treatment by the above-mentioned basic solution that contains oxygenant is not particularly limited, but carries out to good with 20~95 ℃, is preferably with 30~80 ℃ to carry out, and is more preferred from 40~60 ℃ and carries out.In addition, about the concentration of the basic solution that contains oxygenant and the oxidation treatment time by this solution, select suitable condition to make the crystallization content of above-mentioned cupric oxide become 0.001mg/cm
2More than and 0.3mg/cm
2Below be good.
(method of reduction treatment)
Because by above-mentioned oxide treatment in the formed cupric oxide crystallization in copper surface produce concavo-convex, can be treated as the concavo-convex of metallic copper by reduction, this reduction is handled can to use at pH and is adjusted in 13.5 the basic solution by 9.0, add the aqueous solution of formaldehyde, paraformaldehyde, aromatic aldehyde compound etc., add the aqueous solution of Hypophosporous Acid, 50 or hypophosphite etc., add dimethyamine borane or contain the aqueous solution of its compound etc., add hydroborons salt or contain the aqueous solution etc. of its compound etc.More specifically, can use HIST-100 (Hitachi changes into Industries, Inc's system, comprises trade(brand)name HIST-100B and HIST-100D) etc. to handle the solution of usefulness as above-mentioned reduction.In addition, as represented herein basic solution, not special the qualification, but for example be the basic solution that contains basic metal or alkaline-earth metal etc.Be described in more detail, can in water or solvent, add the alkali metal compound of sodium hydroxide, potassium hydroxide, yellow soda ash etc. or alkali earth metallic compound and obtain via water of ion exchange resin treatment etc.
In addition, aforesaid method is the method with the chemical mode reductive copper oxide, in addition, and also can electric mode reductive copper oxide.
(coupling processing)
After the above-mentioned oxide treatment, in order to improve the bonding strength of copper surface and insulation layer (increasing layer etc.), can carry out coupling and handle, system is handled in this coupling can thus, can improve cementability in above-mentioned reduction processing back and following inhibition corrosion treatment aftertreatment.Handle employed coupler as coupling, for example can enumerate that silane is that coupler, aluminium are that coupler, titanium are that coupler, zirconium are coupler, these can use a kind or and with more than 2 kinds.Be that coupler is good with silane again wherein, as silane is coupler, for example be preferably the functional group person who has epoxy group(ing), amido, sulfydryl, imidazolyl, vinyl or methacrylic acid group etc. in the molecule, in addition, above-mentioned coupler is to be used in the solution mode that contains it, be used in the solvent of the adjustment of this coupler solution, not special the qualification can make water, alcohol, ketone etc.In addition, in order to promote the hydrolysis of coupler, can add acid such as a spot of acetate or hydrochloric acid.In addition, the content of coupler is for coupler solution integral body, is preferably 0.01 quality %~5 quality %, is more preferred from 0.1 quality %~1.0 quality %.By the processing of coupler, be by in as above-mentioned coupler solution, flooding the copper that becomes process object the method for copper spraying or coating coupler solution etc. to be carried out through adjusting.In addition, the copper that above-mentioned use silane coupling agent is handled carries out drying by seasoning, heat drying or vacuum-drying, according to the difference of the kind of employed coupler, can wash before drying or ultrasonic cleaning.
(inhibition corrosion treatment)
After the above-mentioned oxide treatment, in order to suppress the corrosion of copper, can suppress corrosion treatment, this inhibition corrosion treatment is to handle back or above-mentioned coupling processing aftertreatment in above-mentioned reduction.As suppressing the employed corrosion inhibitor of corrosion treatment, not special the qualification, for example so long as organic compounds containing sulfur or the organic compounds containing nitrogen person contained more than at least a kind get final product, as corrosion inhibitor, not special the qualification, be preferably contain at least a above compound or the intramolecularly that contains just like sulphur atoms such as sulfydryl, sulfide base or disulfide groups and contain-N=or N=N or-NH
2The compound of organic compounds containing nitrogen.
As the above-mentioned compound that contains just like the sulphur atom of sulfydryl, sulfide base or disulfide group, for example can enumerating, aliphatics mercaptan (has (CH with HS-
2) (n is 1 to 23 integer to n-R in the formula, R represents univalent organic radical, hydrogen base or halogen atom) shown in structure, R is preferably any of amido, amide group, carboxyl, carbonyl, hydroxyl, but be not limited thereto, can enumerate alkyl, the carbon number 1~8 of carbon number 1~18 alkoxyl group, acyloxy, alkylhalide group, halogen atom, hydrogen base, alkylthio, thiol group, can substituted phenyl, xenyl, naphthyl, heterocycle etc.In addition, the amido among the R, amide group, carboxyl, hydroxyl can have 1, are preferably more than 1, also can have the substituting group of abovementioned alkyl etc. in addition.Moreover, be preferably n in the use formula and be 1 to 23 the represented compound of integer, and to be more preferred from n be 4 to 15 the represented compound of integer, good especially in addition is 6 to 12 the represented compound of integer.), thiazole derivative (thiazole for example, thiazolamine, thiazolamine-4-carboxylic acid, aminothiophene, benzothiazole, 2-mercaptobenzothiazole, the 2-aminobenzothiazole, 2-amino-4-methylbenzothiazole, 2-[4-morpholinodithio, 2,3-glyoxalidine [2,1-b] benzothiazole-6-amine, 2-(thiazolamine-4-yl)-2-glyoxylic acid oxime ethyl ester, the 2-methylbenzothiazole, 2-phenyl benzothiazole, 2-amino-4-methylthiazol etc.), thiadiazoles derivative (1,2, the 3-thiadiazoles), 1,2, the 4-thiadiazoles, 1,2, the 5-thiadiazoles, 1,3, the 4-thiadiazoles, 2-amino-5-ethyl-1,3, the 4-thiadiazoles, 5-amino-1,3,4-thiadiazoles-2-mercaptan, 2,5-sulfydryl-1,3, the 4-thiadiazoles, 3-methyl mercapto-5-sulfydryl-1,2, the 4-thiadiazoles, 2-amino-1,3, the 4-thiadiazoles, 2-(ethylamino)-1,3, the 4-thiadiazoles, 2-amino-5-ethyl sulphur-1,3,4-thiadiazoles etc.), Thiosalicylic acid, the sulfydryl naphthols, mercapto-phenol, 4-sulfydryl biphenyl, Thiovanic acid, mercaptosuccinic acid, the 3-thiohydracrylic acid, thiouracil, 3-sulfo-urazole, 2-sulphur uramil, 4-sulphur uramil, the 2-mercaptoquinoline, bamic acid, the 1-thiocoumarin, Thiocumothiazon, thiocresol, o-mercaptobenzoic acid, trithiocyanuric acid, thionaphthol, the first thiophene, benzo-thiophene, the benzo-thiophene carboxylic acid, the benzo-thiophene quinone, thiobarbituric acid, the sulfo-quinhydrones, thiophenol, thiophene, the sulphur phthalide, thieno-[2,3-b] thiophene, the thiol carbothionic acid, sulphur moves lutidone, the thiol Histidine, 3-carboxyl propyl disulfide thing, 2-hydroxyethyl disulphide, the 2-alanine, two thiodiglycol acid, the D-halfcystine, two-tertiary butyl disulphide, thiocyanate ion, thiocyanic acid etc.
As above-mentionedly contain at least a above intramolecularly and contain-N=or N=N or-NH
2Organic compounds containing nitrogen compound and preferred compound is triazole derivative (1H-1,2, the 3-triazole, 2H-1,2, the 3-triazole, 1H-1,2, the 4-triazole, 4H-1,2, the 4-triazole, benzotriazole, the amino benzotriazole of 1-, 3-amino-5-sulfydryl-1,2, the 4-triazole, 3-amino-1H-1,2, the 4-triazole, 3, the 5-diaminostilbene, 2, the 4-triazole, the 3-Oxy-1,2, the 4-triazole, amino urazole etc.), terazole derivatives (tetrazyl, the tetrazyl hydrazine, 1H-1,2,3, the 4-tetrazolium, 2H-1,2,3, the 4-tetrazolium, 5-amino-1H-tetrazolium, 1-ethyl-1,4-dihydroxyl 5H-tetrazolium-5-ketone, 5-sulfydryl-1-methyl tetrazolium, tetrazolium mercaptan etc.);
Oxazole derivatives (
Azoles,
The azoles base,
Azoles quinoline, benzo
Azoles, 3-amino-5-methyl are different
Azoles, 2-sulfydryl benzo
Azoles, 2-amino
Azoles quinoline, the amino benzo of 2-
Azoles etc.),
Oxadiazole derivative (1,2,3-
Diazole, 1,2,4-
Diazole, 1,2,5-
Diazole, 1,3,4-
Diazole, 1,2,4-
Bisoxazoline-5-ketone, 1,3,4-
Bisoxazoline-5-ketone etc.),
Triazole derivative (1,2,3,4-
Triazole, 1,2,3,5-
Triazole etc.), purine derivative (purine, 2-amino-6-hydroxyl-8-purinethol, 2-amino-6-methyl mercapto purine, 2-sulfydryl VITAMIN B4, the sulfydryl xanthoglobulin, purinethol, uric acid, guanine, VITAMIN B4, xanthine, theophylline, Theobromine, caffeine etc.), imdazole derivatives (imidazoles, benzoglyoxaline, 2-mercaptobenzimidazole, 4-amino-5-imidazolyl carboxylic acid acid amides, Histidine etc.), indazole derivatives (indazole, the 3-indazolone, indazole alcohol etc.), pyridine derivate (2-mercaptopyridine, aminopyridine etc.), pyrimidine derivatives (2-mercaptopyrimidine, the 2-aminopyrimidine, the 4-aminopyrimidine, 2-amino-4, the 6-dihydroxy-pyrimidine, 4-Amide-6-hydroxy-2--mercaptopyrimidine, 2-amino-4-hydroxy-6-methylpyrimidine, 4-Amide-6-hydroxy-2--methylpyrimidine, 4-amino-6-hydroxyl-pyrazolo [3,4-d] pyrimidine, 4-amino-6-sulfydryl pyrazolo [3,4-d] pyrimidine, the 2-hydroxy pyrimidine, 4-sulfydryl-1H-pyrazolo [3,4-d] pyrimidine, 4-amino-2, the 6-dihydroxy-pyrimidine, 2,4-diamino-6-hydroxy pyrimidine, 2,4,6-Triaminopyrimidine etc.), thiourea derivative (thiocarbamide, ethylene thiourea, 2-thiobarbituric acid etc.), amino acid (glycine, L-Ala, tryptophane, proline(Pro), oxyproline etc.), 1,3,4-sulfo-oxadiazoline-5-ketone, 2-sulfydryl-4H-3, the 1-benzo
Piperazine, 2-thiocoumarin, sulfo-asccharin, thiohydantoin, sulphur pyrrole quinoline, γ-sulphur pyrrole quinoline guanidine, guanazole, guanamine,
Piperazine,
Diazine, trimeric cyanamide, 2,4,6-triamino phenol, triaminobenzene, amino indole, quinolylamine, aminothiophene, amino-pyrazol etc.
In addition, the adjustment of the above-mentioned solution that contains corrosion inhibitor can make water and organic solvent.The kind of above-mentioned organic solvent is not particularly limited, but can use the alcohols of methyl alcohol, ethanol, n-propyl alcohol, n-butanols etc., the aliphatic hydrocarbon of the ethers of two-n-propyl ether, two-n-butyl ether, diallyl ether etc., hexane, heptane, octane, nonane etc., the aromatic hydrocarbonss of benzene, toluene, phenol etc. etc. can use a kind or make up these solvents more than 2 kinds.In addition, can add above-mentioned corrosion inhibitor in basic solution that contains above-mentioned oxygenant or coupler solution uses.
In addition, the concentration of the above-mentioned solution that contains corrosion inhibitor, the concentration of 0.1~5000ppm are good, are preferably 0.5~3000ppm, and good especially is 1~1000ppm.The concentration of corrosion inhibitor is less than 0.1ppm, then have the tendency that ion migration suppresses effect, reaches the bonding strength reduction of copper surface and insulation layer, on the other hand, the concentration of corrosion inhibitor surpasses 5000ppm, suppress effect though then can obtain ion migration, the bonding strength of copper surface and insulation layer has the tendency of reduction.Utilization contains the treatment time of the solution of corrosion inhibitor, not special the qualification, but be preferably according to the difference of the kind of corrosion inhibitor and concentration and suitable variation in addition, can be carried out ultrasonic cleansing after handling.
(resist)
Resist used in the present invention can be enumerated etching resistance agent, plating resistance agent, solder resist, tectum etc.Etching resistance agent and plating resistance agent, owing to being forms purpose with distribution to use, so distribution peels off after forming, and can not residue on the substrate.Solder resist or tectum are to be formed at substrate surface in order to protect the distribution beyond external connection terminals and the semi-conductor chip splicing ear etc.These resists can use aqueous or film like, are preferably to have photosensitivity.
(carrying the substrate of semi-conductor chip)
Fig. 1 is the schematic cross-section of an embodiment wherein (single face increases 2 layers on layer) of the substrate of lift-launch semi-conductor chip of the present invention.Herein, though describe increasing layer and also can be formed at two-sided as shown in Figure 8 in case of necessity only to form the example increase layer (interlayer insulating film) at single face.
As shown in Figure 1, the substrate of lift-launch semi-conductor chip of the present invention on the core substrate 100 of the insulation layer that carries this side of semi-conductor chip, forms the 1st distribution 106a that contains semi-conductor chip splicing ear and the 1st interlayer splicing ear 101.On the opposite side of core substrate, formation contains the 2nd distribution 106b of the 2nd interlayer splicing ear 103, the 1st interlayer splicing ear and the 2nd interlayer splicing ear are that the 1st interlayer across core substrate is connected with IVH (INTERSTITIAL VIA HOLE) 102 to be electrically connected.Form on the 2nd distribution side of core substrate and increase layer 104, go up the 3rd distribution 106c that formation contains the 3rd interlayer splicing ear in increasing layer, the 2nd interlayer splicing ear is to be connected with IVH108 to be electrically connected across the 2nd interlayer with the 3rd interlayer splicing ear.
When forming a plurality of increase layer, stacked same structure increases the external connection terminals 107 that formations is connected with motherboard on the layer outermost, and then external connection terminals is to be connected usefulness IVH105 with electrical connection across the 3rd interlayer with the 3rd interlayer splicing ear.Not special restriction such as the shape of distribution and the configuration of each splicing ear, but carry in order to make partly lead chip and, can suitably design as the semiconductor packages of purpose.In addition, but common semiconductor chip splicing ear and the 1st interlayer splicing ear etc.And, increase on the layer outermost, insulation-coated 109 (core substrates) of solder resist etc. can be set in case of necessity
The material of core substrate is not particularly limited, but can use organic substrate, ceramic base material, silicon substrate, glass baseplate etc.Considering thermal expansivity and insulativity, is good to use pottery and glass then.Non-photosensitive glass in the glass can be enumerated soda-lime glass (composition example: SiO
265~75wt%, Al
2O
30.5~4wt%, CaO 5~15wt%, MgO 0.5~4wt%, Na
2O 10~20wt%), pyrex (composition example: SiO
265~80wt%, B
2O
35~25wt%, Al
2O
31~5wt%, CaO5~8wt%, MgO 0.5~2wt%, Na
2O 6~14wt%, K
2O 1~6wt%) etc.In addition, can enumerate Li as photosensitive glass
2O-SiO
2Contain as the gold ion of sensitizer and silver ions in the based crystallized glass.
As organic substrate, can use to make the substrate and the resin film of the material that contains resin pickup in the woven fiber glass stacked.As employed resin, can use thermosetting resin, thermoplastic resin or these hybrid resin, but be good with heat cured organic insulation.As thermosetting resin, can use resol, urea resin, melamine resin, Synolac, acrylic resin, unsaturated polyester resin, diallyl phthalate ester resin, Resins, epoxy, polybenzimidazole resin, polyamide resin, polyamide-imide resin, silicone resin, by cyclopentadiene institute synthetic resin, the resin that contains three (2-hydroxyethyl) isocyanuric acid ester, by aromatic nitrile synthetic resin, 3 dimerization aromatic series diamino cyanogen resins, the resin that contains the triallyl trimethacrylate, furane resin, ketone resin, xylene resin, the thermosetting resin that contains fused-ring aromatic, benzocyclobutane olefine resin etc.As thermoplastic resin, can enumerate polyimide resin, polyphenylene oxide (POLYPHENYLENEOXIDE) resin, polyphenylene sulfide (Polyphenylene sulphide) resin, arylamine resin (ARAMIDRESIN), liquid crystalline polymers etc.
Also can add packing material in these resins.Can enumerate silicon-dioxide, talcum, aluminium hydroxide, aluminum borate, aluminium nitride, aluminum oxide etc. as packing material.
The thickness of core substrate is 100~800 μ m, the Yan Weijia by the viewpoint of IVH formation property, and also 150~500 μ m are for better.
(increasing layer)
Interlayer insulating film (increasing layer) the 104th is become by insulating material, can use thermosetting resin, thermoplastic resin or these hybrid resin as insulating material.In addition, increasing layer, to be preferably with heat cured organic insulation be main composition, as thermosetting resin, can enumerate resol, urea resin, melamine resin, Synolac, acrylic resin, unsaturated polyester resin, diallyl phthalate ester resin, Resins, epoxy, polybenzimidazole resin, polyamide resin, polyamide-imide resin, silicone resin, by cyclopentadiene institute synthetic resin, the resin that contains three (2-hydroxyethyl) isocyanuric acid ester, by aromatic nitrile synthetic resin, 3 dimerization aromatic series diamino cyanogen resins, the resin that contains the triallyl trimethacrylate, furane resin, ketone resin, xylene resin, the thermosetting resin that contains fused-ring aromatic, benzocyclobutane olefine resin etc.As thermoplastic resin, can enumerate polyimide resin, polyphenylene oxide (POLYPHENYLENE OXIDE) resin, polyphenylene sulfide (Polyphenylene sulphide) resin, arylamine resin (ARAMID RESIN), liquid crystalline polymers etc.
Also packing material can be added in the insulating material, silicon-dioxide, talcum, aluminium hydroxide, aluminum borate, aluminium nitride, aluminum oxide etc. can be enumerated as packing material.
(thermal expansivity)
Be preferably the thermal expansivity of semi-conductor chip and the thermal expansivity of core substrate and be similar to, and the thermal expansivity of core substrate is approximate with the thermal expansivity that increases layer, but not limited thereto.And, with semi-conductor chip, core substrate, the thermal expansivity separately when being set at α 1, α 2, α 3 (ppm/ ℃) that increases layer, be preferably α 1≤α 2≤α 3.
Particularly, it is good that the thermalexpansioncoefficient 2 of core substrate is 7~13ppm/ ℃, is more preferred from 9~11ppm/ ℃.It is good that the thermalexpansioncoefficient 3 that increases layer is 10~40ppm/ ℃, is more preferred from 10~20ppm/ ℃, and good especially is 11~17ppm/ ℃.
(Young's modulus)
From stress demulcent viewpoint, increase the preferred 1~5GPa of Young's modulus of layer to thermal stresses.For the packing material that increases in the layer, preferred suitably adjust its addition, become 10~40ppm/ ℃, Young's modulus and become 1~5Gpa and add so that increase the thermal expansivity of layer.
(carrying the manufacture method of the substrate of semi-conductor chip)
For the substrate that carries semi-conductor chip, following manufacture method capable of being combined is made.The order of manufacturing process only is otherwise breaks away from purpose scope of the present invention, just has no particular limits.
(distribution formation method)
Formation method as distribution, have on the core substrate surface or increase and form tinsel on the layer, remove the method (removing method) that does not need part of tinsel with etching, only on core substrate surface or increase necessity place on the layer, form the method (additive process (additive process)) of distribution by plating, on core substrate surface or increase and form thin metal layer (Seed Layer) on the layer, form necessary distribution with the electrolysis plating then after, with the method (semi-additive process) of etching removal thin metal layer.
(forming) by the distribution that removes method
The place that becomes distribution on tinsel forms etching resistance agent, to the place of exposing from etching resistance agent, and the spraying chemical etching liquor, tinsel is not removed in etching, can form distribution.When for example using Copper Foil as tinsel, etching resistance agent is to use the etching resistance agent material that can be used in general wiring board.For example resist printing ink is formed etching resistance agent after via silk screen printing, or etching is hindered agent to be pressed on the Copper Foil with the negative-type photosensitive dry film layer, overlapping photomask on it according to distribution shape transmitted light, expose with ultraviolet ray, remove unexposed local back with developing solution and form etching resistance agent.Chemical etching liquor can use employed chemical etching liquor in the general wiring board of solution, ammonium persulfate solution of solution, ferric chloride Solution, sulfuric acid and the hydrogen peroxide of cupric chloride and hydrochloric acid etc.
(distribution by additive process forms)
In addition, distribution is only to form at core substrate or the place that increases the necessity on the layer by plating, can use the general distribution formation technology of utilizing plating.For example, make core substrate adhere to electroless plating application catalyzer after, form plating resistance agent at the surface portion that does not carry out plating, impregnated in electroless plating and apply in the liquid, only carry out electroless plating and apply in the place that does not cover plating resistance agent, form distribution thus.
(distribution by semi-additive process forms)
On core substrate surface or increase the method that forms the Seed Layer that is used in semi-additive process on the layer, have by the method for vapour deposition method or plating and the method for applying tinsel, can form the tinsel of the method for removing in addition with same method.
(formation of the Seed Layer by evaporation or plating)
On core substrate surface or increase on the layer and can form Seed Layer by evaporation or plating.For example, when forming bottom surface metal and film copper layer as Seed Layer by sputtering method, be used in the sputter equipment that forms the film copper layer, can use 2 utmost point sputters, 3 utmost point sputters, 4 utmost point sputters, magnetron sputtering, mirror control sputter (MIRRORTRON SPUTTERING) etc.As the employed target of sputter, in order to ensure driving fit, the metal that for example uses Cr, Ni, Co, Pd, Zr, Ni/Cr, Ni/Cu etc. imposes the sputter of thickness 5~50nm as the bottom surface metal.Can copper be target then, impose the sputter of thickness 200~500nm and form Seed Layer.In addition, also can or increase the copper that applies formation 0.5~3 μ m thickness on the layer by electroless plating on the core substrate surface.
(method of applying tinsel)
Core substrate or increase layer when having binding function, can form Seed Layer by tinsel pressurization and lamination are fitted, but, thin metal layer is a difficulty very because directly fit, therefore have after the thick tinsel of fitting by etching etc. and carry out the method for thinning, and fit with the method for peeling off carrier layer after the tinsel of carrier.For example, have as the former, three layers of Copper Foil of carrier copper/nickel/film copper can use alkaline etching liquid to remove carrier copper, use nickel etching solution to remove nickel.Can use with aluminium, copper, insulating material etc. as the strippable Copper Foil of carrier etc. as the latter, can form the following Seed Layer of thickness 5 μ m.In addition, but the also Copper Foil of coating thickness 9~18 μ m makes thickness become equal thinness below the 5 μ m by etching, and forms Seed Layer.
State in the use on the formed Seed Layer of method, make plating resistance agent form necessary figure, form distribution by copper electroplating, then, peel off plating resistance agent, can form distribution by removal Seed Layer such as etchings at last across Seed Layer.
(formation of distribution)
The not special restriction of the shape of distribution, but at least carry on the semiconductor chip side comprise semi-conductor chip splicing ear 16 (wire-bonded terminal etc.), on its opposition side, comprise with motherboard with the external connection terminals (places of lift-launch solder sphere etc.) of electricals connection, the expansion distribution that is connected these, interlayer splicing ear etc.In addition, the configuration of distribution is also without particular limitation, but the fan-in type formed external connection terminals 19 than place, semi-conductor chip splicing ear 16 insides that can be (omissions such as internal layer distribution, interlayer splicing ear) as shown in Figure 5 carries the substrate of semi-conductor chip, and the fan-out type that as shown in Figure 6 side outside semi-conductor chip splicing ear 16 has formed external connection terminals 19 carries the substrate of semi-conductor chip, or makes up these types and also can.Moreover, among Fig. 5 and Fig. 6,13 is that semiconductor packages zone, 14 is that chips welding film bonding region (flip-chip type), 15 zones (flip-chip type) for the lift-launch semi-conductor chip, 17 are chips welding film bonding region (wire-bonded type), 18 zones (wire-bonded type) for the lift-launch semi-conductor chip, and 20 are the expansion distribution.In addition, about the shape of semi-conductor chip splicing ear 16, so long as can wire-bonded or flip-chip connection etc., not special restriction.In addition, fan-out, any type of fan-in, but all wire-bonded connection or flip-chip connections etc.And also can form in case of necessity and the semi-conductor false figure 21 (with reference to figure 6) to be electrically connected not, the shape of false figure and configuration are also also without particular limitation, and it is good being disposed at the zone of carrying semi-conductor chip equably.Thus, when using the wire-bonded caking agent to carry semi-conductor chip, be difficult for producing the space, can improve reliability.
(through hole)
Multiwalled carries the substrate of semi-conductor chip, in order to have a plurality of wiring layers, can be provided for through hole (VIA HOLE) to be electrically connected each layer distribution, through hole can by be provided for connecting core substrate or increase the layer the hole, form with this hole of fillings such as conductive paste and plating.The working method in hole has, the dry ecthing method of punch press and brill first grade mechanical workout, laser processing, the chemical milling processing of passing through soup, use plasma body etc.
In addition,, also have in advance increasing and use conductive paste and plating etc. to form conductive layers on the layer, use pressurization etc. to be laminated in method on the core substrate etc. it as the through hole method of formationing that increases layer.
(insulation-coated formation)
External connection terminals side at the substrate that carries semi-conductor chip can form insulation-coated, formation about figure, if the material of varnish shape then can be undertaken by printing,, be preferably and use photosensitive solder resist, coverlay film, film like resist in order to ensure higher precision.Material can be used the material of epoxy system, polyimide system, epoxy acrylate system, fluorenes system.
Have contraction during such a insulation-coated because sclerosis, only form then that substrate easily produces big bending in single face, therefore, in case of necessity can in the substrate that carries semi-conductor chip two-sided go up form insulation-coated.And warpage is to change along with insulation-coated thickness, and can not to produce warpage be good so two-sided insulation-coated thickness is adjusted to.At this moment, it is good studying the back two-sided insulation-coated thickness of decision in advance.In addition, if slim semiconductor packages, then insulation-coated thickness is that 50 μ m are following preferable, and 30 μ m are following for better.
(plating of distribution)
To the necessary plating that partly can impose nickel, gold in regular turn of distribution, also can carry out the plating of nickel, palladium, gold in case of necessity.To being used for semi-conductor chip splicing ear and motherboard or the external connection terminals of other semiconductor packages with distribution, implement these platings to be electrically connected.This plating can use electroless plating to apply or any of electrolysis plating.
(carrying the manufacture method of the substrate of semi-conductor chip)
The substrate of such lift-launch semi-conductor chip can be complied with following operation manufacturing.The schematic cross-section of an example wherein of the manufacture method of the substrate of (a)~(g) expression lift-launch semi-conductor chip of the present invention of Fig. 2.But, about the order of manufacturing process, only otherwise break away from the object of the invention scope, not special restriction.
(operation a)
(operation is the operation of making the 1st distribution 106a on the core substrate 100 shown in Fig. 2 (a) a).The 1st distribution 106a for example can make by the following method, soon the copper layer that is formed with the core substrate of copper layer on the single face carries out skimming treatment, after hydrochloric acid or sulfuric acid are cleaned, will than copper more the inert metal promptly be selected from gold, silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, the metal of iridium, or the discrete copper surface that is formed at of the alloy that contains these metals, carry out oxide treatment by impregnated in the alkaline aqueous solution that contains oxygenant, then, on the copper layer of oxide treatment, forming the etching resistance agent of the 1st distribution shape, by cupric chloride and iron(ic) chloride, after etching solution such as sulfuric acid-hydrogen peroxide and the nitric acid-hydrogen peroxide etched copper, remove etching resistance agent.In addition, after the above-mentioned oxide treatment, be preferably and reduce processing, coupling again and handle and suppress more than one processing of corrosion treatment.Howsoever, handle to the Rz on distribution surface and reach more than the 1nm and 1, below the 000nm.If will on core substrate 100, form the copper layer, can after utilizing sputter, evaporation, plating etc. to form the copper film, carry out electro-coppering to reaching desirable thickness.Moreover the 1st distribution 106a contains the 1st interlayer splicing ear 101 and semi-conductor chip splicing ear (with the part of semi-conductor chip to be electrically connected), and the formation method of fine distribution can be used semi-additive process.
(operation b)
Shown in Fig. 2 (b), (operation b) is formed for connecting above-mentioned the 1st interlayer splicing ear 101 to be connected the operation of using IVH102 (through hole) with the 1st interlayer of the 2nd distribution described later.
Become the hole of through hole, when core substrate 100 is the non-photosensitive base material, can be with CO
2The laser radiation of laser, YAG laser, excimer laser etc. forms becoming locating of through hole.By the viewpoint of productivity and through hole quality, be preferably and use CO
2Laser, when IVH aperture during, then more suitable with the YAG laser that can gather laser light less than 30 μ m.Moreover, as the non-photosensitive base material, can enumerate above-mentioned non-photosensitive glass etc., but be not limited to these.In addition, when core substrate 100 is the photosensitivity base material, cover the outer zone of sentencing that becomes through hole, after the irradiating ultraviolet light, become the hole of through hole by thermal treatment and etching, moreover, can enumerate above-mentioned photosensitive glass as the photosensitivity base material, but be not limited thereto.In addition, when core substrate 100 for can carry out the base material of chemical milling processing the time by the soup of organic solvent etc., can form the hole that become through hole by chemical milling.Become the hole of through hole as above-mentioned formation after, for between electric connection layer, carry out in case of necessity this hole by conductions such as conductive paste and platings, being become through hole after desmear handles.
(operation c)
Shown in Fig. 2 (c), (operation c) be with the face of the 1st distribution 106a opposition side of core substrate 100 on form the operation of the 2nd distribution 106b.The 2nd distribution 106b can with 1 distribution opposing face of core substrate 100 on, with above-mentioned (the same practice of operation the 1st distribution a) forms.As the formation method of copper layer, with (operation is a) same, can carry out electro-coppering to reaching desirable thickness by behind the formation copper films such as sputter, evaporation, plating.Moreover the 2nd distribution 106b contains the 2nd interlayer splicing ear 103, and the formation method of fine distribution can be used semi-additive process.
(operation d)
Shown in Fig. 2 (d), (operation d) forms the operation that increases layer (interlayer insulating film) 104 on the face that has formed the 2nd above-mentioned distribution 106b., preferably at first skimming treatment is carried out on the 2nd distribution 106b surface herein, carried out hydrochloric acid or sulfuric acid and clean.Will than copper more the inert metal for example be selected from the metal of gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium or contain the discrete copper surface (on the 2nd distribution 106b) that is formed at of alloy of this metal, carry out oxide treatment in the alkaline aqueous solution that contains oxygenant by impregnated in, then, reduce processing in case of necessity.Carry out then that coupling is handled and suppress at least a above processing of corrosion treatment, it is above and 1 to make the roughness Rz on copper wiring surface become 1nm, below the 000nm.
Then, formation increases layer 104 on core substrate 100 surfaces and the 2nd distribution 106b surface.As increasing layer 104 insulating material, can use as above-mentioned thermosetting resin, thermoplastic resin or these hybrid resin, but be good as main composition with thermosetting material.About increasing the formation of layer 104, when insulating material is the varnish shape, can be undertaken by printing and rotary coating etc., when being film like, can be undertaken by lamination or pressurization etc. as if insulating material.When insulating material contained thermosetting material, it is good that reheat turns to its thermosetting.
(operation e)
Shown in Fig. 2 (e), (operation e) forms the operation that the 2nd interlayer connects the IVH (through hole) 108 of usefulness above-mentioned increasing on the layer 104, and the IVH102 that its formation means also can be connected usefulness with the 1st interlayer of above-mentioned operation (b) similarly carries out.
(operation f)
Shown in Fig. 2 (f), (operation f) forming the increasing on the layer of the above-mentioned the 2nd IVH108, forming the operation of the 3rd distribution 106c.The 3rd distribution 106c can use and the above-mentioned (practice formation that operation the 1st distribution 106a a) is same.As the operation that forms the fine pattern below the L/S=35 μ m/35 μ m, be good with above-mentioned semi-additive process.In addition, increasing on the layer 104, by the method for evaporation or plating, the above-mentioned Seed Layer of formation such as method of applying tinsel is good, at this moment, on this Seed Layer, form the plating resistance agent of necessary figure, after seeing through Seed Layer and utilizing the electrolysis plating to form distribution, peel off plating resistance agent, by removal Seed Layer such as etchings, can form fine distribution at last.
Can repeat (operation d) to (operation f), make more than 2 layers to increase layer 104 as Fig. 2 (g) shown in, at this moment, being formed at the outmost interlayer splicing ear that increases layer becomes external connection terminals 107 (operation g)
Shown in Fig. 2 (g); (operation g) is insulation-coated 109 the operation that is formed for protecting distribution beyond the external connection terminals 107 etc.; as insulation-coated material; can use solder resist; can use heat curing-type or ultraviolet hardening, but but the ultraviolet hardening person who finishes shape against corrosion with precision excellently for good.At first, external connection terminals 107 and distribution in addition etc. thereof is carried out skimming treatment, carry out hydrochloric acid or sulfuric acid then and clean.Then, will than copper more the inert metal promptly be selected from the metal of gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium, or contain discrete formation of alloy of this metal, impregnated in and carry out oxide treatment in the alkaline aqueous solution that contains oxygenant, then, reduce again be treated to good.Can carry out again also then that coupling is handled and suppress at least a above processing of corrosion treatment, in any case but, handle to the Rz on distribution surface and reach more than the 1nm and 1, below the 000nm.Then, externally form solder resist on the part beyond the splicing ear 107, external connection terminals 107 is exposed, see through the 3rd interlayer and connect with IVH105 and the 3rd distribution to be electrically connected.
(carrying the shape of the substrate of semi-conductor chip)
Carrying the shape of the substrate of semi-conductor chip, do not limit, is good but make its frame shape that becomes as shown in Figure 7.Become frame shape by the shape that makes the substrate 22 that carries semi-conductor chip, can carry out the assembling of semiconductor packages more efficiently.Below detailed explanation about preferable frame shape.
As shown in Figure 7, form and semiconductor packages zone 13 (becoming the part of 1 semiconductor packages) to be expert at and to list that each is a plurality of uniformly-spaced to be configured to cancellate block 23.And then at a plurality of row and list and form this block.Only put down in writing 2 blocks among Fig. 7, but also block arrangement can be become reticulation in case of necessity.Herein, the width of the space part that semiconductor packages is interregional is good with 50~500 μ m, and 100~300 μ m are better.And, with follow-up when cutting off semiconductor packages the blade width of employed cutting machine be all the best mutually.
By configuring semiconductor packaging area like this, can effectively utilize the substrate that carries semi-conductor chip.In addition, on the end of the substrate of lift-launch semi-conductor chip, mark 11 grades that form the decision position are good, are preferably the pin hole that communicating pores becomes.The shape of pin hole and configuration can cooperate the apparatus for assembling of formation method and semiconductor packages to select.
And it is good forming reinforcement figure 24 on side outside the interregional space part of above-mentioned semiconductor packages, the above-mentioned block.After can making in addition, the reinforcement figure fits on the substrate that carries semi-conductor chip, but the metal pattern that the distribution that is preferably and is formed at the semiconductor packages zone forms simultaneously, and, on this surface, impose the plating of the nickel same, gold etc. with distribution, impose insulation-coated better.If the reinforcement figure is so during metal, the plating lead in the time of can being employed as the electrolysis plating.In addition, on side outside the block, the off-position when being used the cutting machine cut-out forms mark 25 for good, so, can make the substrate of the lift-launch semi-conductor chip of frame shape.
(semiconductor packages)
The schematic cross-section of an example wherein of expression flip-chip semiconductor encapsulation of the present invention among Fig. 3.Semiconductor packages of the present invention as shown in Figure 3, be on the substrate of the lift-launch semi-conductor chip of the invention described above, carry semi-conductor chip again,, use to connect that projection 112 connects by flip-chip and to be electrically connected with semi-conductor chip and semi-conductor chip splicing ear.
And as shown in the figure, these semiconductor packages preferably will partly be led chip and carry between the substrate of semi-conductor chip and seal to good with bottom surface packing material 113.The thermal expansivity of bottom surface packing material, though close with the thermal expansivity of semi-conductor chip 111 and core substrate 100 be good, not limited thereto.And be more preferred from (thermal expansivity of semi-conductor chip)≤(thermal expansivity of bottom surface packing material)≤(thermal expansivity of core substrate).And the lift-launch of semi-conductor chip is can use each to reach the adhering film (NCF) that does not contain electroconductive particle to different conductive membrane (ACF) to carry out.At this moment, because do not need to use bottom surface packing material sealing, so better.And, when carrying semi-conductor chip and if use ultrasonic wave because electric be connected to low temperature and can carry out at short notice, so good especially.
In addition, Fig. 4 is the sectional drawing of an example wherein of expression wire-bonded N-type semiconductorN encapsulation of the present invention.The lift-launch of semi-conductor chip though also can use general chips welding thickener, is preferably and uses chips welding film 117.The electrical connection of semi-conductor chip and semi-conductor chip splicing ear is to carry out with the wire-bonded of using golden electric wire 115.The sealing of semi-conductor chip can use semi-conductor to carry out with transfer mode with sealing resin 116.At this moment, though sealing area can only be necessary part, for example the front of sealing semiconductor chips only is preferably sealing semiconductor packaging area integral body as shown in Figure 4.This is to be expert in the semiconductor packages zone and to list in the substrate of a plurality of lift-launch semi-conductor chip of assortment, when substrate and sealing resin 116 are cut off with cutting machine etc. simultaneously, and special effective means.
In addition, in order to be connected with electricity, externally for example can carry solder ball 114 on the splicing ear 107 with motherboard.Use SnPb63 in the solder ball and do not have Pb scolding tin.As the method that solder ball is fixed in external connection terminals 107, though for example can use N
2Reflow device etc., but be not to be defined in this.
On the substrate of above-mentioned lift-launch semi-conductor chip, carry a plurality of semiconductor packages that a plurality of semi-conductor chip became, use cutting machine etc. to cut into the discrete semiconductor packages at last.
[embodiment]
(embodiment)
Below explain the present invention based on embodiment, but the present invention is not limited to these.
(embodiment 1)
In order to estimate the reliability of the semiconductor packages of using copper surface treatment made of the present invention, make the semiconductor packages sample via the following practice.
(operation a)
Prepare the thick soda-lime glass substrate (thermal expansivity 11ppm/ ℃) of 0.4mm as core substrate 100, behind the copper film by sputter formation 200nm on the single face, be electroplated to the thickness that reaches 10 μ m with electro-coppering, moreover, the device model MLH-6315 that sputter is to use Japanese vacuum technique limited-liability company system carries out according to the condition 1 of the following stated.
Electric current: 3.5A
Voltage: 500V
Argon flow: 35SCCM (0.059Pam
3/ s)
Pressure: 5 * 10
-3Torr (6.6 * 10
-1Pa)
Film forming speed: 5nm/ second
Then, on the part that becomes the 1st distribution 106a, form etching resistance agent, use the iron(ic) chloride etching solution to carry out etching, remove etching resistance agent, form the 1st distribution 106a (comprising the 1st interlayer splicing ear 101 and semi-conductor chip splicing ear).
(operation b)
Till reaching the 1st interlayer splicing ear 101 from the face opposite of the glass substrate that formed the 1st distribution 106a with the 1st distribution 106a, form the hole of aperture 50 μ m as IVH with laser, laser uses YAG laser LAVIA-UV2000 (Sumitomo heavy-duty machine tool Industries, Inc system, trade(brand)name), with frequency 4kHz, hit conditions several 50, photomask aperture 0.4mm and become the formation in the hole of IVH.Then, the desmear that carries out in the hole is handled.Then, filled conductive thickener MP-200V (Hitachi changes into Industries, Inc's system, trade(brand)name) in this hole makes its sclerosis 30 minutes with 160 ℃, with the 1st interlayer splicing ear 101 on the glass substrate to be electrically connected, form the 1st interlayer and connect with IVH102 (through hole).
(operation c)
In order to be connected with (operation b) formed the 1st interlayer with IVH102 (the 1st through hole) to be electrically connected, on the face of the 1st distribution 106a opposition side of glass substrate, form the copper film of 200nm by sputter after, be electroplated to thickness with electro-coppering and reach 10 μ m, sputter is with (operation a) the same practice is carried out.
Then, with (operation a) similarly forms the etching resistance agent of the shape of the 2nd distribution 106b, uses the iron(ic) chloride etching solution to carry out etching, removes etching resistance agent, forms the 2nd distribution 106b (comprising the 2nd interlayer splicing ear 103).
(operation d)
(operation d-1)
Distribution surface with formed the 2nd distribution 106b side in (operation c), be adjusted to acid degreasing fluid Z-200 (the WORLD METAL corporate system of 200ml/L, trade(brand)name) in, with 50 ℃ of liquid temperature dipping after 2 minutes, dipping carried out the hot water cleaning in 2 minutes in the water of 50 ℃ of liquid temperature, carried out washing in 1 minute again.Then, dipping is 1 minute in the aqueous sulfuric acid of 3.6N, washes 1 minute.
(operation d-2)
To in displacement palladium plating solution SA-100 (Hitachi changes into Industries, Inc, the goods name), flood 3 minutes through the 2nd distribution 106b of above-mentioned treatment process, impose 1.0 μ mol/dm with 30 ℃
2The ratio copper palladium plating of inert metal more, wash after 1 minute, and then in the basic solution that contains tertiary sodium phosphate 10g/L and potassium hydroxide 25g/L, add in the oxidation treatment liquid of Textone 15g/L, with 50 ℃ of dippings 3 minutes, on the 2nd distribution 106b surface, form 0.07mg/cm thus
2The crystallization of cupric oxide.Then, washed 5 minutes, make it with 85 ℃ of dryings 30 minutes.
(operation d-3)
Then, at insulation layer (increase layer) 104 on the face of the 2nd distribution 106b side as between above-mentioned form layers, also be, with the insulating varnish of cyanate based resin composition,, coat with condition 1500rpm on the face of the 2nd distribution 106b side by method of spin coating, after forming the resin layer of thickness 20 μ m, by being heated to till 230 ℃ from the heat-up rate of normal temperature (25 ℃) with 6 ℃/min, kept 80 minutes and make its thermofixation in 230 ℃, what form 15 μ m increases layer 104.
(operation e)
From above-mentioned (operation d-3) is formed increase layer surface of 104 and arrive the 2nd interlayer terminal for connecting 103 till, form the hole that becomes IVH that the aperture reaches 50 μ m with laser, laser uses YAG laser LAVIA-UV2000 (Sumitomo heavy-duty machine tool Industries, Inc system, trade(brand)name), with frequency 4kHz, hit conditions several 20, photomask aperture 0.4mm and become the formation in the hole of IVH.Then, carry out desmear and handle,, in swelling liquid punch ball Bert HALLFLIP4125 (Rohm and Hass electronic material limited-liability company, goods name), after 3 minutes, washed 3 minutes with 80 ℃ of dippings as the desmear treatment process.Then, in desmear liquid punch ball Bert MLB mover 213 (Rohm and Hass electronic material limited-liability company, goods name), with 80 ℃ the dipping 5 minutes, washed 3 minutes.Then, in reduced liquid punch ball Bert MLB216-4 (Rohm and Hass electronic material limited-liability company, goods name), after 3 minutes, washed 3 minutes, make it with 85 ℃ of dryings 30 minutes with 40 ℃ of dippings.
(operation f)
For increasing on the layer 104 of in above-mentioned (operation d-3), forming, form the IVH108 of the 3rd distribution 106c and the 2nd, increasing the Ni layer (bottom surface metal) that forms thickness 20nm on the layer 104 by sputter, on this Ni layer, form the film copper layer of thickness 200nm again, formed Seed Layer thus, sputter is to use the Japanese vacuum technique system MLH-6315 of limited-liability company, carries out according to following condition 2.
Condition 2
(Ni layer)
Electric current: 5.0A
Voltage: 350V
Argon flow: 35SCCM (0.059Pam
3/ s)
Pressure: 5 * 10
-3Torr (6.6 * 10
-1Pa)
Film forming speed: 0.3nm/ second
(film copper layer)
Electric current: 3.5A
Voltage: 500V
Argon flow: 35SCCM (0.059Pam
3/ s)
Pressure: 5 * 10
-3Torr (6.6 * 10
-1Pa) film forming speed: 5nm/ second
Then,, use method of spin coating coating plating resistance agent PMERP-LA900PM (chemical industry limited-liability company, trade(brand)name are answered in Tokyo), form the plating blocking layer of thickness 10 μ m at (on the film copper layer) on the Seed Layer.Then, with the plating blocking layer with 1000mJ/cm
2Condition exposure after, in PMER developing solution P-7G,, form the resist pattern of L/S=10 μ m/10 μ m with 23 ℃ of dippings 6 minutes.Then, use copper sulfate bath to carry out electro-coppering, form the about 5 μ m of thickness the 3rd distribution 106c.Peeling off of plating resistance agent is to use methyl ethyl ketone to carry out 1 minute dipping in normal temperature (25 ℃).In addition, the fast-etching of Seed Layer is to use 5 times of diluents of CPE-700 (Mitsubishi gas chemistry limited-liability company system, trade(brand)name), shakes by carrying out 30 seconds dippings with 30 ℃, and its etching is removed, and forms wiring graph.
(operation g)
Then, repeat once more (operation d)~(operation f), form one deck again and contain the outermost distribution that increases layer and external connection terminals 107.
Form solder resist 109 at last, then, external connection terminals 107 and semi-conductor chip splicing ear are imposed gold-plated processing, the substrate of lift-launch semi-conductor chip of the fan-in type BGA shown in shop drawings 1 (1 encapsulates the sectional drawing of part), Fig. 5 (orthographic plan of 1 encapsulation part) and Fig. 7 (carrying the substrate overall diagram of semi-conductor chip).
(operation h)
(operation is a)~(operation g) on the semiconductor-chip-mounting zone of the substrate of the lift-launch semi-conductor chip of made by above-mentioned, the semi-conductor chip 111 that connects projection 112 will be formed, the use flip-chip engages, while add the number that ultrasonic wave is only carried to be needed.And, in the gap of substrate that carries semi-conductor chip and semi-conductor chip, inject the bottom surface from the semi-conductor chip end and fill (underfill) material 113, use baking oven to reach with 150 ℃ of 2 underhardenings that carry out 4 hours with 80 ℃ of 1 underhardenings that carried out 1 hour.Then, lead, the tin SnPb63 ball 114 with diameter 0.45mm uses N
2The reflow device is melting adhered on external connection terminals 107.At last, use the cutting machine of the blade that width 200 μ m have been installed to cut off the substrate that carries semi-conductor chip, make semiconductor packages as shown in Figure 3.
(embodiment 2)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, (Hitachi changes into Industries, Inc's system at reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, washed again 10 minutes, with outside 30 minutes the reduction treatment process of 85 ℃ of dryings, all the other use the practice identical with embodiment 1 to make fan-in type BGA with the substrate and the semiconductor packages of carrying semi-conductor chip with it.
(embodiment 3)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, in the γ-An Jibingjisanyiyangjiguiwan 0.5 quality % aqueous solution, flooded 3 minutes with 30 ℃, washed again 1 minute, with outside 30 minutes the coupling treatment process of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner with it, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 4)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, at 2-amino-6-hydroxyl-8-purinethol (with the pure pharmaceutical worker of light industry limited-liability company system, trade(brand)name) concentration is in the ethanolic soln of 10ppm, flooded 10 minutes with 25 ℃, washed again 1 minute, with it with outside 30 minutes the inhibition corrosion treatment operation of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 5)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, in 3-amino-5-sulfydryl-1,2, the 4-triazole is (with the pure pharmaceutical worker's industry of light limited-liability company system, trade(brand)name) concentration is in the ethanolic soln of 10ppm, flooded 10 minutes with 25 ℃, washed again 1 minute, with outside 30 minutes the inhibition corrosion treatment operation of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner with it, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 6)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, in 2-amino-6-hydroxyl-8-purinethol (with the pure pharmaceutical worker of light industry limited-liability company system, trade(brand)name) concentration is in the ethanolic soln of 10ppm, flooded 10 minutes with 25 ℃, washed again 1 minute, with it with 30 minutes inhibition corrosion treatment operation of 85 ℃ of dryings, and then be carried out in the γ-An Jibingjisanyiyangjiguiwan 0.5 quality % aqueous solution with 30 ℃ of dippings 3 minutes, washed again 1 minute, with it with outside 30 minutes the coupling treatment process of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 7)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, in the γ-An Jibingjisanyiyangjiguiwan 0.5 quality % aqueous solution, flooded 3 minutes with 30 ℃, washed again 1 minute, with it with 30 minutes coupling treatment process of 85 ℃ of dryings, and then be carried out at 3-amino-5-sulfydryl-1,2, the 4-triazole is (with the pure pharmaceutical worker's industry of light limited-liability company system, trade(brand)name) concentration is with 25 ℃ of dippings 10 minutes in the ethanolic soln of 10ppm, washed again 1 minute, with outside 30 minutes the inhibition corrosion treatment operation of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner with it, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 8)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, wash 10 minutes reduction treatment process again, and then be carried out in the γ-An Jibingjisanyiyangjiguiwan 0.5 quality % aqueous solution with 30 ℃ of dippings 3 minutes, washed again 1 minute, with it with outside 30 minutes the coupling treatment process of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 9)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, wash 10 minutes reduction treatment process again, and then be carried out at 2-amino-6-hydroxyl-8-purinethol (with the pure pharmaceutical worker's industry of light limited-liability company system, trade(brand)name) concentration is with 25 ℃ of dippings 10 minutes in the ethanolic soln of 10ppm, washed again 1 minute, with it with outside 30 minutes the inhibition corrosion treatment operation of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 10)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, wash 10 minutes reduction treatment process again, and then be carried out at 3-amino-5-sulfydryl-1,2, the 4-triazole is (with the pure pharmaceutical worker's industry of light limited-liability company system, trade(brand)name) concentration is with 25 ℃ of dippings 10 minutes in the ethanolic soln of 10ppm, washed again 1 minute, with outside 30 minutes the inhibition corrosion treatment operation of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner with it, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(embodiment 11)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, wash 10 minutes reduction treatment process again, and then be carried out at 2-amino-6-hydroxyl-8-purinethol (with the pure pharmaceutical worker's industry of light limited-liability company system, trade(brand)name) concentration is with 25 ℃ of dippings 10 minutes in the ethanolic soln of 10ppm, washed again 1 minute, with it with 30 minutes inhibition corrosion treatment operation of 85 ℃ of dryings, and then be carried out in the γ-An Jibingjisanyiyangjiguiwan 0.5 quality % aqueous solution, flooded 3 minutes with 30 ℃, washed again 1 minute, with outside 30 minutes the coupling treatment process of 85 ℃ of dryings, all the other are used with the embodiment 1 identical practice and make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip with it.
(embodiment 12)
Except in (operation d-2) after the crystallization that forms cupric oxide on the surface of the 2nd distribution 106b, in (operation d-3), form and increase before the layer 104, carry out the 2nd distribution 106b surface washing 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, wash 10 minutes reduction treatment process again, and then be carried out in the γ-An Jibingjisanyiyangjiguiwan 0.5 quality % aqueous solution with 30 ℃ of dippings 3 minutes, washed again 1 minute, with it with 30 minutes coupling treatment process of 85 ℃ of dryings, and then be carried out at 3-amino-5-sulfydryl-1,2, the 4-triazole is (with the pure pharmaceutical worker's industry of light limited-liability company system, trade(brand)name) concentration is in the ethanolic soln of 10ppm, with 25 ℃ the dipping 10 minutes, washed again 1 minute, with outside 30 minutes the inhibition corrosion treatment operation of 85 ℃ of dryings, all the other use the practice identical with embodiment 1 to make fan-in type BGA with the substrate and the semiconductor packages of carrying semi-conductor chip with it.
(embodiment 13)
(Hitachi changes into Industries, Inc except employed displacement palladium plating solution SA-100 in the replacement (operation d-2), the goods name), (Hitachi changes into Industries, Inc and use the golden plating solution HGS-500 of displacement, the goods name), replace in the golden plating solution the 2nd distribution 106b surface with 30 ℃ of dippings 1 minute in this, on the distribution surface with 1.0 μ mol/dm
2Implement as than the copper plating of the gold of inert metal more, wash after 1 minute, be to contain in the basic solution of tertiary sodium phosphate 10g/L and potassium hydroxide 25g/L and added in the oxidation treatment liquid of Textone 15g/L, with 50 ℃ the dipping 3 minutes, on the 2nd distribution 106b surface, form 0.03mg/cm thus
2The crystallization of cupric oxide, then, carried out washing 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, washed 10 minutes, with outside 30 minutes the reduction treatment process of 85 ℃ of dryings, all the other use the practice identical with embodiment 1 to make fan-in type BGA with the substrate and the semiconductor packages of carrying semi-conductor chip with it again.
(embodiment 14)
(Hitachi changes into Industries, Inc except employed displacement palladium plating solution SA-100 in the replacement (operation d-2), the goods name), and use respectively contains the displacement silver plating solution of Silver Nitrate 7.5g/L, ammonium hydroxide 75g/L, Sulfothiorine 5 hydrate 30g/L, replace in the silver-colored plating solution the 2nd distribution 106b surface with 30 ℃ of dippings 20 seconds in this, on the distribution surface with 1.0 μ mol/dm
2Implement as than the copper plating of the silver of inert metal more, wash after 1 minute, be to contain in the basic solution of tertiary sodium phosphate 10g/L and potassium hydroxide 25g/L and add in the oxidation treatment liquid of Textone 15g/L,, on the 2nd distribution 106b surface, form 0.05mg/cm thus with 50 ℃ of dippings 3 minutes
2The crystallization of cupric oxide, then, washed 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) in 40 ℃ the dipping 3 minutes, washed again 10 minutes, with it with outside 30 minutes the reduction treatment process of 85 ℃ of dryings, all the other and embodiment 1 do in the same manner, make substrate and the semiconductor packages of fan-in type BGA with the lift-launch semi-conductor chip.
(comparative example 1)
After the pre-treatment in (the operation d-1) that carried out (operation d), do not carry out the displacement palladium plating in (operation d-2), and the 2nd distribution 106b surface was flooded 3 minutes with 85 ℃ in oxidation treatment liquid, on this distribution surface, form 0.50mg/cm
2The crystallization of cupric oxide outside, all the other use the practice identical with embodiment 1 to make fan-in type BGA with the substrate and the semiconductor packages of carrying semi-conductor chip.
(comparative example 2)
After the pre-treatment in (the operation d-1) that carried out (operation d), do not carry out the displacement palladium plating in (operation d-2), and the 2nd distribution 106b surface was flooded 3 minutes with 85 ℃ in oxidation treatment liquid, on this distribution 106b surface, form 0.50mg/cm
2The crystallization of cupric oxide, then washed 5 minutes, (Hitachi changes into Industries, Inc's system in reduction treatment solution HIST-100D, trade(brand)name) flooded 3 minutes with 40 ℃ in, washed again 10 minutes, with outside 30 minutes the reduction treatment process of 85 ℃ of dryings, all the other use the practice identical with embodiment 1 to make fan-in type BGA with the substrate and the semiconductor packages of carrying semi-conductor chip with it.
(comparative example 3)
After the pre-treatment in carrying out (the operation d-1) of (operation d), do not carry out displacement palladium plating and oxide treatment in (operation d-2), and with the 2nd distribution 106b surface in micro-etching agent (micro etching) Mech-Etch Bond CZ8100 (Mech limited-liability company system, trade(brand)name) flooded 1 minute 30 seconds with 40 ℃ in, after the washing, dipping is 60 seconds in the aqueous sulfuric acid of the 3.6N of normal temperature, washed again 1 minute, with outside 85 ℃ of dryings 30 minutes, all the other are used with the embodiment 1 identical practice and make substrate and the semiconductor packages (comparative example 4) of fan-in type BGA with the lift-launch semi-conductor chip with it
Do not carry out the operation of (operation d-2) after the pre-treatment in carrying out (the operation d-1) of (operation d).Also promptly not carrying out concavo-convex formation handles.In addition, use substrate and the semiconductor packages with the lift-launch semi-conductor chip with embodiment 1 identical practice making fan-in type BGA.
(embodiment 15)
In order to estimate the cementability on the copper surface after the copper surface treatment of the present invention, degree of cleaning, smoothness, glossiness, surface shape, from the electrolytic copper foil GTS-18 of 18 μ m (Furukawa CIRCUIT FOIL limited-liability company system, trade(brand)name) cuts out 5cm * 8cm * a 5 (adhesive test usefulness, the evaluation of copper surface clearness is used, the evaluation of copper surface smoothness is used, the evaluation of copper surface shape is used, copper surface luster is estimated and is used), single face to each electrolytic copper foil, impose the various surface treatments (pre-treatment that the distribution surface of being put down in writing at embodiment 1 (operation d-1) and (operation d-2) is carried out, precious metal forms and oxide treatment), the test film of making electrolytic copper foil.
(embodiment 16)
Except imposing the same surface treatment of being put down in writing with embodiment 2 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and reduction are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 17)
Except imposing the same surface treatment of being put down in writing with embodiment 3 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and coupling are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 18)
Except imposing the same surface treatment of being put down in writing with embodiment 4 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 19)
Except imposing the same surface treatment of being put down in writing with embodiment 5 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 20)
Except imposing the same surface treatment of being put down in writing with embodiment 6 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment and coupling are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 21)
Except imposing the same surface treatment of being put down in writing with embodiment 7 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, coupling are handled and the inhibition corrosion treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 22)
Except imposing the same surface treatment of being put down in writing with embodiment 8 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing and coupling are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 23)
Except imposing the same surface treatment of being put down in writing with embodiment 9 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 24)
Except imposing the same surface treatment of being put down in writing with embodiment 10 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 25)
Except imposing the same surface treatment of being put down in writing with embodiment 11 of each surface treatment to the distribution surface (corrosion treatment and coupling processing are handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 26)
Except imposing the same surface treatment of being put down in writing with embodiment 12 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing, coupling are handled and the inhibition corrosion treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 27)
Except imposing the same surface treatment of being put down in writing with embodiment 13 of each surface treatment to the distribution surface (pre-treatment, precious metal (gold) formation, oxide treatment and reduction are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(embodiment 28)
Except imposing the same surface treatment of being put down in writing with embodiment 14 of each surface treatment to the distribution surface (pre-treatment, precious metal (silver) formation, oxide treatment and reduction are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(comparative example 5)
Except imposing the same surface treatment of being put down in writing with comparative example 1 of each surface treatment to the distribution surface (pre-treatment and oxide treatment), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(comparative example 6)
Except imposing the same surface treatment of being put down in writing with comparative example 2 of each surface treatment to the distribution surface (pre-treatment, oxide treatment and reduction are handled), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(comparative example 7)
Except imposing the same surface treatment of being put down in writing with comparative example 3 of each surface treatment to the distribution surface (pre-treatment and etch processes), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(comparative example 8)
Except imposing the same surface treatment of being put down in writing with comparative example 4 of each surface treatment to the distribution surface (pre-treatment and no concave-convex form and handle), outside surface treatment, make the test film of electrolytic copper foil similarly to Example 15 for electrolytic copper foil.
(experimental example 29)
By the copper surface treatment of the present invention in (operation d), for the insulating resistance value of estimating wiring closet, anti-PCT, as following making evaluation substrate.
(operation a ')
Prepare the thick soda-lime glass substrate (thermal expansivity 11ppm/ ℃) of 0.4mm, as as Fig. 9 and core substrate 100 shown in Figure 10, on the single face as following form layers between insulation layer 104, also be, the insulating varnish of cyanate based resin composition is passed through method of spin coating, coat on the glass substrate with condition 1500rpm, after forming the resin layer of thickness 20 μ m, by being heated to 230 ℃ with the heat-up rate of 6 ℃/min from normal temperature (25 ℃), make its thermofixation in 230 ℃ of maintenances 80 minutes, formed interlayer insulating film 104.(operation a) only forms the copper film 118 of thickness 200nm by embodiment 1 then.
Then, on copper foil membrane, use method of spin coating coating plating resistance agent PMER P-LA900PM (chemical industry limited-liability company, trade(brand)name are answered in Tokyo), form the plating blocking layer of thickness 10 μ m.Then, with the plating blocking layer with 1000mJ/cm
2Condition exposure after, in PMER developing solution P-7G,, form resist pattern 119 with 23 ℃ of dippings 6 minutes, then, use the copper sulfate electroplate liquid to carry out electro-coppering, form the distribution 106 of the about 5 μ m of thickness.Peeling off of plating resistance agent is to use methyl ethyl ketone to carry out 1 minute dipping in normal temperature (25 ℃) and implements.In addition, use 5 times of diluents of CPE-700 (gas chemistry limited-liability company of Mitsubishi system, trade(brand)name) in the fast-etching of Seed Layer, shake, its etching is removed, formed distribution 106 by carrying out 30 seconds dippings at 30 ℃.
(operation d ')
To above-mentioned (operation a ') formed distribution 106, after imposing each surface treatment that embodiment 1 (operation d-1) and (operation d-2) put down in writing (pre-treatment, precious metal form, oxide treatment), form as shown in Figure 9 interlayer insulating film (increasing layer) 104 and solder resist 109 shown in Figure 10 respectively, the evaluation of making L/S=5 μ m/5 μ m shown in Figure 11, L/S=10 μ m/10 μ m shown in Figure 12 is with respectively 32 of substrates.
(embodiment 30)
Except imposing the same surface treatment of being put down in writing with embodiment 2 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 and estimate substrate.
(embodiment 31)
Except imposing the same surface treatment of being put down in writing with embodiment 3 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and coupling are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 and estimate substrate.
(embodiment 32)
Except imposing the same surface treatment of being put down in writing with embodiment 4 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), as above-mentioned (operation d,) in each surface treatment outside, make to estimate substrate similarly to Example 29.
(embodiment 33)
Except imposing the same surface treatment of being put down in writing with embodiment 5 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), as above-mentioned (operation d,) in each surface treatment outside, make to estimate similarly to Example 29 and use substrate.
(embodiment 34)
Except imposing the same surface treatment of being put down in writing with embodiment 6 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment and coupling are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 35)
Except imposing the same surface treatment of being put down in writing with embodiment 7 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 36)
Except imposing the same surface treatment of being put down in writing with embodiment 8 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing and coupling are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 37)
Except imposing the same surface treatment of being put down in writing with embodiment 9 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 38)
Except imposing the same surface treatment of being put down in writing with embodiment 10 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 39)
Except imposing the same surface treatment of being put down in writing with embodiment 11 of each surface treatment to the distribution surface (corrosion treatment and coupling processing are handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 40)
Except imposing the same surface treatment of being put down in writing with embodiment 12 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 41)
Except imposing the same surface treatment of being put down in writing with embodiment 13 of each surface treatment to the distribution surface (pre-treatment, precious metal (gold) formation, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(embodiment 42)
Except imposing the same surface treatment of being put down in writing with embodiment 14 of each surface treatment to the distribution surface (pre-treatment, precious metal (silver) formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(comparative example 9)
Except imposing the same surface treatment of being put down in writing with comparative example 1 of each surface treatment to the distribution surface (pre-treatment and oxide treatment), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(comparative example 10)
Except imposing the same surface treatment of being put down in writing with comparative example 2 of each surface treatment to the distribution surface (pre-treatment, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(comparative example 11)
Except imposing the same surface treatment of being put down in writing with comparative example 3 of each surface treatment to the distribution surface (pre-treatment and etch processes), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate.
(comparative example 12)
Except imposing the same surface treatment of each surface treatment of being put down in writing with comparative example 4 (pre-treatment and no concave-convex form and handle), outside each surface treatment in above-mentioned (operation d '), make similarly to Example 29 to estimate and use substrate the distribution surface.
(embodiment 43)
Resist pattern when forming the pre-treatment use in order to estimate copper surface treatment of the present invention as resist pattern forms property and distribution forms property, as following making evaluation substrate.
(operation a ')
Prepare the thick soda-lime glass substrate (thermal expansivity 11ppm/ ℃) of 0.4mm, as Fig. 9 and core substrate 100 shown in Figure 10, on the single face as insulation layer 104 between following form layers.Also be, the insulating varnish of cyanate based resin composition is passed through method of spin coating, coat on the glass substrate with condition 1500rpm, after forming the resin layer of thickness 20 μ m, by being heated to 230 ℃ with the heat-up rate of 6 ℃/min from normal temperature (25 ℃), make its thermofixation in 230 ℃ of maintenances 80 minutes, formed interlayer insulating film 104.(operation a) only forms copper film 118 by embodiment 1 then.
And to above-mentioned formed copper film 118, (the operation d-1) that impose embodiment 1 reaches each surface treatment (pre-treatment, precious metal formation, oxide treatment) that (operation d-2) put down in writing.
Then,, use method of spin coating coating plating resistance agent PMER P-LA900PM (chemical industry limited-liability company, trade(brand)name are answered in Tokyo), form the plating blocking layer of thickness 10 μ m on copper surface-treated copper foil membrane.Then, with the plating blocking layer with 1000mJ/cm
2Condition exposure after, in PMER developing solution P-7G,, form resist pattern 119 with 23 ℃ of dippings 6 minutes, then, use the copper sulfate electroplate liquid to carry out electro-coppering, form the distribution 106 of the about 5 μ m of thickness.Peeling off of plating resistance agent is to use methyl ethyl ketone to carry out 1 minute dipping in normal temperature (25 ℃) and carries out.In addition, the fast-etching of Seed Layer uses CPE-700 (gas chemistry limited-liability company of Mitsubishi system, trade(brand)name) 5 times of diluents, shake by carrying out 30 seconds dippings with 30 ℃, its etching is removed, form distribution 106, the evaluation of making L/S=5 μ m/5 μ m shown in Figure 11, L/S=10 μ m/10 μ m shown in Figure 12 is with respectively 32 of substrates.
(embodiment 44)
Except imposing the same surface treatment of being put down in writing with embodiment 2 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 45)
Except imposing the same surface treatment of being put down in writing with embodiment 3 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and coupling are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 46)
Except imposing the same surface treatment of being put down in writing with embodiment 4 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 47)
Except imposing the same surface treatment of being put down in writing with embodiment 5 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 48)
Except imposing the same surface treatment of being put down in writing with embodiment 6 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment and coupling are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 49)
Except imposing the same surface treatment of being put down in writing with embodiment 7 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 50)
Except imposing the same surface treatment of being put down in writing with embodiment 8 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing and coupling are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 51)
Except imposing the same surface treatment of being put down in writing with embodiment 9 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 52)
Except imposing the same surface treatment of being put down in writing with embodiment 10 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 53)
Except imposing the same surface treatment of being put down in writing with embodiment 11 of each surface treatment to the distribution surface (corrosion treatment and coupling processing are handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 54)
Except imposing the same surface treatment of being put down in writing with embodiment 12 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 55)
Except imposing the same surface treatment of being put down in writing with embodiment 13 of each surface treatment to the distribution surface (pre-treatment, precious metal (gold) formation, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(embodiment 56)
Except imposing the same surface treatment of being put down in writing with embodiment 14 of each surface treatment to the distribution surface (pre-treatment, precious metal (silver) formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(comparative example 13)
Except imposing the same surface treatment of being put down in writing with comparative example 1 of each surface treatment to the distribution surface (pre-treatment and oxide treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(comparative example 14)
Except imposing the same surface treatment of being put down in writing with comparative example 2 of each surface treatment to the distribution surface (pre-treatment, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(comparative example 15)
Except imposing the same surface treatment of being put down in writing with comparative example 3 of each surface treatment to the distribution surface (pre-treatment and etch processes), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 43 and use substrate.
(comparative example 16)
Except imposing the same surface treatment of each surface treatment of being put down in writing with comparative example 4 (pre-treatment and no concave-convex form and handle), outside each surface treatment in above-mentioned (operation a '), similarly makes the evaluation substrate with embodiment 43 to the distribution surface.
(embodiment 57)
In order to estimate in the copper surface treatment of the present invention whether pink circle takes place, as following making evaluation substrate.
After imposing plating on the copper film 118 that (operation a ') with embodiment 43 similarly forms, carrying out each surface treatment (pre-treatment of (operation a '), precious metal forms, oxide treatment) afterwards, do not carry out distribution and form operation (resist-coating, exposure, develop, electroplate, resist is peeled off, etching), and on the copper surface after this surface treatment, overlappingly the cyanate based resin composition is contained the GXA-67N of the prepreg (PREPREG) that is dipped in the woven fiber glass (Hitachi changes into Industries, Inc's system, trade(brand)name), by being heated to 230 ℃ from normal temperature (25 ℃) with the heat-up rate of 6 ℃/min, kept 1 hour and stacked bonding in 230 ℃ with the pressure of 3.0MPa.
Then, on above-mentioned resulting sandwich,, form the hole of each 20 aperture 0.1mm, 0.2mm, 0.3mm, make to estimate whether pink circle substrate takes place by laser.
(embodiment 58)
Except imposing the same surface treatment of being put down in writing with embodiment 2 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 59)
Except imposing the same surface treatment of being put down in writing with embodiment 3 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, coupling are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 60)
Except imposing the same surface treatment of being put down in writing with embodiment 4 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 61)
Except imposing the same surface treatment of being put down in writing with embodiment 5 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment and inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 62)
Except imposing the same surface treatment of being put down in writing with embodiment 6 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment and coupling are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 63)
Except imposing the same surface treatment of being put down in writing with embodiment 7 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 64)
Except imposing the same surface treatment of being put down in writing with embodiment 8 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing and coupling are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 65)
Except imposing the same surface treatment of being put down in writing with embodiment 9 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 66)
Except imposing the same surface treatment of being put down in writing with embodiment 10 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 67)
Except imposing the same surface treatment of being put down in writing with embodiment 11 of each surface treatment to the distribution surface (corrosion treatment, coupling processing are handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 68)
Except imposing the same surface treatment of being put down in writing with embodiment 12 of each surface treatment to the distribution surface (corrosion treatment is handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction processing, coupling), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 69)
Except imposing the same surface treatment of being put down in writing with embodiment 13 of each surface treatment to the distribution surface (pre-treatment, precious metal (gold) formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(embodiment 70)
Except imposing the same surface treatment of being put down in writing with embodiment 14 of each surface treatment to the distribution surface (pre-treatment, precious metal (silver) formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(comparative example 17)
Except imposing the same surface treatment of being put down in writing with comparative example 1 of each surface treatment to the distribution surface (pre-treatment and oxide treatment), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(comparative example 18)
Except imposing the same surface treatment of being put down in writing with comparative example 2 of each surface treatment to the distribution surface (pre-treatment, oxide treatment and reduction are handled), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(comparative example 19)
Except imposing the same surface treatment of being put down in writing with comparative example 3 of each surface treatment to the distribution surface (pre-treatment and etch processes), outside each surface treatment in above-mentioned (operation a '), similarly make to estimate with embodiment 57 and use substrate.
(comparative example 20)
Except imposing the same surface treatment of each surface treatment of being put down in writing with comparative example 4 (pre-treatment and no concave-convex form and handle), outside each surface treatment in above-mentioned (operation a '), similarly makes the evaluation substrate with embodiment 57 to the distribution surface.
(embodiment 71)
Outward appearance when having carried out gold-plated handle in order to estimate by copper surface treatment of the present invention has been made as following making evaluation substrate.
Carry out shown in the embodiment 2 (operation is a) to (operation f), in (operation g), repeats (operation d) once again to (operation f) then, forms one deck again and comprises and increase layer 104 and the outside outermost distribution that connects terminal 107.
Then, to above-mentioned formed distribution, (the operation d-1) that impose embodiment 1 reaches each surface treatment (pre-treatment, precious metal formation, oxide treatment) that (operation d-2) put down in writing.Form solder resist 109 then, again external connection terminals 107 parts are carried out gold-plated processing, make as Fig. 1 (sectional drawing that 1 encapsulation divides), Fig. 5 (orthographic plan that 1 encapsulation divides), and the represented fan-in type BGA of Fig. 7 (carrying the overall diagram of the substrate of semi-conductor chip) with the substrate that carries semi-conductor chip (evaluation substrate).
Moreover, above-mentioned gold-plated be to carry out according to following (1)~(4) order.
(1) will form evaluation substrate behind the solder resist 109, adjust to acid degreasing fluid Z-200 (the WORD METAL corporate system of 200ml/L at water, trade(brand)name) in 50 ℃ of liquid temperature dipping after 2 minutes, carry out hot water in 2 minutes by dipping in the water of 50 ℃ of liquid temperature and clean, carry out 1 minute washing again.
(2) then in the aqueous sulfuric acid of 3.6N, flooded 1 minute, wash after 1 minute, in displacement palladium plating solution SA-100 (Hitachi changes into Industries, Inc, the goods name), flooded 3 minutes with 30 ℃, optionally impose palladium in external connection terminals 107 parts, washed 1 minute.
(3) then, in non-electrolytic nickel plating solution NIPS-100 (Hitachi changes into Industries, Inc, the goods name), flooded 15 minutes, optionally impose 5 μ m nickel, washed 1 minute in external connection terminals 107 parts with 85 ℃.
(4) then, (Hitachi changes into Industries, Inc in the golden plating solution HGS-500 of displacement, the goods name) flooded 10 minutes with 85 ℃ in, optionally impose 0.05 μ m gold in external connection terminals 107 parts, wash after 1 minute, (Hitachi changes into Industries, Inc in non-electrolysis gold plating solution HGS-2000, the goods name) flooded 40 minutes with 60 ℃ in, optionally impose 0.5 μ m gold in external connection terminals part, washed 5 minutes, make it with 85 ℃ of dryings 30 minutes.
(embodiment 72)
Except imposing the same surface treatment of being put down in writing with embodiment 2 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 73)
Except imposing the same surface treatment of being put down in writing with embodiment 3 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, coupling are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 74)
Except imposing the same surface treatment of being put down in writing with embodiment 4 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 75)
Except imposing the same surface treatment of being put down in writing with embodiment 5 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 76)
Except imposing the same surface treatment of being put down in writing with embodiment 6 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, inhibition corrosion treatment, coupling are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 77)
Except imposing the same surface treatment of being put down in writing with embodiment 7 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 78)
Except imposing the same surface treatment of being put down in writing with embodiment 8 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing and coupling are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 79)
Except imposing the same surface treatment of being put down in writing with embodiment 9 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 80)
Except imposing the same surface treatment of being put down in writing with embodiment 10 of each surface treatment to the distribution surface (corrosion treatment is handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 81)
Except imposing the same surface treatment of being put down in writing with embodiment 11 of each surface treatment to the distribution surface (corrosion treatment, coupling processing are handled, suppressed in pre-treatment, precious metal formation, oxide treatment, reduction), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 82)
Except imposing the same surface treatment of being put down in writing with embodiment 12 of each surface treatment to the distribution surface (pre-treatment, precious metal formation, oxide treatment, reduction processing, coupling are handled and the inhibition corrosion treatment), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 83)
Except imposing the same surface treatment of being put down in writing with embodiment 13 of each surface treatment to the distribution surface (pre-treatment, precious metal (gold) formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(embodiment 84)
Except imposing the same surface treatment of being put down in writing with embodiment 14 of each surface treatment to the distribution surface (pre-treatment, precious metal (silver) formation, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(comparative example 21)
Except imposing the same surface treatment of being put down in writing with comparative example 1 of each surface treatment to the distribution surface (pre-treatment, oxide treatment), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(comparative example 22)
Except imposing the same surface treatment of being put down in writing with comparative example 2 of each surface treatment to the distribution surface (pre-treatment, oxide treatment, reduction are handled), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(comparative example 23)
Except imposing the same surface treatment of being put down in writing with comparative example 3 of each surface treatment to the distribution surface (pre-treatment, etch processes), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
(comparative example 24)
Except imposing the same surface treatment of being put down in writing with comparative example 4 of each surface treatment to the distribution surface (pre-treatment, no concave-convex form and handle), outside each surface treatment in above-mentioned (operation g), similarly make the evaluation substrate with embodiment 71.
Various test samples for as above-mentioned made carry out each evaluation test as the following practice.
(reliability test of semiconductor packages)
22 the semiconductor packages sample separately that embodiment 1~14 and comparative example 1~4 are put down in writing carries out moisture absorption handle after, make each sample with 0.5m/ minute condition by arriving the reflow stove of 240 ℃ of temperature, length 2m, carry out reflow.Then, investigating each sample whether the crack takes place, is NG during generation.The result is shown in table 1.
In addition, 22 semiconductor packages sample separately is installed on the motherboard of thickness 0.8mm, condition with-55 ℃, 30 minutes~125 ℃, 30 minutes is carried out temperature cycling test, in the 500th circulation, the 1000th circulation, the 1500th circulation, use the universal meter 3457A of Hewlett-Packard corporate system, measure the conduction resistance value of distribution.The resistance value of being measured compares with the initial stage resistance value that to change 10% be NG when above.The result is shown in table 1.But, for comparative example 3, can't keep the distribution precision, can't make the test substrate.
(adhesive test)
To can be used as the two sides copper-clad laminates that soaks the woven fiber glass that contains the cyanate based resin composition that low dielectric just meeting the thickness 0.8mm of high heat-resisting multilayer material is that (Hitachi changes into Industries, Inc's system to MCL-LX-67, trade(brand)name) single face, use chemical milling roughening treatment liquid HIST-7300 (Hitachi changes into Industries, Inc's system) to carry out roughening treatment, the roughness Rz that makes the copper surface is 3.5 μ m.Then, on the copper surface of Rz=3.5 μ m stacked the cyanate based resin composition is soaked be contained in woven fiber glass and prepreg (pre-preg) GXA-67N (Hitachi changes into Industries, Inc's system, trade(brand)name), and then on outermost layer 1 of the electrolytic copper foil of stacked embodiment 15~28 and comparative example 5~8 mades, be heated to 230 ℃ from normal temperature (25 ℃) with the heat-up rate of 6 ℃/min with the pressure of 3.0MPa, kept 1 hour in 230 ℃, stacked thus bonding, make the adhesive test substrate.Moreover, above-mentioned electrolytic copper foil be implemented on the various surface-treated face sides bonding with insulation layer (prepreg).
Then, for above-mentioned resulting each adhesive test substrate, measured the cementability of initial stage (0 time), at 150 ℃ of cementabilities after placing 120 hours and 240 hours.Moreover, mensuration as the stripping strength (N/m) of the index of above-mentioned cementability, be to use rheometer NRM-3002D-H (motionless Industries, Inc, trade(brand)name), electrolytic copper foil vertically peeled off with the speed of 50mm/min with respect to substrate carried out.The value of stripping strength is zero when showing the above value of 300N/m, when showing the value less than 300N/m be *.The result is shown in table 2.
(the wash degree evaluation test of copper surface)
For the enforcement of each electrolytic copper foil of embodiment 15~28 and comparative example 5~8 mades surface-treated face side, carry out 85 ℃, 1 hour extraction with pure water 20ml, carry out the positively charged ion and the anionic qualitative analysis of extraction liquid with ion chromatograph.Ion chromatograph is to use Dionex corporate system DX-500, carries out with following condition 2.
Condition 2
The positively charged ion condition determination
Elutriant: 8mmol/L-methanesulfonic
Injection rate: 100 μ L
Separator column: 2mm φ * 250mm lonPac CS14
Detector: conductivity degree meter
The negatively charged ion condition determination
Elutriant: the mixed solution of 2.7mmol/L-yellow soda ash and 0.3mmol/L-sodium bicarbonate
Injection rate: 500 μ L
Separator column: 4mm φ * 200mm lonPac AS12A
Detector: conductivity degree meter
In addition, in above-mentioned extraction liquid, add nitric acid, carry out the quantitative analysis of metal ion with the ICP luminescence analysis.The ICP luminescence analysis is to use SII NanoTechnology corporate system SPS3000 to carry out.Count when the detection of each positively charged ion, negatively charged ion and each metal ion that reaches the degree of detergency shows the above value of 1 μ g/ sheet surely +++, show that 0.1 μ g/ sheet is above and count during less than the value of 1 μ g/ sheet ++, 0.04 μ g/ sheet is above and count during less than the value of 0.1 μ g/ sheet+, count during less than the value of 00.4 μ g/ sheet-.The results are shown in table 3.
(evaluation test of copper surface smoothness)
To the enforcement of the electrolytic copper foil of made in embodiment 15~28 and the comparative example 5~8 surfaceness (Rz) of surface-treated face side, use simple type atomic force microscope (AFM) Nanopics2100, carry out with following condition 3.
Measured length: 1 μ m
Sweep velocity (SCAN SPEED): 1.35 μ m/sec
Mechanics parameter (FORCE REFARENCE): 160
Rz is that the above and following person of 100nm of 1nm be ◎, and Rz is for being zero above 100nm and the following person of 1000nm, and Rz is to be △ less than 1nm or above 1000nm person.The result is shown in table 2.
(evaluation test of copper surface shape)
Investigated the electrolytic copper foil of made in embodiment 15~28 and the comparative example 5~8 enforcement the surface shape of surface-treated face side.By scanning electron microscope (S-4700: 100,000 times observation Hitachi's system), copper surface shape have densification and uniformly concavo-convexly count zero, really not so person is *.The result is shown in table 2.But,,, therefore can't observe the concavo-convex of copper surface because do not carry out (operation d-2) about comparative example 4.
(evaluation test of copper surface luster)
By the enforcement of the electrolytic copper foil of made in visual observation embodiment 15~28 and the comparative example 5~8 surface-treated face side, whether investigate surface luster.Tarnish person counts zero, and glossy person counts *.The result is shown in table 2.
(insulativity of the wiring closet that the copper surface treatment of distribution is produced)
Each that put down in writing for embodiment 29~42 and comparative example 9~12 estimated and use substrate, selects 4 of the evaluation substrates of the broken string of the short circuit of the wiring closet that does not have L/S=5/5 μ m and L/S=10/10 μ m and distribution according to the following practice, the insulating resistance value of mensuration wiring closet.But,,, measure because can't keep the distribution precision for the evaluation substrate of comparative example 11.
At first, use the system R-8340A of ADVANTEST limited-liability company type numeral ultra-high resistance small electric flowmeter, the L/S distribution is at room temperature applied the voltage of 30 seconds DC5V, measure the insulating resistance value of L/S wiring closet.Moreover the determination of insulation resistance that 1G Ω is following is to use the system digit-type volt-ohm-milliammeter 3457A of Hewlett-Packard (HP) limited-liability company.
Then, in remaining in 85 ℃, the constant-humidity constant-temperature layer of relative humidity 85%, the L/S wiring closet is applied the voltage of DC5V continuously, 24h, 48h, 96h, 200h, 500h, 1, behind the 000h with the insulating resistance value of above-mentioned same mensuration L/S wiring closet.Moreover the constant-humidity constant-temperature layer is to use the EC-10HHPS type constant-humidity constant-temperature of Hitachi Co., Ltd's system, drops into the back and measures till 1000 hours.
About as 4 of the evaluation substrates measured of the above-mentioned practice, the minimum value of insulating resistance value during less than 1G Ω is *, 1.0 * 10
9Be zero when Ω is above.The result is shown in table 4, table 5.
(resist pattern formation evaluation test)
In (operation a ') that embodiment 43~56 and comparative example 13~16 are put down in writing, carry out the evaluation that is formed into power of resist pattern 119.Evaluation method is: distribution formation place is not had the unstripped and error design load of each L/S resist width when measuring the formed resist width of the resist of each L/S of the residual or formed resist of resist count non-defective unit for ± 10% with interior person, investigate its ratio.The result is shown in table 6.But for the evaluation substrate of comparative example 15, copper film 118 disappears because carrying out the copper surface treatment, so measure.
(distribution formation evaluation test)
In (operation a ') that embodiment 43~56 and comparative example 13~16 are put down in writing, carry out the evaluation that is formed into power of distribution 106.Evaluation method is: will not have the broken string of the short circuit of wiring closet or distribution and the error of design load 5 μ ms thick with respect to copper facing to count non-defective unit for ± 10% with interior person, and investigate its ratio.The result is shown in table 6.But for the evaluation substrate of comparative example 15, copper film 118 disappears because carrying out the copper surface treatment, so measure.
(anti-PCT evaluation test)
For the evaluation substrate of being put down in writing in embodiment 29~42 and the comparative example 9~12, carried out anti-PCT test (121 ℃, 200h, 0.2MPa).Evaluation method is: will resist between distribution 106 and the insulation layer (increasing layer) 104 after the PCT test, nothing expansion and the person of peeling off count non-defective unit between insulation layer 104 and the insulation layer (increasing layer) 104 and between distribution 106 and the solder resist 109, between insulation layer 104 and the solder resist 109, investigate its ratio.The result is shown in table 7.But, about comparative example 11, because formed distribution disappears, so can't make the test substrate.
(whether the evaluation of pink circle takes place)
Evaluation substrate about being put down in writing in embodiment 57~70 and the comparative example 17~20 floods 3h in 18% hydrochloric acid, the ratio that the peripheral pink circle in investigation hole takes place.The result is shown in table 8.
(evaluation of gold-plated outward appearance and solder resist state)
About the evaluation substrate of being put down in writing in embodiment 71~84 and the comparative example 21~24, visual or by its gold-plated outward appearance of microscopic examination, noly gold-plated count zero when inhomogeneous, have and gold-plated count △ when inhomogeneous, do not count during gold-plated separating out *.In addition,, not having and to peel off and do not have gold-plated separating out and to solder resist, count zero as the state of solder resist, really not so person is *, the result is shown in table 9.
[table 1]
No. | NG number after the reflow test | NG number after the temperature cycling test | |||
500 times | 1,000 time | 1,500 | |||
Embodiment | |||||
1 | 22/22 | 22/22 | 22/22 | 22/22 | |
2 | 0/22 | 0/22 | 0/22 | 0/22 | |
3 | 22/22 | 22/22 | 22/22 | 22/22 | |
4 | 22/22 | 22/22 | 22/22 | 22/22 | |
5 | 22/22 | 22/22 | 22/22 | 22/22 | |
6 | 22/22 | 22/22 | 22/22 | 22/22 | |
7 | 22/22 | 22/22 | 22/22 | 22/22 | |
8 | 0/22 | 0/22 | 0/22 | 0/22 | |
9 | 0/22 | 0/22 | 0/22 | 0/22 | |
10 | 0/22 | 0/22 | 0/22 | 0/22 | |
11 | 0/22 | 0/22 | 0/22 | 0/22 | |
12 | 0/22 | 0/22 | 0/22 | 0/22 | |
13 | 0/22 | 0/22 | 0/22 | 0/22 | |
14 | 0/22 | 0/22 | 0/22 | 0/22 | |
Comparative example | 1 | 22/22 | 22/22 | 22/22 | 22/22 |
2 | 0/22 | 0/22 | 0/22 | 0/22 | |
3 | - | - | - | - | |
4 | 22/22 | 22/22 | 22/22 | 22/22 |
[table 2]
No. | Bonding after 150 ℃ of placements | Property (N/m) | Smoothness | The copper surface shape | Copper surface luster | ||
0h | 120h | 240h | |||||
Embodiment | 15 | ○(900) | ○(850) | ○(710) | ◎ | ○ | ○ |
16 | ○(850) | ○(800) | ○(650) | ◎ | ○ | ○ | |
17 | ○(950) | ○(900) | ○(750) | ◎ | ○ | ○ | |
18 | ○(870) | ○(850) | ○(800) | ◎ | ○ | ○ | |
19 | ○(860) | ○(850) | ○(820) | ◎ | ○ | ○ | |
20 | ○(920) | ○(900) | ○(850) | ◎ | ○ | ○ | |
21 | ○(950) | ○(900) | ○(850) | ◎ | ○ | ○ | |
22 | ○(900) | ○(860) | ○(750) | ◎ | ○ | ○ | |
23 | ○(850) | ○(830) | ○(750) | ◎ | ○ | ○ | |
24 | ○(860) | ○(820) | ○(780) | ◎ | ○ | ○ | |
25 | ○(900) | ○(860) | ○(800) | ◎ | ○ | ○ | |
26 | ○(910) | ○(860) | ○(850) | ◎ | ○ | ○ | |
27 | ○(800) | ○(700) | ○(600) | ◎ | ○ | ○ | |
28 | ○(750) | ○(600) | ○(550) | ◎ | ○ | ○ | |
Comparative example | 5 | ○(1,100) | ○(1,000) | ○(850) | ○ | × | ○ |
6 | ○(1,050) | ○(1,000) | ○(900) | ○ | × | ○ | |
7 | ○(1,200) | ○(1,050) | ○(900) | △ | × | ○ | |
8 | ×(150) | ×(100) | ×(50) | ◎ | - | × |
[table 3]
?No. | Detect thing | |||||||||||||
Positively charged ion | Negatively charged ion | Metal ion | ||||||||||||
Li + | Na + | NH 4 + | K + | Mg 2+ | Ca 2+ | Cl - | Br - | NQ 2 - | NO 3 - | PO 4 3- | SO 4 2- | Fe |
Embodiment | ?15 | - | - | - | - | - | - | - | - | - | - | - | - | - |
?16 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?17 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?18 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?19 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?20 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?21 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?22 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?23 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?24 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?25 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?26 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?27 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
?28 | - | - | - | - | - | - | - | - | - | - | - | - | - | |
Comparative example | ?5 | - | ++ | ++ | ++ | ++ | ++ | +++ | - | ++ | ++ | ++ | +++ | ++ |
?6 | - | ++ | ++ | ++ | ++ | ++ | +++ | - | ++ | ++ | ++ | +++ | ++ | |
?7 | - | ++ | ++ | ++ | ++ | ++ | +++ | - | ++ | ++ | ++ | +++ | ++ | |
?8 | - | - | - | - | - | - | - | - | - | - | - | - | - |
[table 4]
No. | Place the insulating resistance value (Ω) between the L/S=5/5 comb type of back | |||||||
0h | 24h | 48h | 96h | 200h | 500h | 1000h |
Embodiment | 29 | ○ | ○ | ○ | ○ | ○ | ○ | ○ |
30 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
31 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
32 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
33 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
34 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
35 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
36 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
37 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
38 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
39 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
40 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
41 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
42 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
Comparative example | 9 | ○ | ○ | ○ | ○ | ○ | × | × |
10 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
11 | - | - | - | - | - | - | - | |
12 | ○ | ○ | × | × | × | × | × |
[table 5]
No. | Place the insulating resistance value (Ω) between the L/S=10/10 comb type of back | |||||||
0h | 24h | 48h | 96h | 200h | 500h | 1000h |
Embodiment | 29 | ○ | ○ | ○ | ○ | ○ | ○ | ○ |
30 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
31 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
32 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
33 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
34 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
35 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
36 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
37 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
38 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
39 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
40 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
41 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
42 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
Comparative example | 9 | ○ | ○ | ○ | ○ | ○ | ○ | × |
10 | ○ | ○ | ○ | ○ | ○ | ○ | ○ | |
11 | - | - | - | - | - | - | - | |
12 | ○ | ○ | ○ | ○ | × | × | × |
[table 6]
No. | Resist pattern is formed into power (%) | Distribution is formed into power (%) | |||
5/5(μm) | 10/10(μm) | 5/5(μm) | 10/10(μm) |
Embodiment | 43 | 100 | 100 | 100 | 100 |
44 | 100 | 100 | 100 | 100 | |
45 | 100 | 100 | 100 | 100 | |
46 | 100 | 100 | 100 | 100 | |
47 | 100 | 100 | 100 | 100 | |
48 | 100 | 100 | 100 | 100 | |
49 | 100 | 100 | 100 | 100 | |
50 | 100 | 100 | 100 | 100 | |
51 | 100 | 100 | 100 | 100 | |
52 | 100 | 100 | 100 | 100 | |
53 | 100 | 100 | 100 | 100 | |
54 | 100 | 100 | 100 | 100 | |
55 | 100 | 100 | 100 | 100 | |
56 | 100 | 100 | 100 | 100 | |
Comparative example | 13 | 80 | 90 | 50 | 60 |
14 | 85 | 95 | 60 | 75 | |
15 | - | - | - | - | |
16 | 50 | 90 | 40 | 80 |
[table 7]
No. | Anti-PCT (%) | ||||
|
|
|
|
Embodiment | 29 | 100 | ?100 | 100 | 100 |
30 | 100 | ?100 | 100 | 100 | |
31 | 100 | ?100 | 100 | 100 | |
32 | 100 | ?100 | 100 | 100 | |
33 | 100 | ?100 | 100 | 100 | |
34 | 100 | ?100 | 100 | 100 | |
35 | 100 | ?100 | 100 | 100 | |
36 | 100 | ?100 | 100 | 100 | |
37 | 100 | ?100 | 100 | 100 | |
38 | 100 | ?100 | 100 | 100 | |
39 | 100 | ?100 | 100 | 100 | |
40 | 100 | ?100 | 100 | 100 | |
41 | 100 | ?100 | 100 | 100 | |
42 | 100 | ?100 | 100 | 100 | |
Comparative example | 9 | 100 | ?20 | 100 | 30 |
10 | 100 | ?25 | 100 | 35 | |
11 | - | ?- | - | - | |
12 | 0 | ?90 | 0 | 90 |
[table 8]
No. | Pink circle incidence (%) |
Embodiment | 57 | 100 |
58 | 0 | |
59 | 100 | |
60 | 100 | |
61 | 100 | |
62 | 100 | |
63 | 100 | |
64 | 0 | |
65 | 0 | |
66 | 0 | |
67 | 0 | |
68 | 0 | |
69 | 0 | |
70 | 0 | |
Comparative example | 17 | 100 |
18 | 0 | |
19 | 100 | |
20 | 100 |
[table 9]
No. | Gold-plated outward appearance | The solder resist state |
Embodiment | 71 | ○ | × |
72 | ○ | ○ | |
73 | ○ | × | |
74 | ○ | × | |
75 | ○ | × | |
76 | ○ | × | |
77 | ○ | × | |
78 | ○ | ○ | |
79 | ○ | ○ | |
80 | ○ | ○ | |
81 | ○ | ○ | |
82 | ○ | ○ | |
83 | ○ | ○ | |
84 | ○ | ○ | |
Comparative example | 21 | × | × |
22 | × | ○ | |
23 | - | - | |
24 | ○ | ○ |
As shown in table 1, in the semiconductor packages of embodiment 1~14 made, reduce the embodiment 2,8~14 that handles after the oxide treatment of basic solution, demonstrate splendid reliability.
In addition, as shown in Figure 2, the electrolytic copper foil of embodiment 15 to 28 mades, the gloss that has suppressed the copper surface because its surface has the concavo-convex of densification and uniform tens nanometer level, and, bonding strength (stripping strength) after place with 150 ℃ of insulation layer, 240h on its surface is more than the 300N/m, for good.In addition, as shown in table 3, the enforcement of the electrolytic copper foil of embodiment 15 to 28 mades do not detect various ions in the surface-treated face, so this surperficial detergency is for good.
In addition, shown in table 4 and table 5,, all very good under any situation of L/S=5/5 μ m and L/S=10/10 μ m for the wiring closet insulating reliability of the evaluation substrate of embodiment 29 to 42 mades.In addition, as shown in table 6, for the resist pattern in the evaluation substrate of embodiment 43 to 56 mades is formed into power, all very good under any situation of L/S=5/5 μ m and L/S=10/10 μ m.In addition, as shown in table 6, for the distribution in the evaluation substrate of embodiment 43 to 56 mades is formed into power, all very good under any situation of L/S=5/5 μ m and L/S=10/10 μ m.In addition, as shown in table 7, for the anti-PCT in the evaluation substrate of embodiment 29 to 42 mades, increase between layer and the distribution, increase between layer and the insulation layer and between solder resist and the distribution, be between solder resist and the insulation layer fabulous.
In addition, as shown in table 8, in the evaluation substrate of embodiment 57 to 70 mades, pink circle does not take place in the embodiment 58,64~70 that has carried out the reduction processing, and is splendid.
In addition, as shown in table 9, the gold-plated excellent in appearance of the evaluation substrate of embodiment 71 to 84 mades has carried out the embodiment 72,78~84 that reduction is handled, and does not have peeling off and gold-plated situation about separating out to solder resist of solder resist during gold-plated processing, and is splendid.
On the other hand, conventional art can not satisfy the characteristic of formation, the distribution formation of gloss, copper surface detergency, wiring closet insulating reliability, the resist pattern on shape, the copper surface on smoothness, cementability, copper surface, anti-PCT, gold-plated processing then shown in comparative example 1 to 24 simultaneously.
So,,, can improve the bonding strength of this copper surface and insulation layer because the copper surface can form the fine and close and uniform micro concavo-convex of tens nanometer level according to the surface treatment method of copper of the present invention.In addition, this result can make pink circle not take place, wiring closet insulating reliability, fine distribution form excellent wiring board and carry the substrate of semi-conductor chip, and can make anti-reflow, temperature cycle, external connection terminals gold-plated handled excellent semiconductor packages.
Be preferred forms of the present invention more than those skilled in the art should know, the present invention can carry out various changes and modification under the condition that does not break away from the spirit and scope of the present invention.
Claims (12)
1. the surface treatment method of a copper wherein, comprises than the copper discrete operation that is formed at the copper surface of inert metal more, and thereafter the operation of oxide treatment is carried out with the basic solution that contains oxygenant in described copper surface,
Wherein said oxygenant is to be selected from the group that is made of oxymuriate, chlorite, hypochlorite, perchlorate, peracetic dithionite more than one.
2. the surface treatment method of copper according to claim 1, wherein described the copper surface is carried out the operation of oxide treatment after, also comprise be selected from by reduction handle, coupling is handled, suppress the operation of more than one processing in the group that corrosion treatment constitutes.
3. the surface treatment method of copper according to claim 1 and 2, wherein said than copper more the inert metal be selected from gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium or its alloy.
4. the surface treatment method of copper according to claim 1 and 2, wherein said than copper more the formation amount of inert metal be 0.001 μ mol/dm
2More than and 40 μ mol/dm
2Below.
5. the surface treatment method of copper according to claim 1, the roughness on the copper surface after the wherein said oxide treatment are expressed as more than the 1nm with Rz and below the 1000nm.
6. the surface treatment method of copper according to claim 2, after described reduction was handled back or described coupling and handled back or described inhibition corrosion treatment, the roughness on the copper surface that surface treatment produced by these copper was expressed as more than the 1nm with Rz and below the 1000nm.
7. copper, will than copper more the inert metal is discrete be formed at the copper surface after, oxide treatment is carried out with the basic solution that contains oxygenant in described copper surface and form, wherein said oxygenant is to be selected from the group that is made of oxymuriate, chlorite, hypochlorite, perchlorate, peracetic dithionite more than one.
8. copper according to claim 7, it is after described oxide treatment, implement again to be selected from that reduction is handled, coupling is handled, suppress in the corrosion treatment more than one processing and form.
9. according to claim 7 or 8 described copper, wherein said than copper more the inert metal be selected from gold and silver, platinum, palladium, rhodium, rhenium, ruthenium, osmium, iridium or its alloy.
10. according to claim 7 or 8 described copper, wherein be formed at the surface described than copper more the amount of inert metal be 0.001 μ mol/dm
2More than and 40 μ mol/dm
2Below.
11. copper according to claim 7, the roughness on the copper surface after the wherein said oxide treatment are expressed as more than the 1nm with Rz and below the 1000nm.
12. after copper according to claim 8, described reduction were handled back or described coupling and handled back or described inhibition corrosion treatment, the roughness on the copper surface that surface treatment produced by these copper was expressed as more than the 1nm with Rz and below the 1000nm.
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- 2005-03-11 JP JP2005069058A patent/JP2006249519A/en active Pending
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JP平1-156479A 1989.06.20 |
JP特开2002-30481A 2002.01.31 |
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CN101137768A (en) | 2008-03-05 |
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