CN101109880A

CN101109880A - LCD device and method thereof

Info

Publication number: CN101109880A
Application number: CNA2007101301203A
Authority: CN
Inventors: 金东奎; 李成荣; 文盛载; 罗惠锡
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Display Co Ltd
Priority date: 2006-07-21
Filing date: 2007-07-20
Publication date: 2008-01-23
Anticipated expiration: 2027-07-20
Also published as: KR20080008858A; CN101109880B

Abstract

The invention provides a liquid crystal display (LCD) to increase the display quality, comprising: a first insulated base plate; grid layout formed above the first insulated base plate and extending along a first direction; data layout insulated and crossed with grid layout and extending along a second direction; and pixel electrode comprising a first and second sub pixel electrode from different data voltages wherein at least one part of the second pixel electrode overlaps with the data layout.

Description

LCD and method thereof

Technical field

The present invention relates to a kind of LCD (LCD) and method thereof, and more particularly, relate to a kind of LCD with improved display quality, and a kind of method that improves the display quality of LCD.

Background technology

LCD (LCD) now has been widely used as a kind of flat-panel monitor.LCD comprises two display panels, and the field that is formed with on these two display panels such as pixel electrode and common electrode produces electrode (field generating electrode), and wherein liquid crystal layer is between these two display panels.In LCD, the field is produced electrode application voltage so that produce electric field in liquid crystal layer, and the arrangement of the liquid crystal molecule of liquid crystal layer is by this electric field decision.Therefore, polarization of incident light is controlled, and carries out image shows thus.

In LCD, the LCD of homeotropic alignment (VA) pattern obtains paying close attention to owing to it has high-contrast and wide visual angle, and wherein, under the situation that does not apply electric field, the main director (director) of liquid crystal molecule is perpendicular to display panel up and down.But the problem of VA mode LCD is that the side visibility is lower than positive visibility.In order to address this problem, it was suggested a kind of like this method: a pixel is divided into a pair of sub-pixel, is independently forming switching device in the sub-pixel, and sub-pixel is applied different voltage.

Yet, in this LCD according to correlation technique, because can not be precisely controlled because of the electric field between the pixel electrode in the motion of the liquid crystal above the data line, thereby light leak can take place, this can cause the reduction of LCD display performance.

In addition, in having the LCD of said structure, when the pixel electrode that is subjected to higher data voltage and be arranged on coupling capacitance between the pair of data lines on the sub-pixel both sides when inconsistent each other, display characteristic reduces.

Summary of the invention

The present invention relates to a kind of LCD (LCD) that can improve display quality.Display quality can improve by the coupling capacitance between the data line that reduces sub-pixel and nearby subpixels.

The present invention also provides a kind of method that improves the display quality of this LCD.

According to exemplary embodiment of the present invention, LCD comprises: first insulated substrate; Gate wirings is formed on first insulated substrate and along first direction and extends; Data wiring also intersect with it with the gate wirings insulation, and this data wiring extends along second direction; And pixel electrode, each pixel electrode comprises first, second pixel electrode, and different pieces of information voltage puts on this first and second pixel electrode from data wiring, and wherein at least a portion of each second pixel electrode and data wiring overlap.

According to other exemplary embodiment of the present invention, LCD comprises: gate wirings and data wiring, and insulated from each other and intersected with each other on insulated substrate; A pair of first and second thin film transistor (TFT)s (TFT) are connected in described gate wirings and described data wiring; First pixel electrode is connected to a TFT; Second pixel electrode around first pixel electrode, separates an intersegmental crack with first pixel electrode, and is connected to the 2nd TFT; First storage line overlaps with first pixel electrode and receives first storage voltage; And second storage line, overlap with second pixel electrode and receive second storage voltage that is different from first storage voltage.

According to other exemplary embodiments of the present invention, LCD comprises: gate line; The paired data line also intersects with it with the gate line insulation; And pixel electrode, be electrically connected to gate line and paired data line.Herein, each pixel electrode comprises first pixel electrode and second pixel electrode, and second pixel electrode has the area littler than first pixel electrode, and first pixel electrode and paired data line overlapping.

According to some exemplary embodiments more of the present invention, the method for display quality that a kind of raising has the LCD of pixel region matrix comprises: form gate wirings on insulated substrate, this gate wirings is extended along first direction substantially; Form the data wiring that insulate with gate wirings, this data wiring extends along second direction substantially, and this second direction is basically perpendicular to first direction; In each pixel region, form first, second pixel electrode, thereby make in each pixel region, second pixel electrode overlaps with contiguous data wiring, and this second pixel electrode is at least in part around first pixel electrode and have area greater than first pixel electrode; And applying data voltage to first pixel electrode, this data voltage is greater than the data voltage that puts on second pixel electrode.

Description of drawings

By below in conjunction with the detailed description of accompanying drawing to exemplary embodiment of the present, above-mentioned and further feature of the present invention and advantage will become more obvious, in the accompanying drawing:

Fig. 1 shows the synoptic diagram of exemplary pixels array of the illustrative liquid crystal display (LCD) of first exemplary embodiment according to the present invention;

Fig. 2 is the equivalent circuit diagram of an exemplary pixels among the exemplary L CD of Fig. 1;

Fig. 3 A is the arrangenent diagram of the exemplary bottom display panel that comprises the exemplary A type of Fig. 1 pixel of first exemplary embodiment according to the present invention;

Fig. 3 B is the cross-sectional view along the exemplary bottom display panel of the line IIIB-IIIB ' intercepting of Fig. 3 A;

Fig. 3 C is the cross-sectional view along the exemplary bottom display panel of the line IIIC-IIIC ' intercepting of Fig. 3 A;

Fig. 4 is the arrangenent diagram of exemplary top display panel that is connected to the exemplary bottom display panel of Fig. 3 A;

Fig. 5 is the arrangenent diagram of exemplary L CD that includes the exemplary top display panel of the exemplary bottom display panel of Fig. 3 A and Fig. 4;

Fig. 6 is the arrangenent diagram of the exemplary bottom display panel that comprises the exemplary Type B pixel of Fig. 1 of first exemplary embodiment according to the present invention;

Fig. 7 A is the arrangenent diagram of the exemplary bottom display panel that comprises the exemplary A type of Fig. 1 pixel of second exemplary embodiment according to the present invention;

Fig. 7 B is the cross-sectional view along the exemplary bottom display panel of the line VIIB-VIIB ' intercepting of Fig. 7 A;

Fig. 8 is the arrangenent diagram of the exemplary bottom display panel that comprises the exemplary Type B pixel of Fig. 1 of second exemplary embodiment according to the present invention;

Fig. 9 A shows the curve map of the luminance difference between the first pixel electrode Pa of the first pixel electrode Pa of the exemplary A type pixel of Fig. 1 when gray scale level changes and exemplary Type B pixel;

Fig. 9 B shows the curve map of the luminance difference between the second pixel electrode Pb of the second pixel electrode Pb of the exemplary A type pixel of Fig. 1 when gray scale level changes and exemplary Type B pixel;

Figure 10 is the equivalent circuit diagram of an exemplary pixels among the exemplary L CD of the 3rd exemplary embodiment according to the present invention;

Figure 11 A is the arrangenent diagram of exemplary bottom display panel of the exemplary L CD of the 3rd exemplary embodiment according to the present invention;

Figure 11 B is the cross-sectional view along the exemplary bottom display panel of the line XIB-XIB ' intercepting of Figure 11 A;

Figure 11 C is the cross-sectional view along the exemplary bottom display panel of the line XIC-XIC ' intercepting of Figure 11 A;

Figure 12 A is the arrangenent diagram of exemplary bottom display panel of the exemplary L CD of the 4th exemplary embodiment according to the present invention;

Figure 12 B is the cross-sectional view along the exemplary bottom display panel of the line XIIB-XIIB ' intercepting of Figure 12 A;

Figure 13 shows the view of a part of exemplary bottom display panel of the exemplary L CD of the 5th exemplary embodiment according to the present invention;

Figure 14 is the arrangenent diagram that shows in detail the structure of an exemplary pixels electrode PX shown in Figure 13;

Figure 15 shows the block diagram of the exemplary bottom display panel applications shown in Figure 13 in wherein exemplary L CD; And

Figure 16 is the oscillogram that puts on each exemplary pixels electrode in order to the data voltage of the picture pattern of realizing comprising white pattern and grey colored pattern.

Embodiment

With reference to following detailed description of the preferred embodiment and accompanying drawing, advantages and features of the invention and its implementation are with easier to understand.But the present invention can realize with many different forms, and can not be construed as limited to the embodiment that proposes in the literary composition.On the contrary, why provide these embodiment, be in order to make the disclosure more fully and complete, and fully pass on notion of the present invention, and the present invention only is defined by the following claims to those skilled in the art.In order to know purpose of description, each in the accompanying drawing layer or each regional size may be amplified to some extent.

Should be appreciated that this element or layer can be located immediately on another element or also and may have insertion element when element or layer are pointed out that " being positioned at " another element or layer are gone up.On the contrary, when element is pointed out on " being located immediately at " another element, there is not insertion element.Identical label is represented components identical in the instructions in the whole text.When with in the text the time, term " and/or " comprise any one and all combination of one or more relevant listed terms.

Although should be appreciated that at this and may use the term first, second, third, etc. to describe different elements, parts, zone, layer and/or part, these elements, parts, zone, layer and/or part are not limited by these terms should.These terms only are used for an element, parts, zone, layer or part are distinguished mutually with another element, parts, zone, layer or part.Therefore, under the situation that does not deviate from aim of the present invention, first element hereinafter described, parts, zone, layer or part can be called second element, parts, zone, layer or part.

Term only is used to describe certain embodiments and is not intended to limit the present invention as used herein.When using in the text, unless there are other clearly to indicate in the literary composition, " one (a, an) ", " this (the) " of singulative also are intended to comprise plural form.Should further understand, when using term " to comprise (comprise, include) " in this manual and/or when " comprising (comprising, including) ", be meant to have described feature, zone, integral body, step, operation, element and/or parts, do not exist or additional one or more other feature, zone, integral body, step, operation, element, parts and/or its combination but do not get rid of also.

Can use such as terms such as " in ... below ", " following ", " top " easily to describe the position relation between an element, parts, other element or the parts as shown in FIG..Should be appreciated that these terms not only comprise the orientation shown in the figure but also comprise use or operating process in other orientation of element.

Below with reference to planimetric map and cross-sectional view the preferred embodiments of the present invention are described as exemplary drawings of the present invention.Exemplary drawings can be revised by manufacturing technology and/or tolerance.Therefore, the preferred embodiments of the present invention are not limited to the concrete structure shown in the accompanying drawing, but comprise the modification based on manufacturing process.Therefore, the zone shown in the accompanying drawing has schematic characteristics.In addition, the given shape in the zone that has been illustration in the element of the shape in zone shown in the accompanying drawing, and do not limit the present invention.

Hereinafter, describe LCD (LCD) according to an exemplary embodiment of the present invention with reference to the accompanying drawings in detail.

Fig. 1 shows the synoptic diagram of exemplary pixels array of the exemplary L CD of first exemplary embodiment according to the present invention.Fig. 2 shows the equivalent circuit diagram of an exemplary pixels among the exemplary L CD of Fig. 1.

The LCD of Fig. 1 and Fig. 2 comprises: liquid crystal panel assembly (assembly); Gate drivers and data driver, they are connected in the liquid crystal panel assembly; Grayscale voltage generator is connected to data driver; And the signal controller that is used to control them.

A plurality of pixel PX that the liquid crystal panel assembly comprises many display signal lines and is connected in display signal line and is provided with matrix shape substantially.Here, the liquid crystal panel assembly comprises bottom display panel and top display panel and the liquid crystal layer between bottom and top display panel that faces with each other.

See figures.1.and.2, display signal line is arranged on the display panel of bottom, and comprises many gate lines G of transmission signal and data line Da, the Db of transmission of data signals.Gate lines G follows direction (first direction) substantially and extends parallel to each other.Data line Da and Db extend parallel to each other along column direction (second direction) substantially.Wherein first direction is vertical substantially with second direction.

Each pixel PX includes a pair of sub-pixel PXa and PXb.Sub-pixel PXa and PXb comprise respectively: switching device Qa, Qb are connected in corresponding data line Da, Db and a gate lines G; Liquid crystal capacitor Clca, Clcb are connected to switching device Qa, Qb; And a pair of holding capacitor Csta, Cstb, be connected to liquid crystal capacitor Clca, Clcb.That is, two data line Da, Db and a gate lines G are assigned to a pair of sub-pixel PXa, PXb.In interchangeable embodiment, if necessary, can not comprise holding capacitor Csta, Cstb.

The switching device Qa of corresponding sub-pixel PXa and PXb and Qb have the thin film transistor (TFT) (TFT) that is arranged on the display panel of bottom.Each switching device Qa and Qb are three terminal components, comprising: control terminal (hereinafter being called " gate electrode ") is connected in the gate lines G that is applied with signal; Input terminal (hereinafter being called " source electrode ") is connected in each bar of corresponding data line Da and Db; And lead-out terminal (hereinafter being called " drain electrode "), be connected to each of corresponding liquid crystal capacitor Clca and Clcb and each of respective stored capacitor Csta and Cstb.

Each liquid crystal capacitor Clca and Clcb all have two terminals, comprise the pixel electrode Pa of bottom display panel and the common electrode of Pb and top display panel, and the liquid crystal layer between pixel electrode Pa, Pb and common electrode is as dielectric.Pixel electrode Pa and Pb are connected to switching device Qa and Qb.Common electrode is formed on the whole surface of top display panel or on the whole substantially surface, and is applied in common voltage Vcom.Replacedly, common electrode can be arranged on the display panel of bottom.In this case, at least one in pixel electrode and the common electrode can form with linear or rod shape.

Pixel electrode and the storage distribution that is arranged on the display panel of bottom can overlap each other, and wherein are inserted with insulating material between them, therefore form holding capacitor Csta, the Cstb of auxiliary liquid crystal capacitor Clca, Clcb.Predetermined voltage such as common voltage Vcom puts on the storage distribution.Here, replacedly or additionally, pixel electrode Pa, Pb and previous gate line can overlap each other, and wherein are inserted with insulating material between them, thereby form holding capacitor Csta, Cstb.

Simultaneously, in order to realize colored showing that each pixel PX shows a kind of color in one group of primary colors (space partition zone) uniquely, also or each pixel PX show this group primary colors (time subregion) provisionally and alternately.Like this, synthesize primary colors in the space and on the time, thereby obtain desired color.The example of primary colors comprises red, green and blue three-color.As the example of space partition zone, each pixel PX can have a color filter, this color filter a kind of in the Show Color in the zone of top display panel.In addition, color filter can be formed on the bottom display panel pixel electrode Pa, Pb above or below.

Further describe with reference to Figure 15 as following, gate drivers is connected to gate lines G, and signal is put on gate lines G, and this signal is by will be from coming from outside connection voltage Von and closing voltage Voff and combine and obtain.

Grayscale voltage generator can produce the two group grayscale voltages (or one group reference gray level voltage) relevant with the transmissivity of pixel, and the gray scale voltage group that produces is offered data driver.That is, these two groups of grayscale voltages can offer a pair of sub-pixel Pxa, the PXb that forms pixel PX independently.Yet the present invention is not limited to this.For example, replace two groups of grayscale voltages, also can only produce one group of grayscale voltage.

Data driver is connected to paired data line Da, Db.Data driver one of becomes in the paired sub-pixel of pixel the transmission data voltage by data line Da synform, and becomes the different data voltage of another sub-pixel transmission in the paired sub-pixel of pixel by data line Db synform.

Gate drivers or data driver can be directly installed on the display panels assembly with the form of a plurality of drive integrated circults (IC) chip or can invest on the display panels assembly, carry encapsulation (TCP) by band simultaneously and are installed on the flexible printed circuit film (not shown).Replacedly, gate drivers or data driver can be integrated in the display panels assembly together with display signal line G, Da and Db, TFT switching device Qa and Qb etc.

The operation of signal controller control gate driver, data driver etc.

Get back to Fig. 1, a pixel comprises two switching device Qa, Qb, and two pixel electrode Pa, Pb being connected to switching device Qa, Qb respectively.Here, suppose that relative higher data voltage puts on the first pixel electrode Pa, and relatively low data voltage puts on the second pixel electrode Pb.Hereinafter, low data voltage and high data voltage are represented low difference or the higher difference between common voltage and the data voltage.In addition, have the pixel that is subjected to the first sub-pixel Pa of data voltage by the first data line Da and be called A type pixel; Have the pixel that is subjected to the first sub-pixel Pa of data voltage by the second data line Db and be called the Type B pixel.

As shown in Figure 1, A type pixel and Type B pixel along continuous straight runs and vertical direction (that is, along first and second directions) are alternately arranged, and therefore can prevent to observe in LCD vertical striped or horizontal stripe.

If data voltage is imposed on the first pixel electrode Pa of all pixels by the first data line Da, promptly, if pel array only comprises A type pixel, if and LCD will observe the vertical striped that moves with respect to check pattern (its pixel along continuous straight runs by every frame moves) along continuous straight runs so with the driven words of row counter-rotating (column inversion) pattern.

Furtherly, if data voltage is imposed on the first pixel electrode Pa of a pixel column by the first data line Da, and data voltage is imposed on the first pixel electrode Pa of next pixel column by the second data line Db, promptly, when A type pixel column and Type B pixel column are alternately arranged, so, just may prevent the vertical striped that along continuous straight runs above-mentioned moves.Yet, at each first pixel electrode Pa and be arranged between the first and second data line Da, the Db of each first pixel electrode Pa both sides and be coupled.Because the coupling capacitance between each first pixel electrode Pa and the first and second data line Da, the Db changes according to A type pixel and Type B pixel, so, can observe horizontal stripe.

Therefore, as shown in Figure 1 according to the present invention the LCD of first exemplary embodiment because A type pixel and Type B pixel along continuous straight runs and alternately arrangement of vertical direction, thereby just might prevent vertical striped or the horizontal stripe that above-mentioned along continuous straight runs moves.Yet when the LCD with this structure moved under low gray scale level, liquid crystal moved by the first pixel electrode Pa that is subjected to relative high voltage substantially.Therefore, the difference of the coupling capacitance between the coupling capacitance between the first pixel electrode Pa and the first data line Da and the first pixel electrode Pa and the second data line Db reduces, thereby prevents that the display quality that causes owing to cross-talk from reducing.

In addition, as the present invention's first exemplary embodiment, because first, second data line Da, Db are arranged so that the second pixel electrode Pb and first, second data line Da, Db overlap, and the second pixel electrode Pb is around the first pixel electrode Pa, even therefore when A type pixel and Type B pixel be not along continuous straight runs and vertical direction when being arranged alternately, also might prevent the appearance of vertical striped or horizontal stripe.That is to say,, can prevent the reduction of display quality by reducing the difference of the coupling capacitance between first, second data line Da, Db and the first pixel electrode Pa.About this point, will be further described below.

Below, with reference to Fig. 3 A to Fig. 5, will the exemplary L CD of first exemplary embodiment according to the present invention be further described.LCD according to this exemplary embodiment comprises: be formed with the bottom display panel of tft array on it, in the face of the top display panel and the liquid crystal layer between two display panels of bottom display panel.

At first, with reference to Fig. 3 A to Fig. 3 C, the bottom display panel according to the LCD of first exemplary embodiment is described.Here, Fig. 3 A is the arrangenent diagram of the exemplary bottom display panel that comprises the exemplary A type of Fig. 1 pixel of first exemplary embodiment according to the present invention.Fig. 3 B is the cross-sectional view along the exemplary bottom display panel of the line IIIB-IIIB ' intercepting of Fig. 3 A.Fig. 3 C is the cross-sectional view along the exemplary bottom display panel of the line IIIC-IIIC ' intercepting of Fig. 3 A.

Substantially along level or first direction extends and the gate line 22 of transmission signal is formed on the insulated substrate 10, this insulated substrate can be formed by clear glass etc.Every gate line 22 is assigned to one-row pixels.In addition, on the gate line 22 that is used for each pixel, form a pair of first, second outstanding gate electrode 26a, 26b.Gate line 22 is called as gate wirings with first,

second gate electrode

26a, 26b.

In addition, storage line 28 is formed on the insulated substrate 10.Storage line 28 intersects with pixel region, and basic along continuous straight runs extension, and therefore basic parallel with gate line 22 at least.Storage electrode 27 is connected in storage line 28 and has width greater than storage line 28 width.Thereby storage electrode 27 overlaps each other with pixel electrode 82 and forms the holding capacitor of the charge capacity (charge capacity) that improves pixel.Storage electrode 27 is called as the storage distribution with storage line 28.In this embodiment, the center of

storage distribution

27,28 and pixel region overlaps, but the present invention is not limited thereto.In interchangeable embodiment, the shape and the arrangement of

storage distribution

27,28 can be with multi-form changes.In addition, when when pixel electrode 82 and gate line 22 being overlapped produce enough memory capacitance, can not need

comprise storage distribution

27,28.

Gate wirings 22,26a and 26b and storage distribution 27,28 can be by such as the aluminium based metals of aluminium (Al) or aluminium alloy, such as silver-base metal, the copper base metal such as copper (Cu) or aldary, the molybdenum Base Metal such as molybdenum (Mo) or molybdenum alloy, chromium (Cr), the titanium (Ti) of silver (Ag) or silver alloy, or tantalum (Ta) forms.In addition, each bar in each bar among gate wirings 22,26a, the 26b and the storage distribution 27,28 all can have sandwich construction, and this sandwich construction comprises the two-layer conducting film (not shown) with different physical attributes.In this sandwich construction, one deck conducting film in the two-layer conducting film can be made by the metal with low-resistance coefficient (for example aluminium based metal, silver-base metal or copper base metal), with signal delay or the voltage drop in each bar in each bar among minimizing gate wirings 22,26a, the 26b and the storage distribution 27,28.In the sandwich construction another layer conducting film formed by the material that has good contact performance with respect to tin indium oxide (ITO), indium zinc oxide (IZO) or other pixel electrode material particularly, and this another layer conducting film can be for example molybdenum Base Metal, chromium, titanium or tantalum.The example of this sandwich construction comprises the structure with bottom chromium film and top aluminium film, and the structure with bottom aluminium film and top molybdenum film.But the present invention is not limited to this, and each bar in each bar in the gate wirings 22,26a, 26b and the storage distribution 27,28 can be formed by the various metal materials or the conductor that are different from above-mentioned material.

The gate insulator 30 that is formed by silicon nitride (SiNx) etc. is formed on gate wirings 22 and the

storage distribution

27,28, and on the exposed surface of insulation course 10.

The semiconductor layer 40a, the 40b that are formed by amorphous silicon hydride (a-Si) or polysilicon are formed on the gate insulator 30.

Semiconductor layer

40a, 40b can have multiple shape, such as island or strip.For example, as directed,

semiconductor layer

40a, 40b can form has island.

Semiconductor layer

40a, 40b form with

gate electrode

26a, 26b and overlap.

Ohmic contact layer 55a, 56a are formed on semiconductor layer 40a, the 40b, and can be formed by silicide or n+ hydrogenation a-Si, and wherein, n+ hydrogenation a-Si has mixed n type impurity with high concentration.A pair of ohmic contact layer 55a, 56a are positioned on each of

semiconductor layer

40a, 40b.

A pair of first,

second data line

62a, 62b, and be formed on ohmic contact layer 55a, 56a and the insulation course 30 with corresponding a pair of first, second drain electrode 66a of this first and

second data line

62a, 62b, 66b respectively.

First,

second data line

62a, 62b substantially vertically extend, and pass gate line 22 and storage line 28, and the transmission data voltage.First, second source electrode 65a, the 65b that extends towards first,

second drain electrode

66a, 66b gives prominence to from first,

second data line

62a, 62b respectively respectively.As shown in Figure 3A, a pixel is divided into a pair of sub-pixel, and the first data line 62a is to a sub-pixel transmission of data signals, and the second data line 62b will further describe this below to the different data-signal of another sub-pixel transmission.

First,

second data line

62a, 62b, first,

second source electrode

65a, 65b, and first,

second drain electrode

66a, 66b are called as data wiring.

Preferably, each bar of

data wiring

62a, 62b, 65a, 65b, 66a and 66b can be formed by refractory metal, such as chromium, molybdenum Base Metal, tantalum or titanium.In addition, each bar of

data wiring

62a, 62b, 65a, 65b, 66a and 66b can have sandwich construction, and in this sandwich construction, the upper strata (not shown) that is made of low electrical resistant material is formed in the lower floor that is made of refractory metal etc.The example of sandwich construction can comprise have the bottom molybdenum layer, the three-decker of middle aluminium lamination and top molybdenum layer and above-mentionedly have bottom chromium layer and upper aluminum layer or have lower aluminum layer and the double-decker of top molybdenum layer.Yet the present invention is not limited to this, and each bar of

data wiring

62a, 62b, 65a, 65b, 66a and 66b can be formed by the multiple metal material or the conductor that are different from above-mentioned material.

Semiconductor layer

40a, 40b are overlapped by first,

second source electrode

65a, 65b respectively at least in part.With respect to

gate electrode

26a, 26b, first,

second drain electrode

66a, 66b are respectively in the face of first, second source electrode 65a,

65b.Semiconductor layer

40a, 40b are overlapped by first,

second drain electrode

66a, 66b respectively at least in part.Here, above-mentioned ohmic contact layer 55a, 56a can be present between

semiconductor layer

40a, 40b and first, second source electrode 65a, the 65b and between

semiconductor layer

40a, 40b and first, second drain electrode 66a, the 66b, thereby reduces contact resistance between them.

Passivation layer 70 is formed on

data wiring

62a, 62b, 65a, 65b, 66a and 66b and semiconductor layer 40a that exposes and the 40b, and on the exposed part of gate insulator 30.Passivation layer 70 is made by inorganic material (such as silicon nitride or monox), organic material (having good flatness of the response and photosensitivity) or insulating material (such as the a-Si:C:O or the a-Si:O:F that form by plasma reinforced chemical vapour deposition (PECVD)) with low-k.In addition, passivation layer 70 can have the double-decker that comprises bottom inorganic layer and top organic layer, with characteristic and exposed semiconductor layer 40a and the 40b of protection that improves organic membrane.In addition, red, green or blue color filter layer can be used as passivation layer 70.

The pixel electrode 82 that is formed on the passivation layer 70 comprises first, second pixel electrode 82a, the 82b that is separated from each other.Herein, each of first,

second pixel electrode

82a, 82b can be made by transparent electrical conductors (such as ITO or IZO) or reflection electric conductor (such as aluminium).

First,

second pixel electrode

82a, 82b are electrically connected to first,

second drain electrode

66a, 66b by first,

second contact hole

76a, 76b respectively, and are applied in the different pieces of information voltage from first,

second drain electrode

66a, 66b.

First, second pixel electrode 82a, the 82b that are subjected to data voltage produce electric field together with the common electrode on the display panel of top, thus the arrangement of the liquid crystal molecule in the liquid crystal layer between definite first,

second pixel electrode

82a, 82b and the common electrode.

In addition, as mentioned above, with reference to Fig. 2 and Fig. 3 A,

pixel electrode

82a and 82b form liquid crystal capacitor Clca and Clcb with common electrode respectively, even close TFT Qa and Qb like this, also can keep the voltage that is applied.Keep ability in order to increase voltage, the holding capacitor Csta, the Cstab that are connected in parallel with liquid crystal capacitor Clca and Clcb can form by this way, that is, make first,

second pixel electrode

82a, 82b or be connected to first, second drain electrode 66a, the 66b of first,

second pixel electrode

82a, 82b and

storage distribution

27 and 28 overlaps.

Get back to Fig. 3 A to Fig. 3 C, pixel electrode 82 comprises by gap 83 first,

second pixel electrode

82a, 82b electrically isolated from one.The first pixel electrode 82a has the V-arrangement shape (such as rotation and truncate V-arrangement) of almost horizontal.The second pixel electrode 82b is formed in the zone except that the first pixel electrode 82a and gap 83 of pixel.Particularly, the second pixel electrode 82b forms the periphery around the first pixel electrode 82a.

Gap 83 comprises sloping portion and vertical part, and wherein sloping portion approximately tilts 45 ° or-45 ° with respect to gate line 22, and vertically part is connected between the sloping portion and along first,

second data line

62a, 62b and arranges.

Although show among the figure, can form with respect to gate line 22 approximately tilt the territory segmenting device (not shown) of 45 ° or-45 °, for example cutout or projection.The viewing area of pixel electrode 82 is divided into a plurality of territories in a certain direction, described direction promptly, when applying electric field, the main director of the liquid crystal molecule that is comprised in the liquid crystal layer is arranged along this direction when applying electric field.Gap 83 and territory segmenting device are in order to be divided into many territories with pixel electrode 82.The territory is meant such zone, wherein is formed with liquid crystal molecule, and formed electric field makes liquid crystal molecule jointly tilt along predetermined direction between pixel electrode 82 and the common electrode 90 simultaneously.

As mentioned above, the whole first pixel electrode 82a is V-shape, and the second pixel electrode 82b forms around the first pixel electrode 82a.Particularly, the second pixel electrode 82b comprises main areas and bridge areas as there.The sloping portion of main areas adjacent gap 83, they approximately tilt 45 ° or-45 ° with respect to gate line 22, and the motion of control liquid crystal molecule.The vertical part of bridge areas as there adjacent gap 83 is arranged along first,

second data line

62a, 62b, and main areas is connected to each other.

Shown in Fig. 3 A and Fig. 3 C, first,

second data line

62a, 62b form and make the second pixel electrode 82b overlap with the first and

second data line

62a, 62b at least in part.Preferably, first,

second data line

62a, 62b fully.Particularly, the bridge areas as there of the second pixel electrode 82b and first,

second data line

62a, 62b overlap.

The alignment layer (not shown) can be covered on first,

second pixel electrode

82a, 82b and the passivation layer 70.

Below, with reference to Fig. 4 and Fig. 5, will be described exemplary top display panel and exemplary L CD.Here, Fig. 4 is the arrangenent diagram of exemplary top display panel that is connected to the exemplary bottom display panel of Fig. 3 A.Fig. 5 is the arrangenent diagram of exemplary L CD that comprises the exemplary top display panel of the exemplary bottom display panel of Fig. 3 A and Fig. 4.

The black matrix" 94 that prevents leakage of light and limit pixel region is formed on the insulated substrate (not shown) of being made by clear glass etc.Black matrix" 94 can be formed on the part corresponding with gate line 22 and first,

second data line

62a, 62b, and on the part corresponding with TFT.In addition, black matrix" 94 can have different shapes to stop first,

second pixel electrode

82a, 82b and TFT leakage of light on every side.Black matrix" 94 can be made by metal (metal oxide) or organic black resist such as chromium or chromium oxide.

In black matrix" 94, red, green, blue color filter (not shown) can sequentially be arranged in the pixel region.

On color filter, can form the overlayer (not shown), so that remove the step (step) between the color filter.

The common electrode 90 that is formed by the transparent conductive material such as ITO or IZO is formed on the overlayer.Common electrode 90 can comprise in the face of first,

second pixel electrode

82a, 82b and with respect to the gate wires 22 territory segmenting device 92 of about 45 ° or-45 ° that tilts, and can comprise cutout or projection.

The alignment layer (not shown) of arranging liquid crystal molecule can be formed on the common electrode 90.

Bottom display panel with said structure aligns with the top display panel and is connected to each other, and liquid crystal material injects up and down between the display panel and homeotropic alignment.Like this, the foundation structure according to the LCD of first exemplary embodiment has just formed.

Pixel electrode 82 and common electrode 90 are not being applied under the situation of electric field, the Liquid Crystal Molecules Alignment that comprises in the liquid crystal layer is for making its direction vow perpendicular to bottom display panel and top display panel.In addition, liquid crystal molecule has negative dielectric anisotropic.

Except above-mentioned basic structure, LCD also can comprise such as polarizer and parts backlight.Here, polarizer can be separately positioned on the both sides of basic structure, so that an emission shaft of polarizer is parallel with gate line 22, and another emission shaft is vertical with gate line 22.

When between bottom display panel and top display panel, applying electric field, almost all can produce perpendicular to the electric field of display panel up and down at All Ranges.Yet horizontal component of electric field produces around the territory segmenting device 92 of the gap 83 of pixel electrode 82 and common electrode 90.Horizontal component of electric field assists to arrange the liquid crystal molecule in each territory.

Because the liquid crystal molecule of this embodiment has negative dielectric anisotropic, therefore when liquid crystal molecule was applied electric field, the liquid crystal molecule in each territory will tilt, with gap 83 or to cut apart the territory segmenting device 92 in described territory vertical.Therefore, 83 both sides or territory segmenting device 92 upper edge different directions tilt liquid crystal molecule in the gap, and the sloping portion of the sloping portion in gap 83 or territory segmenting device 92 is about each pixel center symmetry.Like this, liquid crystal molecule tilts 45 ° or-45 ° with respect to gate line 22 substantially along four direction.Because optical characteristics is able to complementation because of the liquid crystal molecule that tilts along four direction, the visual angle increases.

Below, with reference to Fig. 3 A to Fig. 5, the operation of the exemplary L CD of first exemplary embodiment according to the present invention is described.

In A type pixel, apply relative higher data voltage to the first pixel electrode 82a that is connected in the first data line 62a, apply relatively low data voltage to the second pixel electrode 82b that is connected in the second data line 62b.Therefore, may improve the sidepiece visibility of LCD.

Particularly, when LCD moved under low gray scale level, liquid crystal moved by the first pixel electrode 82a that is subjected to higher data voltage substantially, and the second sub-pixel 82b is applied voltage.In this case, because the second pixel electrode 82b is subjected to and the identical voltage of common electrode 90 on the display panel of top substantially, the liquid crystal molecule that therefore is arranged on second pixel electrode 82b top will be arranged in and make its direction vow perpendicular to the bottom display panel.Therefore, the light of being launched from backlight can not pass the second pixel electrode 82b, but has been blocked.

When LCD moved under the high grade grey level level, because the overall brightness of LCD is higher, so light leaked unimportant.In view of this, prevent that the light when LCD moves from leaking even more important under low gray scale level.Usually, light leaks around first,

second data line

62a, 62b and takes place.But, as in first exemplary embodiment of the present invention, when the second pixel electrode 82b and first,

second data line

62a, 62b overlapping, and when LCD moves under low gray scale level, the light that passes the second pixel electrode 82b is stopped by the second pixel electrode 82b, and can prevent that the light around first, second data line 62a, the 62b from leaking.Furtherly, can prevent that light from leaking by the area that uses the second pixel electrode 82b around the first pixel electrode 82a and do not increase black matrix" 94, thereby improve the aperture ratio.

When the first pixel electrode 82a that is subjected to high voltage was not consistent each other with the coupling capacitance between first, second data line 62a, the 62b, the display performance of LCD can reduce.For this reason, the first pixel electrode 82a is configured such that the pixel electrode 82a that wins does not overlap with first,

second data line

62a, 62b, to reduce the coupling capacitance between the first pixel electrode 82a and first, second data line 62a, the 62b.So just can prevent that coupling capacitance from influencing the display performance of LCD.

Below, with reference to Fig. 6, will another part of the exemplary bottom display panel of the exemplary L CD of first exemplary embodiment according to the present invention be described.Fig. 6 is the arrangenent diagram of the exemplary bottom display panel of the exemplary Type B pixel that comprises Fig. 1 of first exemplary embodiment according to the present invention.For convenience of description, with same reference numbers represent to have with Fig. 3 A to Fig. 5 in the parts of those parts identical functions, and thereby omit description to it.Hereinafter only be described at difference.

As shown in Figure 6, different with A type pixel is that the Type B pixel comprises: be connected to the first drain electrode 66a of the second pixel electrode 82b and the second drain electrode 66b that is connected to the first pixel electrode 82a by the second contact hole 76b by the first contact hole 76a.Apply relative higher voltage to the first pixel electrode 82a that is connected to the second data line 62b, and apply relatively low voltage to the second pixel electrode 82b that is connected to the first data line 62a.Therefore, can improve the sidepiece visibility of LCD.

Under the situation of the LCD with said structure, can prevent that first,

second data line

62a, 62b light on every side from leaking and improving the aperture ratio of LCD.In addition, the coupling capacitance between the first pixel electrode 82a and first, second data line 62a, the 62b reduces, thereby prevents the reduction of the display performance of LCD.

Below, with reference to Fig. 7 A and Fig. 7 B, the exemplary bottom display panel of the exemplary L CD of second exemplary embodiment according to the present invention is described in detail.Fig. 7 A is the arrangenent diagram of the exemplary bottom display panel of the A type pixel that comprises Fig. 1 of second exemplary embodiment according to the present invention.Fig. 7 B shows along the cross-sectional view of the exemplary bottom display panel of the line VIIB-VIIB ' intercepting of Fig. 7 A.For convenience of description, with same reference numbers represent to have with the foregoing description (Fig. 1 to Fig. 6) in the parts of those parts identical functions, and thereby omit description to it.Hereinafter only be described at difference.

Shown in Fig. 7 A and 7B, in order further to reduce the coupling capacitance between the first pixel electrode 82a and first, second data line 62a, the 62b, form first, second auxiliary storage electrode 29a, the 29b that are connected to storage line 28 and substantially vertically extend and parallel with first,

second data line

62a, 62b.

Here, first, second

auxiliary storage electrode

29a, 29b can form and make the gap 83 that the first pixel electrode 82a and the second pixel electrode 82b are separated from each other partly overlap with first, second auxiliary storage electrode 29a, 29b.Here, gap 83 comprises sloping portion and vertical part, and wherein sloping portion tilts about 45 ° or-45 ° with respect to gate line 22, and vertical component is connected between the sloping portion and along first,

second data line

62a, 62b and arranges.Therefore, preferably, first, second

auxiliary storage electrode

29a, 29b partly overlap with the vertical part in the gap 83 of contiguous first, second data line 62a, 62b.First, second

auxiliary storage electrode

29a, 29b can be outstanding from the edge of storage electrode 27.

First, second

auxiliary storage electrode

29a, 29b and the first pixel electrode 82a form holding capacitor, thereby can prevent the coupling between the first pixel electrode 82a and first, second data line 62a, the 62b.

In addition, shown in Fig. 7 B, when the first pixel electrode 82a partly overlaps with first, second

auxiliary storage electrode

29a, 29b, can further reduce the coupling capacitance between the first pixel electrode 82a and first, second data line 62a, the 62b.Overlapping width between the first pixel electrode 82a and each first, second auxiliary storage electrode 29a, the 29b is L, and size can be for example about 1 to about 3 μ m.

Below, with reference to Fig. 8, another part of the exemplary bottom display panel of the exemplary L CD of second exemplary embodiment according to the present invention is described.Fig. 8 is the arrangenent diagram of the exemplary bottom display panel of the exemplary Type B pixel that comprises Fig. 1 of second exemplary embodiment according to the present invention.Be convenient and describe, with same reference numbers represent to have with Fig. 7 A and Fig. 7 B in the parts of those parts identical functions, and thereby omit description to it.Hereinafter only be described at difference.

As shown in Figure 8, in the Type B pixel, the first drain electrode 66a is connected in the second pixel electrode 82b by the first contact hole 76a, and the second drain electrode 66b is connected in the first pixel electrode 82a by the second contact hole 76b.Apply relative higher voltage to the first pixel electrode 82a that is connected in the second data line 62b, and apply relatively low voltage to the second pixel electrode 82b that is connected in the first data line 62a.Therefore, can improve the sidepiece visibility of LCD.

As top description to the A type pixel shown in Fig. 7 A and Fig. 7 B, the Type B pixel shown in Fig. 8 comprises first, second

auxiliary storage electrode

29a, 29b.

Under the situation of the LCD with said structure,, can prevent that the light around first, second data line 62a, the 62b from leaking, and improve the aperture ratio of LCD as first exemplary embodiment.In addition, by first, second

auxiliary storage electrode

29a, 29b, the coupling capacitance between the first pixel electrode 82a and first, second data line 62a, the 62b also further effectively reduces, thereby the display performance that prevents LCD reduces.

Below, with reference to Fig. 1, Fig. 9 A and Fig. 9 B, pixel electrode in LCD according to an exemplary embodiment of the present invention and the coupling capacitance between the data line are described.Preferably, when in LCD, showing dynamic image, increased the frequency of received image signal and improved the response speed of liquid crystal molecule, to prevent afterimage and to wait to produce the fuzzy of image.For example, among the LCD that moves, preferably, consider the response speed of liquid crystal molecule under 120Hz or higher frequency, LCD is driven with the row reversing mode, but not is driven with a reversing mode.Hereinafter, will be according to as an example the coupling capacitance between pixel electrode and the data line being described in detail by the driven LCD of row reversing mode.In with the driven LCD of row reversing mode, in first image duration, apply the positive polarity data voltage to the first data line Da, apply the negative polarity data voltage (here to the second data line Db, positive-negative polarity refers to the polarity of data voltage with respect to common voltage, will describe in detail with reference to Figure 16 as following).In second image duration, apply the negative polarity data voltage to the first data line Da, apply the positive polarity data voltage to the second data line Db.

At first, with reference to Fig. 1 and Fig. 9 A, the first pixel electrode Pa that is subjected to higher data voltage and the coupling capacitance between data line Da, the Db are described.Fig. 9 A is the view that the luminance difference between the exemplary first pixel electrode Pa of the exemplary first pixel electrode Pa of the exemplary A type pixel of Fig. 1 when gray scale level changes and exemplary Type B pixel.Here, because the area that the first pixel electrode Pa of A type pixel and Type B pixel adjoins with the first data line Da is greater than the area that adjoins with the second data line Db, therefore the coupling capacitance between the first pixel electrode Pa and the first data line Da has mainly influenced the brightness variation of LCD.In addition, under the high grade grey level level, the first pixel electrode Pa always has high brightness, and under low gray scale level, brightness but takes place change.

In the situation of A type pixel,, apply the positive polarity data voltage to the first pixel electrode Pa by the first data line Da in first image duration.In second image duration, apply the negative polarity data voltage to the first data line Da.Thereby, second image duration before applying data voltage to the first pixel electrode Pa, between the first pixel electrode Pa and the first data line Da, be coupled, and reduced the data voltage that in first image duration, is stored among the first pixel electrode Pa.Therefore, the brightness of the first pixel electrode Pa also weakens thereupon.

In the situation of Type B pixel,, apply the negative polarity data voltage to the first pixel electrode Pa by the second data line Db in first image duration.In second image duration, apply the negative polarity data voltage to the first data line Da.Thereby, second image duration by the second data line Db before the first pixel electrode Pa applies data voltage, be coupled between the first pixel electrode Pa and the first data line Da, therefore the data voltage that is stored among the first pixel electrode Pa in first image duration further increases.Therefore, the brightness of the first pixel electrode Pa also strengthens thereupon.

In Fig. 9 A, the luminance difference data refer to: about poor with about the brightness RMS numerical value of the first pixel electrode Pa of the Type B pixel of first and second frames of brightness root mean square (RMS) numerical value of the first pixel electrode Pa of the A type pixel of first and second frames.Shown in Fig. 9 A, even have luminance difference between the first pixel electrode Pa of A type pixel and Type B pixel under the low gray scale level, but difference also only is about 1.5% or lower.This just means that the coupling capacitance between the first pixel electrode Pa and first, second data line Da, the Db also reduces greatly.

With reference to Fig. 1 and Fig. 9 B, the second pixel electrode Pb that is subjected to lower data voltage and the coupling capacitance between data line Da, the Db are described.Fig. 9 B shows when gray scale level changes, the luminance difference between the exemplary second pixel electrode Pb of the exemplary second pixel electrode Pb of the exemplary A type pixel of Fig. 1 and the exemplary Type B pixel of Fig. 1.Here, because the second pixel electrode Pb of A type, Type B pixel is bigger than the overlapping area between its same second data line Db with the overlapping area between the first data line Da, so the second sub-pixel Pb changes with the brightness that the coupling capacitance between the first data line Da mainly influences LCD.In addition, because the second sub-pixel Pb does not move under low gray scale level and only moves under the high grade grey level level, therefore, the variation of luminance difference occurs under the high grade grey level level.

In the situation of A type pixel,, apply the negative polarity data voltage to the second pixel electrode Pb by the second data line Db in first image duration.In second image duration, apply the negative polarity data voltage to the first data line Da.Thereby, in second image duration, by the second data line Db before the second pixel electrode Pb applies data voltage, between the second pixel electrode Pb and the first data line Da, be coupled, and the data voltage that is stored among the second pixel electrode Pb in first image duration increases.Therefore, the brightness of the second pixel electrode Pb also strengthens thereupon.

In the situation of Type B pixel,, apply the positive polarity data voltage to the second pixel electrode Pb by the first data line Da in first image duration.In second image duration, apply the negative polarity data voltage to the first data line Da.Thereby, in second image duration, by the first data line Da before the second pixel electrode Pb applies data voltage, be coupled between the second pixel electrode Pb and the first data line Da, and the data voltage that is stored among the second pixel electrode Pb in first image duration reduces.Therefore, the brightness of the second pixel electrode Pa also weakens thereupon.

In Fig. 9 B, the luminance difference data refer to: about poor with about the brightness RMS numerical value of the second pixel electrode Pb of the Type B pixel of first and second frames of the brightness RMS numerical value of the second pixel electrode Pb of the A type pixel of first and second frames.Shown in Fig. 9 B, even have luminance difference between the second sub-pixel Pb in A type and Type B pixel under the high grade grey level level, luminance difference also only is about 2.5% or lower.This just means, even when the second pixel electrode Pb and first, second data line Da, Db overlapping, also only have less coupling capacitance between the second pixel electrode Pb and first, second data line Da, the Db.Below, with reference to Figure 10 to Figure 11 C, will the exemplary L CD of the 3rd exemplary embodiment according to the present invention be described.Be convenient and describe, with same reference numbers represent to have with the foregoing description in the parts of those parts identical functions, and thereby omit description to it.Hereinafter only be described at difference.

At first, Figure 10 shows the equivalent circuit diagram of exemplary display signal line and exemplary pixels.Figure 10 is the equivalent circuit diagram of an exemplary pixels among the exemplary L CD of the 3rd exemplary embodiment according to the present invention.

As shown in figure 10, display signal line comprises gate lines G _L, data line D _LAnd first, second storage line SL ₁, SL ₂First, second storage line SL ₁, SL ₂Substantially to be parallel to gate lines G _LDeng direction extend.

In addition, each pixel PX includes for example first and second sub-pixel P _H, P _LHere, the first and second sub-pixel P _H, P _LComprise: switching device Q1, Q2, they are connected to gate lines G _LWith data line D _LLiquid crystal capacitor Clca, Clcb, they are connected to switching device Q1, Q2; And holding capacitor Csta, Cstb, they are connected to switching device Q1, Q2 and storage line SL ₁, SL ₂

Particularly, the first sub-pixel P _HComprise: the first switching device Q1, it is connected in gate lines G _LWith data line D _LThe first liquid crystal capacitor Clca, it is connected in the first switching device Q1; And the first holding capacitor Csta, it is connected in the first switching device Q1 and the first storage line SL ₁In addition, the second sub-pixel P _LComprise: the second switching device Q2, it is connected in gate lines G _LWith data line D _LThe second liquid crystal capacitor Clcb, it is connected in the second switching device Q2; And the second holding capacitor Cstb, it is connected in the second switching device Q2 and the second storage line SL ₂。

Corresponding first, second sub-pixel P _H, P _LThe first and second switching device Q1, Q2 from same gate lines G _LBranch forms, and can comprise TFT etc.Here, each first and second switching device Q1 and Q2 all can be three terminal components, and comprising: as the gate electrode of control terminal, it is connected in gate lines G _LAs the source electrode of input terminal, it is connected in data line D _LAnd as the drain electrode of lead-out terminal, it is connected in each liquid crystal capacitor Clca, Clcb and each the first and second holding capacitor Csta, Cstb.

Each liquid crystal capacitor Clca and Clcb all have two terminals of the common electrode of first, second pixel electrode of bottom display panel and top display panel, and the liquid crystal layer between first, second pixel electrode Pa, Pb and common electrode is as insulator.First, second pixel electrode is connected with Q2 with switching device Q1 respectively.Common electrode is formed on the whole surface of top display panel or on the almost whole surface, and is subjected to common voltage Vcom.

Assist first, second holding capacitor Csta, the Cstb of first, second liquid crystal capacitor Clca, Clcb to have first, second storage line SL respectively ₁, SL ₂And overlap each other and be located at first, second pixel electrode on the display panel of bottom, be inserted with insulating material between first, second pixel electrode.First, second storage voltage can put on first, second storage line SL respectively ₁, SL ₂On.First, second storage voltage can have the numerical value that differs from one another, such as, be anti-phase common voltage Vcom each other.

Here, at the first sub-pixel P _HFirst pixel electrode and the second sub-pixel P _LSecond pixel electrode in can form different data voltages.

Particularly, by first, second switching device Q1, Q2 from data line D _LIn apply identical data voltage to first pixel electrode with second pixel electrode.Here, because first pixel electrode and the first storage line SL ₁Link to each other, be applied to the data voltage of first pixel electrode and be applied to the first storage line SL ₁First storage voltage be coupled, so the numerical value of data voltage changes.In an identical manner, because second pixel electrode and the second storage line SL ₂Link to each other, be applied to the data voltage of second pixel electrode and be applied to the second storage line SL ₂Storage voltage be coupled, so the numerical value of data voltage changes.As mentioned above, when first, second storage voltage had the voltage that differs from one another, as a result of, the data voltage that forms in first and second pixel electrodes also had mutually different voltage.

Such as, the data voltage that forms in first pixel electrode can have the numerical value bigger than the data voltage that forms in second pixel electrode.In this case, the first sub-pixel P _HCan under low gray scale level, bring into operation, and the second sub-pixel P _LCan be in middle gray level or more move under the high grade grey level level.

Below, with reference to Figure 11 A to Figure 11 C, will describe the exemplary bottom display panel of the exemplary L CD of the 3rd exemplary embodiment according to the present invention in detail.Here, Figure 11 A is the arrangenent diagram of exemplary bottom display panel of the exemplary L CD of the 3rd exemplary embodiment according to the present invention.Figure 11 B is the arrangenent diagram along the exemplary bottom display panel of the XIB-XIB ' line intercepting of Figure 11 A.Figure 11 C is the sectional view along the exemplary bottom display panel of the XIC-XIC ' line intercepting of Figure 11 A.

Gate line 122 is formed on the insulated substrate 10 with first,

second storage line

128a, 128b, and insulated substrate is for example made by clear glass etc.

Many gate line 122 extends along first direction (for example, horizontal direction), and separated from each other, mutual electricity is isolated.Gate line 122 transmits signal.In addition, in pixel column, corresponding each pixel forms the gate electrode 126 that forms with shape for lugs on every gate line 122.Gate line 122 is a gate wirings with gate electrode 126 nominals.

The first and

second storage line

128a, 128b extend on the direction identical with gate line 122 substantially, have

storage electrode

129a, 129b respectively.Storage electrode has the width bigger than storage line 128a, 128b.Here, pixel electrode 182 (following also will introduce in detail) overlaps mutually with first,

second storage electrode

129a, 129b, thereby forms holding capacitor, and this holding capacitor has improved the charge capacity of pixel.The first and

second storage line

128a, 128b and first,

second storage electrode

129a, 129b nominal are the storage distribution.In alternative embodiment, the shape of the first and

second storage line

128a, 128b and first,

second storage electrode

129a, 129b and arrangement can change by different way.First, second storage voltage from the outside supply such as being mutually anti-phase common voltage Vcom, can put on first, second storage line 128a, the 128b.

Gate wirings 122,126 and

storage distribution

128a, 128b, 129a, 129b can be with making with the previous essentially identical material of describing with reference to Fig. 3 A of

gate wirings

22,26a, 26b.

The gate insulator of being made by silicon nitride etc. 30 is formed on gate wirings 122,126 and

storage distribution

128a, 128b, 129a, the 129b, and on the exposed surface of insulated substrate 10.

The semiconductor layer of being made by amorphous silicon hydride or polysilicon 140 is formed on the gate insulator 30.Semiconductor layer 140 can have multiple shape, as island or strip.Such as, shown in Figure 11 A, semiconductor layer 140 is island, and forms to such an extent that overlap with the occupied zone of gate electrode 126.

By silicide or mix the ohmic contact layer 155,156 that the n+ hydrogenation a-Si of n type impurity makes with high concentration and be formed on the semiconductor layer 140.

Data line 162, source electrode 165, first,

second drain electrode

166a, 166b are formed on ohmic contact layer 155,156 and the gate insulator 30.

Data line 162 extends along second direction (for example, vertical direction), intersects mutually with gate line 122,

storage line

128a, 128b, and transmits data voltage.Source electrode 165 extends and extends towards first,

second drain electrode

166a, 166b from every gate line 162.Shown in Figure 11 A, be transmitted to each first,

second pixel electrode

182a, 182b to the data voltage that source electrode 165 applies by each first,

second drain electrode

166a, 166b from data line 162.

Data line 162, source electrode 165 and first,

second drain electrode

166a, 166b nominal are data wiring.Data wiring 162,165,166a, 166b can be with making with the previous essentially identical material of describing with reference to Fig. 3 A of

data wiring

62a, 62b, 65a, 65b, 66a, 66b.

Semiconductor layer 140 partly overlaps with source electrode 165, and the source electrode is with branch shape branch from data line 162.Semiconductor layer 140 is at least in part by overlapping with respect to first, second drain electrode 166a, the 166b of gate electrode 126 towards source electrode 165.Here, ohmic contact layer 155,156 above-mentioned may be present between semiconductor layer 140 and the source electrode 165 and semiconductor layer 140 and first,

second drain electrode

166a, 166b between to reduce contact resistance.

Each first,

second drain electrode

166a, 166b include: the shaft-like pattern that overlaps with the semiconductor layer 140 that adjoins source electrode 165 and extend and have a drain electrode extension with the big overlapping area of

storage electrode

129a, 129b from shaft-like pattern.First,

second contact hole

176a, 176b are positioned on each drain electrode extension.Drain electrode extension and pixel electrode 182 or first,

second storage electrode

129a, 129b overlap mutually to form holding capacitor.

Passivation layer 70 is formed on data wiring 162,165,166a, 166b and the exposed semiconductor layer 140, and on the exposed part of gate insulator 30.First,

second contact hole

176a, 176b form to such an extent that pass the large tracts of land part of passivation layer 70 with the drain electrode extension of exposing first,

second drain electrode

166a, 166b.

The pixel electrode 182 that is formed on the passivation layer 70 comprises first,

second pixel electrode

182a, 182b, and pixel electrode is separated from each other by gap 183.Here, each sub-pixel 182a, 182b all can be made by transparent electrical conductors (such as ITO or IZO) or reflectivity electric conductor (as aluminium).

First,

second pixel electrode

182a, 182b are electrically connected with first,

second drain electrode

166a, 166b by first,

second contact hole

176a, 176b respectively, and are provided with coming from the data voltage of first,

second drain electrode

166a, 166b.

Be subjected to first, second pixel electrode 182a, the 182b of data voltage and the common electrode on the display panel of top and produce electric field jointly, thereby determined the arrangement of the liquid crystal molecule between first,

second pixel electrode

182a, 182b and the common electrode.

In addition, with reference to Figure 10 and Figure 11 A,

pixel electrode

182a, 182b and common electrode form liquid crystal capacitor Clca, Clcb, even and after closing TFT Q1, Q2, still can keep the voltage that is applied.Keep ability in order to increase voltage, can form the holding capacitor Csta, the Cstb that are connected in parallel with liquid crystal capacitor Clca and Clcb in the following manner, described mode promptly makes

storage distribution

128a, 128b overlap by first,

second pixel electrode

182a, 182b or by first, second drain electrode 166a, the 166b that link to each other with first,

second pixel electrode

182a, 182b.

First, second storage voltage with different numerical value can put on first,

second storage line

128a, 128b respectively.Such as, first, second storage voltage can be and is mutually anti-phase common voltage Vcom.

Because first,

second pixel electrode

182a, 182b are connected with first,

second storage line

128a, 128b respectively, the data voltage that puts on the first sub-pixel 182a also is coupled with first, second storage voltage respectively with the data voltage that puts on the second sub-pixel 182b, so its numerical value changes.

For example, first and second storage voltages can be and are mutually anti-phase voltage.Therefore, having predetermined magnitude of voltage between first, second pixel electrode 182a, the 182b departs from.Such as, even receive data voltage from identical data line 162, the data voltage that forms among the first pixel electrode 182a also may be higher than the data voltage that forms among the second pixel electrode 182b.In the exemplary embodiment, the first pixel electrode 182a can move under low gray scale level, and the second pixel electrode 182b can be in middle gray scale level or more moved under the high grade grey level level.

Get back to Figure 11 A to Figure 11 C, a pixel electrode 182 comprises first,

second pixel electrode

182a, 182b, separates gap 183 between them, and electrically isolated from one.

Preferably, the first pixel electrode 182a is formed in the pixel region so that non-intersect folded with data line 162.Such as, the first pixel electrode 182a may have rectangular shape as shown in the figure, but the present invention is not limited thereto.

The second pixel electrode 182b is formed at the zone of removing in the pixel outside the first pixel electrode 182a.More particularly, the second pixel electrode 182b centers on outward flange or the periphery of the first pixel electrode 182a, that is, and and on the first pixel electrode 182a/down/left side/right side.Preferably, at least a portion of the second pixel electrode 182b and data line 162 overlap mutually.The second pixel electrode 182b can with data line 162 overlapping preset width d2, overlapping width d2 can be in the scope of about 2 to 3 μ m.The second pixel electrode 182b can overlap with the data line 162 that the second pixel electrode 182b therefrom receive data voltage, the second pixel electrode 182b also can with adjoin data line 162 and overlap.Here, thus the second pixel electrode 182b and data line 162 overlaps and increases the aperture ratio of LCD.

The width in the gap 183 that first,

second pixel electrode

182a, 182b are separated from each other can be d1, and the size of d1 for example is approximately 5 to 6 μ m.

Originally, by data line 162 identical data voltage is imposed on first, second pixel electrode 182a, 182b.But, because being connected between first,

second storage line

128a, 128b and first, second pixel electrode 182a, the 182b, in the first pixel electrode 182a, form higher data voltage, and in the second pixel electrode 182b, form lower data voltage.Like this, the side visibility of LCD is improved.

In addition, the first pixel electrode 182a and data line 162 do not overlap, but the second pixel electrode 182b is located between the first pixel electrode 182a and the data line 162 to prevent the coupling between the two.Like this, can prevent the cross-talk of vertical direction effectively.

Particularly, when LCD moves under low gray scale level, because liquid crystal by being subjected to the first pixel electrode 182a operation of low voltage, therefore can prevent the cross-talk of vertical direction by preventing the coupling between the first pixel electrode 182a and the data line 162 basically effectively.

Be used to arrange the formation layer (not shown) of liquid crystal layer applicable to first,

second pixel electrode

182a, 182b and passivation layer 70.

Below, with reference to Figure 12 A, 12B, will the exemplary bottom display panel to exemplary L CD of the 4th exemplary embodiment according to the present invention be described.Here, Figure 12 A is the arrangenent diagram of exemplary bottom display panel of the exemplary L CD of the 4th exemplary embodiment according to the present invention.Figure 12 B is the sectional view along the exemplary bottom display panel of the line XIIB-XIIB ' intercepting of Figure 12 A.Be convenient and describe, with same reference numbers represent to have with the foregoing description in the parts of those parts identical functions, and thereby omit description to it.Hereinafter only be described at difference.

The first storage distribution 127,128a, the 129a that link to each other with the first pixel electrode 182a comprise: the first storage line 128a, along extending with gate line 122 essentially identical directions; The first storage electrode 129a, outstanding from the first storage line 128a, have big width, and form holding capacitor by overlapping with the first drain electrode 166a; And auxiliary storage electrode 127, it is branch from the

first storage line

128a, and 183 extensions along the gap.In an illustrated embodiment, the first of auxiliary storage electrode 127 along the gap part of 183 extend, this part adjacent pixels electrode 182 therefrom receives the data line 162 of data voltage, the second portion of auxiliary storage electrode 127 along the gap part of 183 extend, this part is adjoined the data line 162 of adjacent pixels in the line direction.

Can the separate each other width in gap 183 of first,

second pixel electrode

182a, 182b for example, separates the width that is approximately 5 to 6 μ m.For preventing that by gap 183 light taking place leaks, the auxiliary storage electrode 127 of branch overlaps mutually with gap 183 from the first storage line 128a, like this, is just blockaded around the gap 183, thereby can prevent that light from leaking.

Auxiliary storage electrode 127 can be from the first storage line 128a branch, and basic and data line 162 extends in parallel.

Hereinafter, with reference to Figure 13 to Figure 16, will the exemplary L CD of the 5th exemplary embodiment according to the present invention be described.

Figure 13 shows the part of exemplary bottom display panel of the exemplary L CD of the 5th exemplary embodiment according to the present invention.

With reference to Figure 13, bottom display panel 210 comprises: substrate plate 212, many gate lines G L1 to GLn (only exemplarily marking GL3-GL6 among the figure) and a plurality of data line are to DL1/DL2, DL3/DL4, DL5/DL6 to DLm-1/DLm (only exemplarily marking DL3/DL4-DL7/DL8 among the figure) and a plurality of pixel PX.The bottom display panel 210 of the 5th exemplary embodiment also comprises to each pixel according to the present invention provides the first switching device T1 of two opposed polarity data voltages and the second switching device T2 (in as Figure 14 in greater detail).

Substrate plate 212 is for transparent insulation substrate and comprise a plurality of pixel region PA with matrix arrangement.Many gate lines G L1 to GLn and a plurality of data line form and are laid on the substrate plate 212 DL1/DL2, DL3/DL4, DL5/DL6 to DLm-1/DLm.Many gate lines G L1 to GLn extends along second direction D2.A plurality of data lines extend along first direction D1 substantially to DL1/DL2, DL3/DL4, DL5/DL6 to DLm-1/DLm, so that a plurality of data line pair also intersects with it with many gate lines G L1 to GLn mutually insulateds.

Here, data line is to form by per two adjacent data lines are divided into one group to DL1/DL2, DL3/DL4, DL5/DL6 to DLm-1/DLm, and a pixel region PA and each data line are to overlapping.Each data line is to having the z glyph shape, thereby wherein this right shape of data line is repeating just to have " M " shape in each pixel region PA on the second direction D2.

Be formed with a plurality of pixel electrode PX on a plurality of pixel region PA respectively, such as PX1, PX2, they are arranged with matrix shape.Each pixel electrode PX comprises first pixel electrode (such as the PXa of pixel electrode PX1, the PXc of pixel electrode PX2), and second pixel electrode (such as the PXb of pixel electrode PX1, the PXd of pixel electrode PX2), they sequentially form along second direction D2.In addition, except that pixel electrode PX, first, second thin film transistor (TFT) T1, T2 also are formed on the pixel region PA.

Figure 14 is the structure that shows in detail an exemplary pixels electrode PX1 shown in Figure 13.

With reference to Figure 14, pixel electrode PX1 comprises the first pixel electrode PXa and the second pixel electrode PXb.Pixel electrode PX1 has the center, and this center is parallel to gate lines G L3 along direction bending left, and this pixel electrode PX1 is about this flexural center symmetry.Thereby the two ends of pixel electrode PX1 are along to the right bending, and are opposite with the center curvature direction of pixel electrode PX1.

Adjacent one another are and form along first direction D1 substantially with the corresponding data line DL4 of pixel electrode PX1 and data line to another data line DL3 among the DL3/DL4.Thereby pixel electrode PX1 and data line overlap to DL3/DL4.Data line DL3 can be applied in different data voltage mutually with DL4, and data line DL4 transmits data voltage to pixel electrode PX1.

The first film transistor T 1 is formed by gate lines G L3 and data line DL4, and the first pixel electrode PXa is electrically connected on the first film transistor T 1.The first film transistor T 1 comprises: branch is in the first grid electrode G1 of gate lines G L3; Branch is in the first source electrode S1 of data line DL4; And separate and be electrically connected on the first drain electrode D1 of the first pixel electrode PXa by the first contact hole H1 with the first source electrode S1.

The second thin film transistor (TFT) T2 is formed by gate lines G L3 and data line DL5, and the second pixel electrode PXb is electrically connected on the second thin film transistor (TFT) T2.Here, it should be noted that data line DL5 forms correspondingly with adjacent pixel electrodes PX2, that is, overlap with adjacent pixel electrodes PX2.

The second thin film transistor (TFT) T2 comprises: branch is in the second grid electrode G2 of gate lines G L3; Branch is in the second source electrode S2 of data line DL5, and itself and adjacent pixel electrodes PX2 are laid accordingly; And separate, and the second drain electrode D2 that is electrically connected with the second pixel electrode PXb by the second contact hole H2 with the second source electrode S2.

Apply different data voltage to the first pixel electrode PXa with the second pixel electrode PXb by first, second thin film transistor (TFT) T1, T2.

First, second pixel electrode PXa, the PXb of pixel electrode PX1 belong to same pixel region PA.To first, second pixel electrode PXa, PXb the applies different pieces of information voltage corresponding and complementary with identical image information so that show high-quality image.For example, putting on the change width of the voltage level (based on common voltage Vcom) of the data voltage of the first pixel electrode PXa may be more greater or lesser than the change width of the voltage level (based on common voltage Vcom) of the data voltage that puts on the second pixel electrode PXb.And the data voltage that puts on the first pixel electrode PXa may have reciprocal differing with the data voltage that puts on the second pixel electrode PXb.Figure 14 shows the area of the first pixel electrode PXa wherein and is designed to example greater than the area of the second pixel electrode PXb.

When the area of the second pixel electrode PXb that is subjected to higher data voltage than the area of the first pixel electrode PXa hour, can make the bending of sidepiece gamma more approach anterior gamma bending.In more detail, when the area ratio between the first pixel electrode PXa and the second pixel electrode PXb was about 2: 1 to 3: 1, the bending of sidepiece gamma more approached anterior gamma bending, had therefore improved the sidepiece visibility.

Therefore, in being formed with the zone of first, second pixel electrode PXa, PXb, different optical characteristics occurs, and light is seen the characteristic complementation, thereby can further improve display quality.

Simultaneously, as shown in figure 14, the pixel electrode PX1 that comprises the first pixel electrode PXa and the second pixel electrode PXb forms in pixel region PA has the M shape, and it is symmetry on the longitudinal direction of gate lines G L3.In addition, adjacent data line DL3, DL4 has the corresponding shape with pixel electrode PX1, and the first pixel electrode PXa and data line DL3, DL4 overlapping.Preferably, the first pixel electrode PXa and data line overlap fully to adjacent data line DL3, the DL4 of DL3/DL4.

Usually, unit pixel area is limited by gate line and data line.At this moment, the edge of data line and pixel region overlaps, or is formed on the edge of pixel region.In this case, in the processing that forms pattern, be difficult to keep the predetermined space between pixel region and the data line.

Therefore, in bottom display panel according to an exemplary embodiment of the present invention, pixel electrode overlaps with data line fully, so can eliminate the coupling error that produces owing to the irregular spacing between data line pair and the pixel electrode.

Figure 15 shows the block diagram of the exemplary bottom display panel applications shown in Figure 13 in wherein exemplary L CD.In order to simplify, the data line that is connected with each pixel electrode PX is to illustrating with straight line.Yet shown in Figure 13,14, each data line is to all laying with zigzag, and each pixel electrode PX and data line are to overlapping.

LCD 300 shown in Figure 15 comprises liquid crystal panel 310, time controller 320, grayscale voltage generator 330, data driver 340 and gate drivers 350.Though liquid crystal panel 310 is applied among the LCD300 shown in Figure 15, other element of LCD 300 also is suitable for being used in combination with the liquid crystal panel of the bottom display panel that comprises aforementioned arbitrary embodiment.

Liquid crystal panel 310 can comprise the bottom display panel 210 of Figure 13 and face the top display panel (not shown) of bottom display panel 210.

Time control viewdata signal R, G, B that time controller 320 is required according to data driver 340 and gate drivers 350, and output viewdata signal R, the G, the B that are controlled.In addition, time controller 320 outputs are used for first, second control signal CNTL1 and the CNTL2 of control data driver 340 and gate drivers 350.The example of the first control signal CNTL1 can comprise horizontal synchronization start signal STH, data output signal TP, or the like.And the example of the second control signal CNTL2 can comprise scanning start signal STV, gate clock signal CPV, allow output signal OE, or the like.

Grayscale voltage generator 330 produces many grayscale voltages relevant with the transmission of pixel electrode PX, and the grayscale voltage that produces is offered data-driven 340 devices described below.

Data driver 340 drives the data line of liquid crystal panel 310 to DL1/DL2, DL3/DL4 to DLm-1/DLm in response to the first control signal CNTL1 that provides from time controller 320 and from the grayscale voltage that grayscale voltage generator 330 applies.

The first control signal CNTL1 and picture signal DAT that data driver 340 receives about a pixel column from time controller 320, and in the grayscale voltage that produces by grayscale voltage generator 330, select and the corresponding grayscale voltage of each digital signal DAT.Afterwards, after data driver 340 was converted to corresponding data voltage with selected grayscale voltage, data driver 340 offered corresponding data line to DL1/DL2, DL3/DL4 to DLm-1/DLm with data voltage.As mentioned above, it is right that the voltage with the data voltage that differs opposite each other and varying level is applied in data line.

Gate drivers 350 is in response to the second control signal CNTL2 that imports from time controller 320 and from driving voltage generator (not shown) connection voltage VON that exports and the gate lines G L1 to GLn that closes voltage VOFF driving liquid crystal panel 310.Gate drivers 350 offers pixel electrode PX by gate lines G L1 to GLn with grid voltage respectively, and " connect or close " first, second thin film transistor (TFT) (T1 shown in Figure 14, T2) of linking to each other with each pixel electrode PX.

Figure 16 puts on each exemplary pixels electrode comprises the picture pattern of white pattern and grey colored pattern with execution the oscillogram of data voltage.

With reference to Figure 16, the voltage waveform of data line DL3 is the voltage waveform that puts on first pixel electrode (PXa shown in Figure 13) from data driver 340, and the voltage waveform of data line DL4 is for putting on the voltage waveform of second pixel electrode (PXb shown in Figure 13) from data driver 340.

As Figure 13 and shown in Figure 16, preferably, the voltage waveform of data line DL3, DL4 has phase opposite each other and change, so that adjoin data line DL3/DL4 is remedied coupling effect on the pixel electrode PX1.So just can eliminate each pixel electrode PX and the coupling of data line fully to taking place between DL1/DL2, the DL3/DL4 to DLm-1/DLm.

Therefore, each pixel electrode (especially, first pixel electrode) overlaps to DL1/DL2, DL3/DL4 to DLm-1/DLm with each data line fully, thus the coupling error between elimination data line pair and the pixel electrode PX.In addition, data line is to being subjected to data voltage respectively, and this data voltage is along the direction fluctuation of cancelling out each other.Therefore, the coupling between data line pair and the pixel electrode promptly is eliminated.

As mentioned above, according to the LCD of exemplary embodiment of the present, can prevent that the light around the data line from leaking, and can increase the aperture ratio.In addition, the coupling capacitance between pixel electrode and first, second data line reduces, thereby prevents the degeneration of LCD display characteristic.Can prevent like this and may hang down the vertical cross-talk that take place under the gray scale level.

In addition, thus the gap between first and second pixel electrodes can stop by storage electrode and prevent that light from leaking.

In addition, can increase the visibility of LCD and obtain high aperture ratio.

Although described the present invention in conjunction with exemplary embodiment of the present invention, it should be appreciated by those skilled in the art, under the prerequisite that does not deviate from the scope of the invention and spirit, can make various changes and variation to the present invention.Therefore, it should be understood that above-mentioned exemplary embodiment is not restrictive in all respects, but indicative.

Claims

1. LCD comprises:

First insulated substrate;

Gate wirings is formed on described first insulated substrate and along first direction and extends;

Data wiring also intersect with it with described gate wirings insulation, and described data wiring extends along second direction; And

Pixel electrode, each described pixel electrode includes first and second pixel electrodes that are subjected to from the different pieces of information voltage of described data wiring,

Wherein, at least a portion of each second pixel electrode and described data wiring overlap.

2. LCD according to claim 1, wherein, for each pixel electrode, the data voltage that puts on described first pixel electrode is higher than the data voltage that puts on described second pixel electrode.

3. LCD according to claim 1, wherein, for each pixel electrode, described second pixel electrode overlaps with corresponding data wiring fully along the Width of described data wiring.

4. LCD according to claim 1, wherein, for each pixel electrode, described first pixel electrode comprises the V-arrangement shape, and described second pixel electrode is formed in the zone except that described first pixel electrode of pixel.

5. LCD according to claim 1, wherein, for each pixel electrode, described second pixel electrode forms around described first pixel electrode.

6. LCD according to claim 5, wherein, for each pixel electrode:

Described second pixel electrode comprise towards described data wiring tilt substantially about 45 ° or approximately-45 ° main areas and along described data wiring setting and with the bridge areas as there of its overlapping, and described bridge areas as there is connected to described main areas.

7. LCD according to claim 1, wherein, for each pixel electrode, described first pixel electrode does not overlap with described data wiring.

8. LCD according to claim 1, wherein, for each pixel electrode, described data wiring comprises many first and second data lines, and described first and second data lines provide different data voltages to described first and second pixel electrodes respectively.

9. LCD according to claim 8, wherein, the first type pixel and the second type pixel are along the first and second direction arranged alternate, each described first type pixel has first pixel electrode that is provided with from the data voltage of first data line, and each described second type pixel has first pixel electrode that is provided with from the data voltage of second data line.

10. LCD according to claim 1 further comprises:

Storage line and storage electrode are formed on described first insulated substrate, and are basically parallel to described gate wirings and extend;

The auxiliary storage electrode is connected to described storage line, and is basically parallel to described data wiring and extends.

11. LCD according to claim 10, wherein, gap portion ground that in each pixel electrode described first and second pixel electrodes is separated from each other and described auxiliary storage electrode overlap.

12. LCD according to claim 11, wherein, for each pixel electrode, at least a portion of described first pixel electrode and described auxiliary storage electrode overlaps.

13. LCD according to claim 12, wherein, the width that described auxiliary storage electrode and described first pixel electrode overlap each other at about 1 μ m to the scope of about 3 μ m.

14. LCD according to claim 1 further comprises:

The second insulated substrate is in the face of described first insulated substrate;

Common electrode is formed on the described the second insulated substrate; And

Liquid crystal layer, between described first and second insulated substrates, and described liquid crystal layer comprises liquid crystal molecule.

15. LCD according to claim 1 further comprises the passivation layer that is formed by organic material, and described passivation layer is between described data wiring and described pixel electrode.

16. a LCD comprises:

Gate wirings and data wiring, insulated from each other and intersected with each other on insulated substrate;

A pair of first and second thin film transistor (TFT)s are connected to described gate wirings and described data wiring;

First pixel electrode is connected to described the first film transistor;

Second pixel electrode around described first pixel electrode, with described first pixel electrode gap that separates each other, and is connected to described second thin film transistor (TFT);

First storage line overlaps with described first pixel electrode and receives first storage voltage; And

Second storage line is with described second pixel electrode overlapping and reception second storage voltage different with described first storage voltage.

17. LCD according to claim 16, wherein, described second storage voltage and described first storage voltage are anti-phase.

18. LCD according to claim 16, wherein, the identical data voltage that imposes on described first and second pixel electrodes from described data line differs from one another owing to the coupling between described identical data voltage and described first and second storage voltages becomes.

19. LCD according to claim 16, wherein, described first pixel electrode and described data wiring are non-intersect folded, and at least a portion of described second pixel electrode and described data wiring overlap mutually.

20. LCD according to claim 19, wherein, the overlapping width of described second pixel electrode and described data wiring at about 2 μ m to about 3 μ m.

21. LCD according to claim 16 further comprises:

Storage electrode comes out from the described first storage line branch, and overlaps with described gap.

22. LCD according to claim 21, wherein, described storage electrode is basically parallel to described data wiring and extends.

23. LCD according to claim 16 further comprises the passivation layer that is formed by organic material, and described passivation layer is between described data wiring and described first and second pixel electrodes.

24. a LCD comprises:

Gate line;

Data line is right, also intersects with it with described gate line insulation; And

Pixel electrode, be electrically connected to described gate line respectively and described data line is right, wherein, each described pixel electrode includes first pixel electrode and area second pixel electrode less than described first pixel electrode, and described first pixel electrode and described data line are to overlapping.

25. LCD according to claim 24, wherein:

Each described pixel electrode all has the flexural center along the first direction bending parallel with described gate line, and each described pixel electrode is about described flexural center symmetry, and

The two ends of each pixel electrode are all along the second direction bending, and described second direction is opposite with described first direction based on described flexural center.

26. LCD according to claim 25, wherein, each described data line is to all having and the corresponding shape of the shape of each pixel electrode, and overlapped by described first pixel electrode of each pixel electrode.

27. LCD according to claim 25, wherein, each described data line is to all forming with zigzag, and overlapped by described first pixel electrode of each pixel electrode.

28. LCD according to claim 24 further comprises:

First and second thin film transistor (TFT)s provide from two kinds of right data voltages of described data line to described first and second pixel electrodes respectively.

29. LCD according to claim 28, wherein, described two kinds of data voltages have reciprocal phase.

30. LCD according to claim 28, wherein, described two kinds of data voltages have different voltage levels.

31. LCD according to claim 24 also comprises the passivation layer that is formed by organic material, and described passivation layer is between described data line pair and described pixel electrode.

32. a method that is used to improve the display quality of LCD, described LCD has the pixel region matrix, and described method comprises:

Form gate wirings on insulated substrate, described gate wirings is extended along first direction substantially;

Form the data wiring that insulate with described gate wirings, described data wiring extends along second direction substantially, and described second direction is vertical substantially with described first direction;

In each pixel region, form first and second pixel electrodes, make that described second pixel electrode centers on described first pixel electrode at least in part and has than the big area of described first pixel electrode at second pixel electrode described in each pixel region and adjacent data wiring overlapping; And

Apply data voltage to described first pixel electrode, described data voltage is greater than the data voltage that puts on described second pixel electrode.