CN101034725A

CN101034725A - Fork structure silicon LED made with the standard CMOS technology

Info

Publication number: CN101034725A
Application number: CNA2006100114489A
Authority: CN
Inventors: 陈弘达; 刘海军; 黄北举
Original assignee: Institute of Semiconductors of CAS
Current assignee: Institute of Semiconductors of CAS
Priority date: 2006-03-08
Filing date: 2006-03-08
Publication date: 2007-09-12
Anticipated expiration: 2026-03-08
Also published as: CN100438105C

Abstract

The invention is an interdigital structured silicon LED made by standard COMS process, comprising: a P-type silicon substrate; an N-well made in the middle of the P-type substrate; a N+ interdigital diffusion region made in the N-well; a first metal contact made in the N+ interdigital diffusion region; a P+ interdigital diffusion region made in the N-well; a second metal contact made in the P+ interdigital diffusion region; a P+ diffusion region protection ring made on the P-type Si substrate; a third metal contact made on one side of the P+ diffusion region protection ring; a SiO2 layer covered on the whole top surface of the device structure; a fourth metal contact made on the other side of the P+ diffusion region protection ring; and the middle of the SiO2 layer is formed with a light emitting window.

Description

The fork structure silicon LED that adopts standard CMOS process to make

Technical field

The present invention relates to technical field of semiconductor luminescence, particularly a kind of fork structure silicon LED that adopts CMOS technology to make.

Background technology

In recent years, optical communication field has been obtained develop rapidly, is bringing into play more and more important effect in people's daily life.Opto-electronic device is expected to become the effective way that solves the silica-based microelectronic integrated circuit development of restriction according to its clear superiority on transmission bandwidth, antijamming capability and energy consumption.Utilize silicon as stock, adopt ripe standard CMOS process to make opto-electronic device and optoelectronic integrated circuit, have incomparable advantage on the cost He on the technical maturity, will become the preferred option of making opto chip and solving the electrical interconnection problem.

Silica-based light emitting devices is that the silicon based opto-electronics subclass becomes the important component part in the loop.Since this device have be suitable for integrated, cost is low, be easy to advantage such as large-scale production, the optic electric interface as chip chamber or chip internal in optical interconnection system of future generation has boundless application prospect.The present invention is a kind of fork structure silicon LED that adopts standard CMOS process to make, and this device adopts standard CMOS process to make, and is operated under the working inverse voltage, when reaching threshold condition, can realize efficient laser output.And compatible fully on this device technology with microelectronic integrated circuit, can be used as the light source device in the interconnect die, be suitable for making the silicon based opto-electronics subclass and become the loop.

Summary of the invention

The purpose of this invention is to provide a kind of fork structure silicon LED that adopts standard CMOS process to make, its have manufacture craft maturation, cost low, be suitable for integrated, be easy to advantage such as large-scale production, in light interconnection of future generation and total silicon optical chip, have boundless application prospect.

A kind of fork structure silicon LED that adopts standard CMOS process to make of the present invention is characterized in that, comprising:

One P type silicon substrate;

One N trap, this N trap is produced on the middle part on the P type substrate;

One N+ interdigitation diffusion region, this N+ interdigitation diffusion region is produced in the N trap;

One first Metal Contact, this first Metal Contact are produced on this N+ interdigitation diffusion region;

One P+ interdigitation diffusion region, this P+ interdigitation diffusion region is produced in the N trap;

One second Metal Contact, this second Metal Contact are produced on this P+ interdigitation diffusion region;

One P+ diffusion region guard ring, this P+ diffusion region guard ring are produced on the P type Si substrate;

One the 3rd Metal Contact, the 3rd Metal Contact are produced on the side on this P+ diffusion region guard ring;

One silicon dioxide layer, this silicon dioxide layer covers the entire upper surface of device architecture;

One the 4th Metal Contact, the 4th Metal Contact are produced on the opposite side on this P+ diffusion region guard ring;

Intermediate fabrication at this silicon dioxide layer forms a luminescence window.

Wherein this P+ interdigitation diffusion region closely contacts with N+ interdigitation diffusion region, forms staggered P+N+ knot, and contact-making surface is made zigzag fashion, and it can reduce puncture voltage, increases contact area, improves light output efficiency.

Wherein this P+ diffusion region guard ring is produced on the P type Si substrate and is centered around around the N trap, prevents Carrier Leakage, improves Output optical power.

Wherein this luminescence window is produced on the contact-making surface top of P+ interdigitation diffusion region and N+ interdigitation diffusion region, thickness by the silicon dioxide layer above attenuate P+ interdigitation diffusion region and the N+ interdigitation diffusion region contact-making surface, reduce the light output loss, improve light output efficiency.

Description of drawings

For further specifying concrete technology contents of the present invention, be described in detail as follows below in conjunction with embodiment and accompanying drawing, wherein:

The fork structure silicon LED vertical view that Fig. 1 adopts standard CMOS process to make;

Fig. 2 adopts the fork structure silicon LED profile that standard CMOS process makes (A-A ').

Embodiment

See also Figure 1 and Figure 2, a kind of fork structure silicon LED that adopts standard CMOS process to make of the present invention is characterized in that, comprising:

One P type silicon substrate 10;

One N trap 11, this N trap 11 is produced on the middle part on the P type substrate 10;

One N+ interdigitation diffusion region 12, this N+ interdigitation diffusion region 12 is produced in the N trap 11, makes first Metal Contact 16 on this N+ interdigitation diffusion region 12;

One P+ interdigitation diffusion region 13, this P+ interdigitation diffusion region 13 is produced in the N trap 11, makes second Metal Contact 17 on this P+ interdigitation diffusion region 13;

Wherein this P+ interdigitation diffusion region 13 closely contacts with N+ interdigitation diffusion region 12, forms staggered P+N+ knot, and contact-making surface is made zigzag fashion, and it can reduce puncture voltage, increases contact area, improves light output efficiency;

One P+ diffusion region guard ring 14, this P+ diffusion region guard ring 14 are produced on the P type Si substrate 10, make the 3rd Metal Contact 18 and the 4th Metal Contact 19 on this P+ diffusion region guard ring 14; This P+ diffusion region guard ring 14 is produced on the P type Si substrate 10 and is centered around around the N trap 11, prevents Carrier Leakage, improves Output optical power;

One silicon dioxide layer 20, this silicon dioxide layer 20 covers the entire upper surface of device architecture, intermediate fabrication one luminescence window 15 of this silicon dioxide layer 20, this luminescence window 15 is produced on the contact-making surface top of P+ interdigitation diffusion region 13 and N+ interdigitation diffusion region 12, by the thickness of attenuate P+ interdigitation diffusion region 13 with the silicon dioxide layer 20 of N+ interdigitation diffusion region 12 contact-making surfaces top, reduce the light output loss, improve light output efficiency.

Embodiment

The present invention is a kind of fork structure silicon LED that adopts standard CMOS process to make, and this device adopts standard CMOS process to make, and need not carry out any technologic change.The fork structure silicon LED concrete structure that employing standard CMOS process of the present invention is made sees also Figure of description 1 and Fig. 2, comprising:

One P type silicon substrate 10;

One P+ diffusion region guard ring 14, this P+ diffusion region guard ring 14 are produced on the P type Si substrate 10, make the 3rd Metal Contact 18 and the 4th Metal Contact 19 on this P+ diffusion region guard ring 14;

One silicon dioxide layer 20, this silicon dioxide layer 20 covers the upper surface of device architecture, forms a luminescence window 15 in the middle of silicon dioxide layer 20.

This device adopts standard CMOS process to make, and does not need to carry out the change of any processing step.Wherein, N trap 11 is produced on the middle part on the P type substrate 10.N+ interdigitation diffusion region 12 and P+ interdigitation diffusion region 13 all are produced in the N trap 11.N+ interdigitation diffusion region 12 closely contacts with P+ interdigitation diffusion region 13, form staggered P+N+ knot, and P+ interdigitation diffusion region 13 will make zigzag fashion with the contact-making surface of N+ interdigitation diffusion region 12, can effectively increase contact area like this, reduces the device cut-in voltage.On N+ interdigitation diffusion region 12, make first Metal Contact 16, on P+ interdigitation diffusion region 13, make second Metal Contact 17, its particular location and shape such as Figure of description 1, shown in Figure 2.Second Metal Contact 17 on the P+ interdigitation diffusion region 13 is connected to electronegative potential, first Metal Contact 16 on the N+ interdigitation diffusion region is connected to high potential, the P+N+ knot is operated under the reverse bias voltage, and near the contact-making surface of P+ interdigitation diffusion region 13 and N+ interdigitation diffusion region 12, forms depletion region.Suitably adjust added reverse bias voltage value between first Metal Contact 16 and second Metal Contact, the staggered P+N+ knot that N+ interdigitation diffusion region 12 is closely contacted with P+ interdigitation diffusion region 13 and form reaches breakdown conditions, in near the formation depletion region of the charge carrier contact-making surface of P+ interdigitation diffusion region 13 and N+ interdigitation diffusion region 12 radiation recombination taking place, thereby launches photon.P+ diffusion region guard ring 14 is produced on the P type Si substrate 10 and is centered around around the N trap 11; the 3rd Metal Contact 18 on this P+ diffusion region guard ring 14 and the 4th metal connect 19 touch all be connected to ground (potential minimum); make like this and be in the state that a kind of reverse voltage is setovered between P type Si substrate 10 and the N trap 11; prevent that charge carrier from revealing and the effect of noise jamming thereby played, increase Output optical power.Luminescence window 15 adopts the etching technics in the standard CMOS process to make, the silicon dioxide layer 20 of etching P+ interdigitation diffusion region and N+ interdigitation diffusion region contact-making surface top, this luminescence window 15 is by the thickness of attenuate P+ interdigitation diffusion region 13 with the silicon dioxide layer 20 of N+ interdigitation diffusion region 12 contact-making surfaces top, thereby reduce the loss of output light, improve light output efficiency.

A kind of fork structure silicon LED that adopts standard CMOS process to make of the present invention, novel structure, has higher light output efficiency, and have manufacture craft maturation, cost low, be suitable for integrated, be easy to advantage such as large-scale production, in light interconnection of future generation and total silicon optical chip, have boundless application prospect.

Claims

1, a kind of fork structure silicon LED that adopts standard CMOS process to make is characterized in that, comprising:

One P type silicon substrate;

One N trap, this N trap is produced on the middle part on the P type substrate;

2, the fork structure silicon LED of employing standard CMOS process making according to claim 1, it is characterized in that, wherein this P+ interdigitation diffusion region closely contacts with N+ interdigitation diffusion region, form staggered P+N+ knot, contact-making surface is made zigzag fashion, it can reduce puncture voltage, increases contact area, improves light output efficiency.

3, the fork structure silicon LED of employing standard CMOS process making according to claim 1; it is characterized in that; wherein this P+ diffusion region guard ring is produced on the P type Si substrate and is centered around around the N trap, prevents Carrier Leakage, improves Output optical power.

4, the fork structure silicon LED of employing standard CMOS process making according to claim 1, it is characterized in that, wherein this luminescence window is produced on the contact-making surface top of P+ interdigitation diffusion region and N+ interdigitation diffusion region, thickness by the silicon dioxide layer above attenuate P+ interdigitation diffusion region and the N+ interdigitation diffusion region contact-making surface, reduce the light output loss, improve light output efficiency.