CN101000942A - Electrode of gallium nitride base III-V. class compound semiconductor - Google Patents
Electrode of gallium nitride base III-V. class compound semiconductor Download PDFInfo
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- CN101000942A CN101000942A CNA2006101665633A CN200610166563A CN101000942A CN 101000942 A CN101000942 A CN 101000942A CN A2006101665633 A CNA2006101665633 A CN A2006101665633A CN 200610166563 A CN200610166563 A CN 200610166563A CN 101000942 A CN101000942 A CN 101000942A
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Abstract
The invention relates to the electrodes of semiconductor device of GaN-based III-V compound, which includes: n electrode 6 and p electrode 7, and the n electrode 6 locates on the n-typed GaN (n - GaN) layer of the Epi-Wafers of the semiconductor device of GaN-based III-V compound, and the p electrode 7 locates on the p-typed GaN (p-Ga N) 4 and the transparent electrode 5 of the Epi-Wafers of the semiconductor device of GaN-based III-V compound. The n electrode 6 is composed of a ohmic contacting layer 6A, a barrier layer 6B and a metal pressed welding layer 6C, and p electrode 7 is composed of a adhesion conductive layer 7A, a barrier layer 7B and a metal pressed welding layer 7C. Its feature is: the ohmic contacting layer 6A and adhesion conductive layer 7A are Cr, and metal pressed welding layer 6C and 7C is Al.
Description
Technical field
The present invention relates to a kind of gallium nitrate based III-V compound semiconductor device chip electrode.
Background technology
The III-V group-III nitride, for example promptly comprise gallium nitride (GaN), aluminium gallium nitride alloy (GaAIN), indium gallium nitride (InGaN), and aluminum gallium nitride indium (InAlGaN) etc., have direct can band, characteristics such as bandwidth is big, saturation drift velocity is high, breakdown electric field is high and chemical stability is good, have been widely used at aspects such as communication and displays.
Generally speaking, the metal electrode of the gallium nitrate based III-V compound semiconductor device chip of producing all is a multi-layer compound structure at present, and use the most extensively with Cr/Au, Cr/Pt/Au, Cr/Ni/Au, they all use the low-resistance Au of one deck as the pressure welding layer.
The side sectional view of GaN LED (Fig. 1) has shown III-V compound semiconductor light-emitting diode (Light Emitting Diode, LED) typical construction of metal electrode based on GaN.Growing n-type gallium nitride (n-GaN) 2, multi layer quantum well (MQWs) 3 and p type gallium nitride (p-GaN) 4 in regular turn on Sapphire Substrate 1 are done layer of transparent electrode 5 then.
Make n electrode 6 and p electrode 7 afterwards.At first be one deck ohmic contact layer 6A and adhesion conductive layer 7A, generally require the transparency electrode in this layer and zone of the n-GaN under it and p-GaN zone to have good ohmic contact, adopt chromium (Cr) usually; Make one deck barrier layer 6B and 7B then thereon, its objective is that the metal that reduces ohmic contact layer 6A, adheres to conductive layer 7A and pressure welding layer 6C, 7C dissolves each other, and influences device performance.Barrier material can be selected the metal of platinum (Pt), titanium (Ti), nickel (Ni), molybdenum (Mo), titanium-tungsten infusibilities such as (TiW), Heat stability is good for use.Make pressure welding layer 6C, 7C at last.The effect of this layer is that metal lead wire can be welded thereon, therefore requires the pressure welding layer that certain thickness and pliability are arranged.The general gold (Au) that adopts uses Au to consider mainly that as the pressure welding layer Au has good non-oxidizability and ductility, helps the pressure welding of metal lead wire as the pressure welding layer material.
The above n electrode 6 and p electrode 7 can be made simultaneously, also can select for use different materials combination and technological process separately to make.
Right face, when making the metal electrode of GaN device chip, the selection gold makes the chip technology cost of manufacture very high as the pressure welding layer material, simultaneously also relative with technology ripe silicon device is made be separated (the normal Al of employing is as metal electrode in the silicon device making).
In the GaN element manufacturing, as the pressure welding layer, industry adopts the Ti/Al structure usually at present with aluminium (Al).This mode directly is used on the gallium nitrate based II-V compound semiconductor device and has problems: for the Ti/Al structure, can not make two electrodes simultaneously.If make two electrodes simultaneously, under unannealed condition, the thermal stability of chip is poor, can not stand very high temperature, such as, the lead-free solder that when device application, can use, need high temperature when welding lead, this can cause device forward voltage drop Vf to raise; Under the condition of annealing, the leakage current Ir of device can sharply increase, and photoelectric characteristic significantly fails.
Summary of the invention
The object of the present invention is to provide a kind of electrode of economic, practical gallium nitrate based III-V compound semiconductor device, solve above problem.
Technical scheme of the present invention is: a kind of electrode of gallium nitrate based III-V compound semiconductor device, comprise n electrode 6 and p electrode 7, n electrode 6 is positioned on n type gallium nitride (n-GaN) layer 2 of gallium nitrate based III-V compound semiconductor device epitaxial slice, p electrode 7 lays respectively on p type gallium nitride (p-GaN) 4 and transparency electrode 5 of gallium nitrate based III-V compound semiconductor device epitaxial slice, n electrode 6 is by ohmic contact layer 6A, barrier layer 6B and three layers of formation of metal crimp layer 6C, p electrode 7 is by adhering to conductive layer 7A, barrier layer 7B and three layers of formation of metal crimp layer 7C, it is characterized in that: described ohmic contact layer 6A and adhesion conductive layer 7A are chromium Cr, and metal crimp layer 6C and 7C are metallic aluminium Al.
The manufacture method of electrode of the present invention is as follows:
On gallium nitrate based III-V compound semiconductor device epitaxial slice, etch the n-GaN zone, on the n-GaN zone, make the n electrode.The n electrode comprises three-layer metal, and ground floor is the ohmic contact layer that contacts with n-GaN, and material is chromium (Cr).Make second layer barrier layer on ohmic contact layer, material requirements is the refractory metal of good thermal stability, as platinum (Pt), titanium (Ti), nickel (Ni), molybdenum (Mo) or the like, or the MULTILAYER COMPOSITE of these materials, alloy.Make three-layer metal pressure welding layer on the barrier layer, material is aluminium (Al).Make the p electrode then on the p-GaN zone, the p electrode comprises three-layer metal, and ground floor is the adhesion conductive layer that contacts with transparency electrode with p-GaN, and material is chromium (Cr).Make second layer barrier layer on the conductive layer adhering to, material requirements is the refractory metal of good thermal stability, as platinum (Pt), titanium (Ti), nickel (Ni), molybdenum (Mo) or the like, or the MULTILAYER COMPOSITE of these materials, alloy.Make three-layer metal pressure welding layer on the barrier layer, material is aluminium (Al).
When making GaN base III-V compound semiconductor device chip as stated above, after making the n electrode, the manufacture craft of annealing is made the p electrode afterwards again.Before forming the P electrode, the manufacture craft of annealing can reduce the contact resistance between N electrode and the n type semiconductor layer.
When making GaN base III-V compound semiconductor device chip as stated above, n electrode and p electrode can use identical metal material to make simultaneously.
All reach under the prerequisite of product requirement at device performance and stability, major advantage of the present invention is:
1, compared to gold (Au) pressure welding layer, aluminium (Al) pressure welding layer can low-cost volume production, and Al also has good reflective characteristic simultaneously.
2, adopt Al to combine as the technology in electrode pressure welding layer and the present integrated circuit.At present the someone adopts the bonding wire that the contains Al connecting line as LED electrode and lead-in wire, also adopts the Al material as if electrode, with the reliability of enhance device.
3, adopt chromium (Cr) as ohmic contact layer and adhesion conductive layer,, have certain mechanical strength simultaneously because chromium (Cr) has good electrical stability and thermal stability.
4, chromium (Cr) is owing to have good stable and tack, and n electrode and p electrode can be made simultaneously, make the led chip manufacture craft become simple relatively.
5, we adopt the chromium (Cr) with good electrical stability and thermal stability as ohmic contact layer, stable helpful during to the device pressure welding., for the Cr/Al structure, device temperature is during greater than 200 ℃, and the phenomenon that surface topography worsens appears in the Cr/Al electrode, and the flat configuration of Al pressure welding laminar surface can be destroyed.Between Cr/Al, add one deck barrier layer, the problem that the device electrode surface topography of effectively having avoided Cr and Al interaction to cause worsens.Make that the electrode pattern is better, the electrode manufacture craft is more stable.
On the other hand, if adopt Al, will change the existing processes flow process as the pressure welding layer.
In the existing technology, has made electrode after, deposition growing layer of silicon dioxide (SiO2) layer, and then etch electrode hole with wet etching technique.This technology can be used on the electrode of Au as the pressure welding layer, but can not be used on the electrode of Al as the pressure welding layer, because the chemical stability of Al is poorer than Au, Al acid corrosion-resistant indifferent adopts wet etching also to erode Al pressure welding layer simultaneously.Therefore, after the described electrode of this patent completes, can only adopt dry etching to the corrosion of SiO2.Yet it is better than wet method etching with the technology stability aspect to be dry-etched in pattern, and both are more or less the same on production efficiency, and governing factor that neither production capacity promptly is not the key factor of technology, therefore can not impact whole technology.
Description of drawings
Fig. 2 be the embodiment of the invention manufacturing process figure 1, the side sectional view of sapphire epitaxial wafer.
Fig. 3 be the embodiment of the invention manufacturing process figure 2, etch the n-GaN zone, and make the side sectional view after the transparency electrode.
Fig. 4 be the embodiment of the invention manufacturing process figure 3, made the side sectional view behind the n electrode.
Fig. 5 be the embodiment of the invention manufacturing process figure 4, when n electrode and p electrode are made together, the side sectional view after having made chromium (Cr) ohmic contact layer and having adhered to conductive layer.
Fig. 6 be the embodiment of the invention manufacturing process figure 5, when n electrode and p electrode are made together, made the side sectional view behind the metal barrier.
Fig. 7 be the embodiment of the invention manufacturing process figure 6, the side sectional view after n electrode 6 and p electrode 7 complete.
Embodiment
Among the present invention, " GaN base III-V compound semiconductor " means the nitride-based semiconductor of the III family element that comprises gallium, for example GaN, GaAlN, InGaN, InAlGaN etc.
Describe the present invention in detail below with reference to accompanying drawing.
Embodiment 1:
Referring to Fig. 2, Fig. 3, Fig. 4 and Fig. 7.At first to as shown in Figure 2 sapphire epitaxial wafer, with reactive ion etching method etching, remove p-GaN layer 4, multi layer quantum well layer 3, and the n-GaN layer 2 of part, make it to occur a n-GaN platform.On the p-GaN zone, steam then and cross layer of transparent electrode 5, and it is heat-treated, make it to form ohmic contact (as shown in Figure 3) with p-GaN layer 4.Evaporating Cr/Pt/Al on the n-GaN platform that etches successively, adopt metal lift-off material afterwards then, form ohmic contact layer 6A, metal barrier 6B and the pressure welding layer 6C (as shown in Figure 4) in n-GaN zone.And the n electrode carried out annealing in process, make itself and n-GaN zone form good ohmic contact.Evaporate Cr/Pt/Al on the p-GaN zone successively then, and adopting metal lift-off material, forming adhesion conductive layer 7A, metal barrier 7B and the pressure welding layer 7C (as shown in Figure 7) in p-GaN zone.
Embodiment 2:
Referring to Fig. 2, Fig. 3, Fig. 5, Fig. 6 and Fig. 7.As embodiment 1, on the sapphire epitaxial wafer, etch the n-GaN platform, and steam and cross layer of transparent electrode 5, form ohmic contact.On n-GaN zone and p-GaN zone, steam successively simultaneously then and cross Cr/Pt/Al, adopt metal lift-off material afterwards, form ohmic contact layer 6A, the adhesion conductive layer 7A in n-GaN zone and p-GaN zone, metal barrier 6B, 7B and pressure welding layer 6C, 7C (as Fig. 5, Fig. 6, shown in Figure 7).
The above, only in order to be used for convenient explanation preferred embodiment of the present invention, be not with narrow sense of the present invention be limited to this preferred embodiment.Allly do any change, all belong to claim scope of the present invention according to the present invention.
Claims (1)
1, a kind of electrode of gallium nitrate based III-V compound semiconductor device, comprise n electrode (6) and p electrode (7), n electrode (6) is positioned on the n type gallium nitride layer (2) of gallium nitrate based III-V compound semiconductor device epitaxial slice, p electrode 7 lays respectively on the p type gallium nitride (4) and transparency electrode (5) of gallium nitrate based III-V compound semiconductor device epitaxial slice, n electrode (6) is by ohmic contact layer (6A), barrier layer (6B) and three layers of formation of metal crimp layer (6C), p electrode (7) is by adhering to conductive layer (7A), barrier layer (7B) and three layers of formation of metal crimp layer (7C), it is characterized in that: described ohmic contact layer (6A) and adhere to conductive layer (7A) and be chromium, metal crimp layer (6C) and (7C) be metallic aluminium Al.
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| CN102916100B (en) * | 2012-11-08 | 2015-04-08 | 安徽三安光电有限公司 | Light emitting diode and manufacturing method thereof |
| CN103280501A (en) * | 2013-05-22 | 2013-09-04 | 上海蓝光科技有限公司 | LED (light-emitting diode) chip and manufacturing method thereof |
| CN104103733A (en) * | 2014-06-18 | 2014-10-15 | 华灿光电(苏州）有限公司 | Inverted light emitting diode chip and fabrication method thereof |
| CN105762242A (en) * | 2014-12-17 | 2016-07-13 | 晶能光电（江西）有限公司 | GaN-based thin-film LED chip and preparation method thereof |
| CN105762245A (en) * | 2014-12-18 | 2016-07-13 | 晶能光电（江西）有限公司 | LED chip with high light emitting efficiency and preparation method thereof |
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| CN106981509A (en) * | 2017-04-06 | 2017-07-25 | 北京世纪金光半导体有限公司 | A kind of multilayer metallic electrode structure of silicon carbide power device |
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