CN100550349C - 制造旋转场效应晶体管的方法 - Google Patents
制造旋转场效应晶体管的方法 Download PDFInfo
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- CN100550349C CN100550349C CNB2006101444768A CN200610144476A CN100550349C CN 100550349 C CN100550349 C CN 100550349C CN B2006101444768 A CNB2006101444768 A CN B2006101444768A CN 200610144476 A CN200610144476 A CN 200610144476A CN 100550349 C CN100550349 C CN 100550349C
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 230000005669 field effect Effects 0.000 title claims abstract description 9
- 239000012535 impurity Substances 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000002347 injection Methods 0.000 claims description 42
- 239000007924 injection Substances 0.000 claims description 42
- 239000002019 doping agent Substances 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 229910052785 arsenic Inorganic materials 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- 229910052698 phosphorus Inorganic materials 0.000 claims description 5
- 229910052787 antimony Inorganic materials 0.000 claims description 4
- 229910015900 BF3 Inorganic materials 0.000 claims description 3
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 2
- 239000011574 phosphorus Substances 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 claims 19
- 238000005516 engineering process Methods 0.000 description 33
- 238000004088 simulation Methods 0.000 description 28
- 239000004065 semiconductor Substances 0.000 description 7
- 125000001475 halogen functional group Chemical group 0.000 description 5
- 238000002513 implantation Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000003079 width control Methods 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
Abstract
Description
Claims (17)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/164,070 | 2005-11-09 | ||
US11/164,070 US7335563B2 (en) | 2005-11-09 | 2005-11-09 | Rotated field effect transistors and method of manufacture |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1971880A CN1971880A (zh) | 2007-05-30 |
CN100550349C true CN100550349C (zh) | 2009-10-14 |
Family
ID=38004305
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006101444768A Expired - Fee Related CN100550349C (zh) | 2005-11-09 | 2006-11-08 | 制造旋转场效应晶体管的方法 |
Country Status (2)
Country | Link |
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US (2) | US7335563B2 (zh) |
CN (1) | CN100550349C (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7776726B2 (en) * | 2006-05-04 | 2010-08-17 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
JP5980266B2 (ja) * | 2014-05-14 | 2016-08-31 | 任天堂株式会社 | 情報処理システム、情報処理プログラム、情報処理装置、及び情報処理方法 |
US20220209012A1 (en) * | 2020-12-28 | 2022-06-30 | Texas Instruments Incorporated | Two-rotation gate-edge diode leakage reduction for mos transistors |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5270226A (en) * | 1989-04-03 | 1993-12-14 | Matsushita Electric Industrial Co., Ltd. | Manufacturing method for LDDFETS using oblique ion implantion technique |
JP3778581B2 (ja) | 1993-07-05 | 2006-05-24 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
US5543337A (en) * | 1994-06-15 | 1996-08-06 | Lsi Logic Corporation | Method for fabricating field effect transistor structure using symmetrical high tilt angle punchthrough implants |
US5405795A (en) | 1994-06-29 | 1995-04-11 | International Business Machines Corporation | Method of forming a SOI transistor having a self-aligned body contact |
US5573961A (en) | 1995-11-09 | 1996-11-12 | Taiwan Semiconductor Manufacturing Company Ltd. | Method of making a body contact for a MOSFET device fabricated in an SOI layer |
US5976937A (en) * | 1997-08-28 | 1999-11-02 | Texas Instruments Incorporated | Transistor having ultrashallow source and drain junctions with reduced gate overlap and method |
US6353245B1 (en) | 1998-04-09 | 2002-03-05 | Texas Instruments Incorporated | Body-tied-to-source partially depleted SOI MOSFET |
TW432545B (en) | 1998-08-07 | 2001-05-01 | Ibm | Method and improved SOI body contact structure for transistors |
US6387739B1 (en) | 1998-08-07 | 2002-05-14 | International Business Machines Corporation | Method and improved SOI body contact structure for transistors |
US6156589A (en) | 1998-09-03 | 2000-12-05 | Micron Technology, Inc. | Compact SOI body contact link |
US5965917A (en) | 1999-01-04 | 1999-10-12 | Advanced Micro Devices, Inc. | Structure and method of formation of body contacts in SOI MOSFETS to elimate floating body effects |
KR100336040B1 (ko) * | 1999-04-23 | 2002-05-08 | 윤종용 | 할로 구조를 지닌 전계 효과 트랜지스터 및 제조 방법 |
KR100289810B1 (ko) * | 1999-05-10 | 2001-05-15 | 김영환 | 반도체 소자 제조를 위한 할로 이온 주입 방법 |
US20010046740A1 (en) * | 2000-05-23 | 2001-11-29 | Youngmin Kim | Low cost solution to integrate two different mosfet designs on a chip |
US6429482B1 (en) | 2000-06-08 | 2002-08-06 | International Business Machines Corporation | Halo-free non-rectifying contact on chip with halo source/drain diffusion |
WO2002019396A1 (en) | 2000-08-29 | 2002-03-07 | Boise State University | Damascene double gated transistors and related manufacturing methods |
US6509241B2 (en) | 2000-12-12 | 2003-01-21 | International Business Machines Corporation | Process for fabricating an MOS device having highly-localized halo regions |
US6617214B2 (en) * | 2001-04-23 | 2003-09-09 | Motorola, Inc. | Integrated circuit structure and method therefore |
US6531365B2 (en) * | 2001-06-22 | 2003-03-11 | International Business Machines Corporation | Anti-spacer structure for self-aligned independent gate implantation |
JP2003068891A (ja) * | 2001-08-24 | 2003-03-07 | Hitachi Ltd | 半導体記憶素子、半導体装置及びその制御方法 |
US6642579B2 (en) | 2001-08-28 | 2003-11-04 | International Business Machines Corporation | Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET |
US7138318B2 (en) | 2003-05-28 | 2006-11-21 | Advanced Micro Devices, Inc. | Method of fabricating body-tied SOI transistor having halo implant region underlying hammerhead portion of gate |
US6943407B2 (en) * | 2003-06-17 | 2005-09-13 | International Business Machines Corporation | Low leakage heterojunction vertical transistors and high performance devices thereof |
-
2005
- 2005-11-09 US US11/164,070 patent/US7335563B2/en active Active
-
2006
- 2006-11-08 CN CNB2006101444768A patent/CN100550349C/zh not_active Expired - Fee Related
-
2007
- 2007-10-17 US US11/873,886 patent/US7795098B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20070105326A1 (en) | 2007-05-10 |
US7795098B1 (en) | 2010-09-14 |
US7335563B2 (en) | 2008-02-26 |
CN1971880A (zh) | 2007-05-30 |
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Effective date of registration: 20171106 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171106 Address after: American New York Patentee after: Core USA second LLC Address before: American New York Patentee before: International Business Machines Corp. |
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