CN100470785C - 改善半导体塑料封装体内元器件分层的有效封装方法 - Google Patents

改善半导体塑料封装体内元器件分层的有效封装方法 Download PDF

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CN100470785C
CN100470785C CNB2007100221409A CN200710022140A CN100470785C CN 100470785 C CN100470785 C CN 100470785C CN B2007100221409 A CNB2007100221409 A CN B2007100221409A CN 200710022140 A CN200710022140 A CN 200710022140A CN 100470785 C CN100470785 C CN 100470785C
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die
molding compound
plastic package
semiconductor plastic
layer
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CN101071797A (zh
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梁志忠
王新潮
于燮康
茅礼卿
潘明东
陶玉娟
闻荣福
周正伟
李福寿
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Changdian Technology Management Co ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

本发明涉及一种改善半导体塑料封装体内元器件分层的有效封装方法,属半导体封装技术领域。其特征在于:在半导体塑料封装体内,在与环氧树脂塑封料(2)结合的金属引线框(1)的表面制作出一条或多条平行的或/和交叉的沟槽(3),同时在金属引线框(1)上制作出可使环氧树脂塑封料贯穿用的锚孔(4)。本发明半导体塑料封装元器件分层问题的改善,有利于提高元器件的散热能力和抗热应力变化能力,产品的密封性、功能参数以及可靠性都得到了很好的保证。

Description

改善半导体塑料封装体内元器件分层的有效封装方法
技术领域:
本发明涉及一种半导体塑料封装体元器件,尤其是涉及一种改善半导体塑料封装体内元器件分层的有效封装方法。属半导体封装技术领域。
背景技术:
半导体塑料封装元器件基本采用多种物质相结合的封装体,其中的材料主要有金属引线框、环氧树脂、金属丝、高分子粘合剂、金属镀层等。但是,不同的物质会因温度、湿度、振动等因素的变化而容易造成在不同物质之间产生分层;尤其是在高温环境中,由于不同物质的热膨胀系数是不一样的,所以会在水平方向或垂直方向产生不同程度的拉、推应力,进而在不同物质间产生分层(如图6(a)、7(a)、8(a)、9(a)所示),最终导致半导体塑料封装元器件的功能缺陷或早期失效等问题。
发明内容:
本发明的目的在于克服上述不足,提供一种可以改善半导体塑料封装体内元器件分层的有效封装方法。
本发明的目的可以通过以下四个方案加以实现:
方案一:
在半导体塑料封装体内,在与环氧树脂塑封料结合的金属引线框的表面制作出一条或多条平行的或/和交叉的沟槽,同时在金属引线框上制作出可使环氧树脂塑封料贯穿用的锚孔。沟槽和锚孔制作可以采用机械或蚀刻加工或刮除等方式来实现。沟槽与锚孔的组合使用可以大大增加塑封体内金属引线框与环氧树脂间的接触面积和结合力。沟槽可以降低二者在X与Y平面方向上因不同物质膨胀/收缩所产生的剪应力,锚孔则可降低二者在垂直(Z轴)方向上的应力。因此,以上两种方案的结合使用可以从“立体上”使金属引线框与环氧树脂之间相互咬得更紧,从而起到防止或减少分层的作用(如图6、7)。
方案二:
方案二是在方案一的基础上,在与环氧树脂塑封料结合的金属引线框的表面局部镀上金属层。其制作可采用电镀、沉积、蒸金、溅镀等方式来实现。在金属引线框的表面通过局部镀金属层的方式来相对增加引线框金属底材的表面积:一方面可以减少金属引线框与环氧树脂间的介质;另一方面,金属底材一般采用铜材,而金属镀层往往采用金、银等,因为铜与环氧树脂的粘合力要大大优于金和银,所以局部镀金属层的方法也间接增加了金属引线框与环氧树脂间的粘合力。因此,以上三种方案的结合使用可以使金属引线框与环氧树脂之间相互咬得更紧,从而起到防止或减少分层的作用(如图8)。
方案三:
方案三是在方案一的基础上,在与环氧树脂塑封料结合的金属引线框的表面制作粗糙面。其制作可采用机械或蚀刻加工或刮除等方式来实现。通过在金属引线框的表层制作粗糙面来增加与环氧树脂间的结合面积,减少因拉力等因素造成的金属引线框与环氧树脂之间的滑动力。因此,以上三种方案的结合使用可以使金属引线框与环氧树脂之间相互咬得更紧,从而起到防止或减少分层的作用(如图9)。
方案四、
方案四是在方案二的基础上,在与环氧树脂塑封料结合的金属引线框的表面制作粗糙面。以上四种方案的结合使用,增加了引线框与环氧树脂间的结合面积,增强了不同物质间的粘合力,减少了物质间的滑动几率,从而起到防止或减少分层的作用。
本发明半导体塑料封装元器件分层问题的改善,有利于提高元器件的散热能力和抗热应力变化能力,产品的密封性、功能参数以及可靠性都得到了很好的保证。
附图说明
图1为本发明的实施例1示意图。
图2为本发明的实施例2示意图。
图3为本发明的实施例3示意图。
图4为本发明的实施例4示意图。
图5为本发明的典型完整塑封体结构示意图。
图6(a)、(b)、(c)为制作沟槽前后金属引线框与环氧树脂塑封料接合面的受力对比图。
图7(a)、(b)为制作锚孔前后金属引线框与环氧树脂塑封料接合面的受力对比图。
图8(a)、(b)为制作局部金属层前后金属引线框与环氧树脂塑封料接合面的受力对比图。
图9(a)、(b)为制作粗糙面前后金属引线框与环氧树脂塑封料接合面的受力对比图。
图中:金属引线框1,环氧树脂塑封料2,沟槽3,锚孔4,局部镀金属层5,粗糙面6,金属丝7,硅材芯片8。
具体实施方式:
实施例1:
参见图1,本发明改善半导体塑料封装体内元器件分层的有效封装方法,在半导体塑料封装体内,在与环氧树脂塑封料2结合的金属引线框1的表面制作出一条或多条平行的或/和交叉的沟槽3,同时在金属引线框1上制作出可使环氧树脂塑封料贯穿用的锚孔4。
实施例2:
参见图2,实施例2是在实施例1的基础上,在与环氧树脂塑封料2结合的金属引线框1的表面局部镀上金属层5。
实施例3:
参见图3,实施例3是在实施例1的基础上,在与环氧树脂塑封料2结合的金属引线框1的表面制作粗糙面6。
实施例4:
参见图4,实施例4是在实施例2的基础上,在与环氧树脂塑封料2结合的金属引线框1的表面制作粗糙面6。
参见图5,图5为典型完整塑封体结构示意图。
参见图6、7、8、9,图6、7、8、9为本发明改善前后金属引线框与环氧树脂塑封料接合面的受力对比图。

Claims (4)

1、一种改善半导体塑料封装体内元器件分层的有效封装方法,其特征在于:在半导体塑料封装体内,在与环氧树脂塑封料(2)结合的金属引线框(1)的表面制作出一条或多条平行的或/和交叉的沟槽(3),同时在金属引线框(1)上制作出可使环氧树脂塑封料贯穿用的锚孔(4),在与环氧树脂塑封料(2)结合的金属引线框(1)的表面局部镀上金属层(5),在与环氧树脂塑封料(2)结合的金属引线框(1)的表面制作粗糙面(6),所述的沟槽(3)和锚孔(4)的制作是采用机械或蚀刻加工来实现,所述的金属层(5)的制作是采用沉积方式来实现,所述的粗糙面(6)的制作是采用机械或蚀刻加工方式来实现。
2、根据权利要求1所述的一种改善半导体塑料封装体内元器件分层的有效封装方法,其特征在于:所述的沟槽(3)和锚孔(4)的机械加工方式为刮除。
3、根据权利要求1所述的一种改善半导体塑料封装体内元器件分层的有效封装方法,其特征在于:所述沉积方式为电镀或蒸金或溅镀。
4、根据权利要求1所述的一种改善半导体塑料封装体内元器件分层的有效封装方法,其特征在于:所述的粗糙面(6)的机械加工方式为刮除。
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