CN100461629C - A digital lock-in amplifier - Google Patents

Abstract

The invention relates to the field of weak signal detection and amplification equipment, and designs a digital lock-in amplifier. It includes four parts: signal channel, reference channel, signal processor and central controller. The signal channel is connected to the signal processor through the A/D converter, and the signal processor includes two multipliers connected to the A/D converter. , two integrators connected to the multiplier, a digitally controlled phase shifter and a 90-degree phase shifter, the reference channel forms two outputs through the digitally controlled phase shifter, one is directly used as the input of the multiplier, and the other is 90-degree phase shifted The multiplier is then input into another multiplier, and the two integrators respectively pass through two D/A converters to form two outputs. After the signal is amplified by the signal channel, it is converted into a digital signal by the A/D converter, and then input to the signal processor to be multiplied and integrated by the reference signal of the reference channel. It is a complete digital operation process, which is the biggest feature of digital lock-in amplifier.

Description

A digital lock-in amplifier

technical field

The invention relates to the field of weak signal detection and amplification equipment, in particular to a digital lock-in amplifier.

technical background

In recent years, the weak signal detection technology is a new method to analyze the principle and law of noise generation, study the characteristics and correlation of the measured signal, and detect the weak signal submerged by the noise background by using the methods of electronics, information theory and physics. As a common instrument for weak signal detection, lock-in amplifiers have been widely used in many fields such as industrial production, scientific research, and medical equipment. For example, lock-in amplifiers are used in molecular mass spectrometers, scanning electron microscopes (SEM), soft X-ray excited potential spectrometers (SXAPS), and Auger electron spectrometers. Most of the existing lock-in amplifiers are implemented by analog methods.

Contents of the invention

The invention designs a digital lock-in amplifier, which is an improvement of the analog lock-in amplifier. Using the most advanced digital signal processing technology, the research signal is converted from analog to digital, and then the data is processed by using the characteristics of good stability of the digital signal, strong anti-interference ability, and convenient mathematical logic operation.

The present invention realizes its object of invention through the following technical solutions.

The digital lock-in amplifier designed by the present invention comprises signal channel, reference channel, four parts of signal processor and central controller, and signal channel is connected with signal processor by A/D converter, and described signal processor includes two-way and A multiplier connected to the A/D converter, two integrators connected to the multiplier, a digitally controlled phase shifter and a 90-degree phase shifter, the reference channel forms two outputs through the digitally controlled phase shifter, and one is directly used as the output of the multiplier Input, the other channel passes through a 90-degree phase shifter and then enters another multiplier, and the two integrators pass through two D/A converters to form two outputs. After the signal is amplified by the signal channel, it is converted into a digital signal by the A/D converter, and then input to the signal processor to be multiplied and integrated by the reference signal of the reference channel. It is a complete digital operation process, which is the biggest feature of digital lock-in amplifier. Because general analog multipliers and other analog devices are susceptible to external interference, and there are problems such as temperature drift, the accuracy will be greatly reduced in high-speed operations. These disadvantages are completely absent in digital systems. Compared with analog signals, the anti-interference ability of digital signals is very strong, especially for high-speed changing signals. The central controller is used for automatic control of each module, and is connected with the control terminal of the signal channel and signal processor

The signal channel includes an analog gain circuit, a digitally controlled narrowband filter with a high Q value and a numerically controlled attenuation circuit. The central frequency of the numerical control narrowband filter is controlled by the central controller to automatically track the reference frequency of the system, and the noise other than the reference frequency is filtered, and the Q value reaches 1, which greatly improves the input noise tolerance of the system and makes the instrument applicable to a wider range.

The frequency range of the reference signal of the reference channel is 800hz~20khz, which covers the frequency range of general optical detection and material measurement, and meets a considerable range of teaching applications, research and development, and measurement applications. Due to the avoidance of 50hz and 100hz low-frequency interference, the system structure is greatly simplified, so the performance of the product within the measurement range is greatly improved, and the price is also lower than various foreign lock-in amplifiers.

The square wave reference signal output by the digitally controlled phase shifter and 90-degree phase shifter in this design is converted into corresponding sine reference wave and cosine reference wave by the converter and then input into the multiplier. The two-way multiplication is to multiply the signal by the sine reference wave and the cosine reference wave respectively, and output the two-way results. Because the analog multiplier has certain characteristics such as instability and phase delay, the general lock-in amplifier uses a square wave reference signal to multiply the input signal. However, such an approach will cause multiple harmonics of the reference frequency in the input signal to be loaded into the multiplication result, resulting in a certain deviation between the multiplication result and the real signal strength, and the accuracy will be reduced. According to the frequency and phase of the reference square wave signal, the digital lock-in amplifier designed by the present invention restores the reference signal to a sine wave and a cosine wave, and then multiplies the input signal, thus solving the defect of harmonic loading.

In the invention, the multiplier, the integrator, the digitally controlled phase shifter, the 90-degree phase shifter and the converter are packaged into one chip by using a programmable logic device. The main computing elements are made into integrated chips, which have high anti-interference ability.

The central controller is connected with a liquid crystal display for continuously displaying the output of two D/A converters. The trend line is used to visually display the working status of the system for a period of time, which brings great convenience to production measurement work such as infrared coating and AC magnetic susceptibility; it is also a kind of humanized information to operators.

The analog gain circuit is provided with a gain result output, the numerically controlled narrowband filter is provided with an automatic tracking filter output, the multiplier is provided with a phase-sensitive multiplication output, and the integrator is provided with an integral result output. It is convenient for operators to monitor and detect the working status of the system.

The analog gain circuit, digitally controlled narrow-band filter and A/D converter are provided with a signal overflow detection terminal connected to the central controller to ensure that the signal is not distorted.

Description of drawings

Fig. 1 is the module schematic diagram of the present invention;

Fig. 2 is a detailed system structure diagram of Fig. 1;

Fig. 3 is a relationship diagram of lock-in amplifier performance parameters;

Figure 4 is a graph showing the effect of a narrowband filter on the overload level.

Detailed ways

The present invention will be further described below in conjunction with the accompanying drawings.

The digital lock-in amplifier shown in Figure 1 includes four main parts: signal channel 1, reference channel 2, signal processor 3 and central controller 8. The analog detection signal is input from signal channel 1 and amplified by signal channel 1. , which is converted into a digital signal by the A/D converter 4 and input to the signal processor 3 . The reference signal is amplified, shaped and filtered through the reference channel 2 to form a square wave input to the signal processor 3 . The detection signal and the reference signal are calculated by the signal processor 3 to form two outputs, and the output two D/A converters 5 and 5' are transformed into analog outputs of the X channel and the Y channel, which are passed through the central controller 8 and controlled by the liquid crystal Display screen 6 shows continuously. The central controller 8 is used for automatic control of the system, and is connected with the control terminal of the signal channel 1 and the signal processor 3 .

The specific hardware structure diagram of the digital lock-in amplifier of the present invention is shown in FIG. 2 . The signal channel 1 includes an analog gain circuit 11 , a digitally controlled narrowband filter 12 with a high Q value and a digitally controlled attenuation circuit 13 . The main function of signal channel 1 is to perform analog gain on the input detection signal. Since the amplitude of the input detection signal is usually relatively small, generally in the order of mv or uv, and the signal is usually buried in various noises, the analog gain Part of it needs to be done: the noise generated inside the system is low, and the frequency signals outside the measurement frequency range (800hz～10khz) should be filtered as much as possible. After the signal is input, the system can perform high multiple gain (the maximum gain of this system is 180dB), and the linearity of the gain is required to be relatively high. The system has an automatic tracking narrow-band filter, that is, the center frequency of the numerical control narrow-band filter 12 automatically tracks the reference frequency of the system, filters external noise, greatly improves the input noise tolerance of the system, and makes the instrument applicable to a wider range. The full-scale sensitivity FS of the present invention is 10nv, and the dynamic reserve of the system is 53dB.

Regarding the selection of the Q value of the digitally controlled narrowband filter 12. The lock-in amplifier is a high-efficiency weak signal extraction instrument, and it is actually an instrument that resists various interferences and noises. Therefore, the ability to resist noise is a key parameter of the lock-in amplifier. This parameter can be described by dynamic reserves.

The dynamic reserve is defined as the decibel value of the ratio of the overload level OVL of the lock-in amplifier to the input level FS at full scale output, that is

Dynamic reserve = 201g (OVL/FS) (dB)

The specific relationship among dynamic reserve, OVL and FS is shown in Figure 3. As shown in the figure, since the input signal contains noise, the power of the noise is usually greater than the power of the actual signal. It can be known from Figure 3 that the greater the dynamic reserve, the stronger the ability of the system to suppress noise. In fact, since the lock-in amplifier suppresses noise through frequency-phase selection, the dynamic reserve varies with frequency. In Fig. 4, the left picture is without the digitally controlled narrowband filter 12, and the signal overflows easily. The picture on the right shows that the digital control narrowband filter 12 is added, and the OVL has been improved to a certain extent in a certain frequency range. Moreover, the higher the Q value of the digitally controlled narrowband filter 12, the larger the range of OVL enhancement, and the narrower the depression in the middle, indicating that the dynamic range is increased. However, due to certain instability in the usual numerically controlled narrowband filter 12, the center frequency drifts and the output signal is unstable, so the Q value of the narrowband filter cannot be too high. The digital lock-in amplifier designed by the present invention adds a digitally controlled narrowband filter 12 system. The system is digitally controlled by a single-chip microcomputer, which ensures the stability of the center frequency fr. At the same time, the filter has a relatively high Q value, which achieves the unity of the system and stability.

The frequency range of the reference signal input to reference channel 1 is 800hz~20khz. This range has covered the frequency range of general optical detection and material measurement, and can meet a considerable range of teaching applications, research and development, and measurement applications. Due to the avoidance of 50hz low-frequency interference, the system structure is greatly simplified, so the performance of the product within the measurement range is greatly improved, and the price is also lower than various foreign lock-in amplifiers. The reference signal is amplified, shaped and filtered by the signal channel 1 to form a square wave input to the signal processor 3 .

Signal processor 3 includes two-way multipliers 31, 31' connected with A/D converter 4, two-way integrators 32, 32' connected with multiplier 31, digitally controlled phase shifter 33 and 90-degree phase shifter 34 , the reference channel 2 forms two outputs through the digitally controlled phase shifter 33, one is used as the input of the multiplier 31, and the other is input to another multiplier 31' after passing through the 90-degree phase shifter 34, and the digitally controlled phase shifters 33 and 90 The square wave reference signal output by degree phase shifter 34 is converted into corresponding sine reference wave and cosine reference wave by converter 35 and then input into multipliers 31, 31', and two-way integrators 32, 32' pass through two D/A The converters 5 and 5' form two outputs. Described multiplier 31,31 ', integrator 32,32 ', numerical control phase shifter 33, 90 degree phase shifter 34 and converter 35 adopt programmable logic device to be packaged into a chip.

The signal processor 3 is the core part of the lock-in amplifier. The phase-locking technology is to multiply the gain signal and the reference signal, and then perform low-pass filtering, that is, integral operation.

Suppose the input wave equation is:

S _i (t)＝A _i sin(ωt+φ)+B _i (t) (1)

where ω is the reference frequency of the system, A _i sin(ωt+φ) is the signal part, B _i (t) is the noise part

The reference signal is:

S _r (t)＝A _r sin(ωt) (3)

The input and reference signals are multiplied in a multiplier and integrated by an integrator to obtain:

${\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; \&Right\; Arrow;</span><span\; class="notranslate">\; \&infin;</span>}{\mathrm{<span\; class="notranslate">\; lim</span>}}\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; n</span>}}\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}$

$<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; \&Right\; Arrow;</span><span\; class="notranslate">\; \&infin;</span>}{\mathrm{<span\; class="notranslate">\; lim</span>}}<span\; class="notranslate">\; \{</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; n</span>}}<span\; class="notranslate">\; [</span>\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; +</span>\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; \}</span>$

$<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; cos</span>}\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

It can be seen from the resulting equation that the result is independent of time t and independent of noise B _i (t). It is only related to the amplitude and relative phase difference of the signal.

This system uses dual-channel phase-sensitive correlation calculations, and the specific calculation results are as follows.

In a two-channel system the reference signal becomes

S _r (t)＝A _r sin(ωt) (5)

S′ _r (t)=A _r cos(ωt) (6)

The measured signal and the reference signal are multiplied in the multiplier and integrated by the integrator to obtain

${\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; \&Right\; Arrow;</span><span\; class="notranslate">\; \&infin;</span>}{\mathrm{<span\; class="notranslate">\; lim</span>}}\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; n</span>}}\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}$

$<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; \&Right\; Arrow;</span><span\; class="notranslate">\; \&infin;</span>}{\mathrm{<span\; class="notranslate">\; lim</span>}}<span\; class="notranslate">\; \{</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; n</span>}}<span\; class="notranslate">\; [</span>\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; +</span>\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; \}</span>$

$<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; cos</span>}\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 7</span>}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="S"\; filenames="C200710027065E00121.png,C200710027065E00131.png"\; state="\{\{state\}\}">S</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; \&Right\; Arrow;</span><span\; class="notranslate">\; \&infin;</span>}{\mathrm{<span\; class="notranslate">\; lim</span>}}\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; n</span>}}\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; \&prime;</span>}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}$

$<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; \&Right\; Arrow;</span><span\; class="notranslate">\; \&infin;</span>}{\mathrm{<span\; class="notranslate">\; lim</span>}}<span\; class="notranslate">\; \{</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; n</span>}}<span\; class="notranslate">\; [</span>\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; +</span>\underset{\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; n</span>}}{<span\; class="notranslate">\; \&Integral;</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; cos</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; dt</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; \}</span>$

$<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; )</span>$

Therefore, when the two channels are operated according to the following algebraic formula, a result that has nothing to do with the phase angle can be obtained.

$\sqrt{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="S"\; filenames="C200710027065E00121.png,C200710027065E00131.png"\; state="\{\{state\}\}">S</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}$

$<span\; class="notranslate">\; =</span>{<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; cos</span>}\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}\mathrm{<span\; class="notranslate">\; \&phi;</span>}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 9</span>}<span\; class="notranslate">\; )</span>$

$<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}$

By dividing by (7) and (8), the relative phase difference between the input signal and the reference signal can be obtained. By (9) the amplitude of the input signal can be obtained.

It can be seen that in the digital lock-in amplifier of the present invention, all of the above operations are completed in the signal processor 3 and the central controller 8, which is a complete digital operation process, which is the biggest feature of the digital lock-in amplifier . Because general analog multipliers and other analog devices are susceptible to external interference, and there are problems such as temperature drift, the accuracy will be greatly reduced in high-speed operations. These disadvantages are completely absent in digital systems. Compared with analog signals, the anti-interference ability of digital signals is very strong, especially for high-speed changing signals.

The core of the digital processing uses a high-performance digital signal processor as the central controller 8, a programmable logic device as the signal processor 3, the sampling speed of the digital signal channel is 1mhz, and the data length is 12BIT. It adopts complete digital operation process and digital control of the whole process. This data processing method ensures the system has good stability and measurement accuracy, these characteristics are very important in the field of weak signal measurement.

The digital phase-sensitive correlator system is mainly composed of three parts: A/D conversion, programmable logic device, and D/A conversion. Wherein the A/D converter 4 and the two D/A converters 5, 5' conversions all adopt new 12-bit high-precision conversion chips, and the system data sampling rate is 1MHz. In the conversion part of the front and rear digital and analog data, high-precision op amps are used for sampling filtering to minimize the phenomenon of sampling distortion.

The programmable logic device chip is the core of the whole phase-sensitive correlator. Inside the FPGA, the main functions are:

According to the control of the central controller 8, the input square wave is phase-shifted through the digitally controlled phase shifter 33, and the phase-shifting accuracy reaches 0.5 degrees. After analyzing the phase-shifted reference square wave, the converter 35 generates corresponding sine reference wave and cosine reference wave. The control multipliers 31, 31 ' carry out the 12bit multiplication operation with a dual rate of 1MHz. The two-way multipliers 31, 31' multiply the signal by the sine reference wave and the cosine reference wave respectively, and output two-way results. Because the analog multiplier has certain characteristics such as instability and phase delay, the general lock-in amplifier uses a square wave reference signal to multiply the input signal. However, such an approach will cause multiple harmonics of the reference frequency in the input signal to be loaded into the multiplication result, resulting in a certain deviation between the multiplication result and the real signal strength, and the accuracy will be reduced. According to the frequency and phase of the reference square wave signal, the digital lock-in amplifier of this design restores the reference signal to sine wave and cosine wave, and then multiplies it with the input signal, thus solving the defect of harmonic loading.

Cooperating with the central controller 8, the programmable logic device can also automatically shift the phase, so that the phase of the reference signal is the same as that of the input signal, ensuring that the output amplitude of the x channel in the output signal is an integer multiple of the input signal, and at the same time the output of the y channel The amplitude tends to be 0. The integrators 32 and 32' of the digital phase-sensitive correlator are also integrated in the programmable logic device chip, and the all-digital integration can accurately control the integration time, breaking the integration time error problem of the traditional analog integrator.

Due to the use of high-speed D/A chips, the working speed is the same as that of A/D conversion. Therefore, the system can also output the real-time multiplication result of the dual multiplier in the form of an analog signal. The central controller 8 is connected with a liquid crystal display 6 for continuously displaying the output of two D/A converters 5, 5'. In this way, it is convenient for the staff to check the multiplication effect of the lock-in amplifier and judge the reliability of the final integral result; at the same time, it is convenient for college students to understand and learn the working principle of the lock-in amplifier. This system uses a 320×240 LCD screen 6 to output the results. In addition to the general various parameter values, the output content of the LCD screen 6 also has the biggest feature: displaying the trend line of the final integral of the x channel and the y channel. This trend line intuitively shows the working status of the system for a period of time, which brings great convenience to production measurement work such as infrared coating and AC magnetic susceptibility; it is also a kind of humanized information to operators .

This digital lock-in amplifier has a signal overflow mechanism in the whole process of the signal channel to ensure that the signal is not distorted, such as being provided with an amplified signal overflow detection terminal 81, a narrowband filter signal overflow detection terminal 82 and an A/D conversion signal overflow detection terminal 83 Connect with central controller 8.

At the same time, the system has multiple analog output points, such as the analog gain circuit 11 is provided with a gain result output 71, the numerically controlled narrowband filter 12 is provided with an automatic tracking filter output 72, and the multipliers 31, 31' are provided with a phase-sensitive multiplication output 73, 73 ', the integrators 32, 32' are provided with integration result outputs 74, 74'. These output points are very helpful for the staff to detect the working status of the system and the experimental teaching in colleges and universities.

The central controller 8 is also provided with an external interface 62 connected with a computer, and an access terminal 61 of the control panel. Allows for easy operator monitoring and system setup.

Claims (8)

1. a digital lock-in amplifier, comprising signal channel (1), reference channel (2), signal processor (3) and central controller (8) four parts, it is characterized in that signal channel (1) passes through A/ D converter (4) is connected with signal processor (3), and described signal processor (3) comprises the multiplier (31), (31 ') that two roads are connected with A/D converter (4), and multiplication Two-way integrator (32), (32') connected to device (31), (31 '), digitally controlled phase shifter (33) and 90 degree phase shifter (34); reference channel (2) is through digitally controlled phase shifter Device (33) forms two-way output, one road is directly used as the input of multiplier (31), and another road is input into another road multiplier (31 ') again after 90 degree phase shifter (34), two road integrators (32 ), (32') form two-way output after two D/A converters (5), (5') respectively, the control terminal of signal channel (1) and signal processor (3) and central controller (8 )connect. 2. The digital lock-in amplifier according to claim 1, characterized in that said signal path (1) comprises an analog gain circuit (11), a numerically controlled narrowband filter (12) and a numerically controlled attenuation circuit (13). 3. The digital lock-in amplifier according to claim 2, characterized in that the frequency range of the reference signal of the reference channel (2) is 800hz～20khz. 4. digital lock-in amplifier according to claim 3, it is characterized in that the square wave reference signal that numerical control phase shifter (33) and 90 degree phase shifter (34) output is converted into corresponding sine wave by converter (35) The reference wave and the cosine reference wave are then input into the multipliers (31), (31'). 5. digital lock-in amplifier according to claim 4, is characterized in that described multiplier (31), (31 '), integrator (32), (32 '), digitally controlled phase shifter (33), 90 The degree phase shifter (34) and converter (35) are realized by a programmable logic device. 6. The digital lock-in amplifier according to claim 1 or 2 or 3 or 4 or 5, characterized in that the central controller (8) is connected with a liquid crystal display (6) for continuous display of two D/A conversion The output of device (5), (5'). 7. according to the described digital lock-in amplifier of claim 2 or 3 or 4 or 5, it is characterized in that analog gain circuit (11) is provided with gain result output (71), and numerical control narrow-band filter (12) is provided with automatic tracking filtering Output (72), multiplier (31). (31 ') is provided with phase-sensitive multiplication output (73), (73 '), and integrator (32), (32 ') is provided with integration result output (74), ( 74'). 8. according to the described digital lock-in amplifier of claim 2 or 3 or 4 or 5, it is characterized in that analog gain circuit (11), numerical control narrow-band filter (12) and A/D converter (4) are provided with and center The signal overflow detection terminal connected to the controller (8).

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