CN102045036B - Digital phase lock amplifier - Google Patents
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- CN102045036B CN102045036B CN 201110029206 CN201110029206A CN102045036B CN 102045036 B CN102045036 B CN 102045036B CN 201110029206 CN201110029206 CN 201110029206 CN 201110029206 A CN201110029206 A CN 201110029206A CN 102045036 B CN102045036 B CN 102045036B
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Abstract
The invention discloses a digital phase lock amplifier which comprises a signal passage (1), a reference passage (2) and a signal processor (3), wherein the signal passage (1) is connected with the signal processor (3) through an analog to digital converter (4); the signal processor (3) comprises a frequency measurement module (31), a phase detection discriminator (32), a Cordic generator (33), and a first low pass filter (34) and a second low pass filter (34'). The reference passage (2) forms two paths to output to the signal processor (3) through a signal shaping circuit module (22); one path of the reference passage (2) is input to the Cordic generator (33) through the frequency measurement module (31), and the other path of the reference passage (2) is input to the Cordic generator (33) through a phase shifting module (7) and the phase detection discriminator (32); and the sine and cosine signals output by the Cordic generator (33) are multiplied by the input signal of the signal passage (1) respectively, and are output through the first and second low pass filters (34 and 34') and digital to a first D/A converter (5) and a second D/A converter (5') in sequence. Compared with the prior art, the digital phase lock amplifier has the advantages of high precision, wide frequency band and stable data, and improves the phase precision and eliminates the frequency nonlinearity of an analog channel.
Description
Technical field
The present invention relates to signal detection multiplying arrangement field, say more specifically a kind of digital lock-in amplifier based on cross correlation algorithm.
Background technology
Phase lock amplifying technology is to be used the most widely in the Detection of Weak Signals and the most effective a kind of method.The basic thought that phase lock amplifying technology is measured small-signal mainly contains 2 points.The one, utilize reference signal to change or direct current signal are modulated the migration of realization frequency slowly.Because have much noise in the surroundings, these noises have certain distribution at frequency domain, at low frequency stage noise larger amplitude are arranged.If the frequency of measured signal is lower or direct current signal, when being amplified, measuring-signal can amplify noise inevitably.Amplify if utilize to exchange, then can avoid the larger noise frequency zone of these amplitudes, improve the signal to noise ratio of signal.Therefore, usually adopt optical chopper, or other similar modulator approaches realize the frequency migration.
The 2nd, utilize signal correction and lowpass filtering theory, namely reference signal frequency is relevant with frequency input signal, and is uncorrelated with noise signal, thereby small-signal to be measured is extracted from stronger noise, so that certainty of measurement improves greatly.So-called relevant, refer to two functions uncorrelated (independently of one another); If it is zero that their product is averaging (integration) to the time, the relation that then shows these two functions can be divided into again two kinds of auto-correlation and cross-correlation.Because the cross-correlation test antijamming capability is strong, therefore in Detection of Weak Signals, mostly adopt the cross-correlation test principle.
According to the definition of cross-correlation function, suppose that input signal is x (t)=s (t)+n (t), reference signal is y (t).Wherein s (t) is measured signal, and n (t) is noise signal.The cross-correlation function of input signal and reference signal then:
According to the characteristic of cross-correlation function, noise signal n (t) is uncorrelated with reference signal y (t), and R is then arranged
Ny(τ)=0.When measured signal s (t) is cross-correlation with reference signal y (t), just can obtain computing cross-correlation and be output as
R
xy(τ)=R
sy(τ)（2）
By formula (2), can draw the complete incoherent result of measured signal and noise signal, the core component phase sensitive detector of Here it is lock-in amplifier (phase sensitive detector is called for short PSD, claims again correlator) is realized the theoretical foundation of weak signal extraction.See also shown in Figure 1, the theory diagram of the lock-in amplifier of prior art.Wherein, phase sensitive detector normally is comprised of the multiplier sum-product intergrator, and wherein multiplier generally adopts the switch multiplier, often adopts square wave signal for referencial use, and integrator is comprised of low pass filter usually.
As Chinese patent CN100461629C disclosed a kind of digital lock-in amplifier, comprise signalling channel, reference channel, four parts of signal processor and master controller, signalling channel is connected with signal processor by A/D converter, this signal processor comprises the multiplier that two-way is connected with A/D converter, the two-way integrator that is connected with multiplier, digital phase shifter and 90-degree phase shifter, reference channel forms two-way output through digital phase shifter, one the tunnel directly inputs as multiplier, another road multiplier is inputted on another road again behind 90-degree phase shifter, the two-way integrator is respectively through forming two-way output behind two D/A converters, signalling channel is connected control end and is connected with master controller with signal processor.This digital lock-in amplifier adopts averaging filter to realize the phase sensitivity coherent detection, but the low-pass cut-off frequencies of this averaging filter is low, attenuation slope is large, required exponent number is more than iir filter, and result of use is not ideal enough.In addition, after the square-wave signal that uses in this digital lock-in amplifier need to convert digital signal to, multiply each other and integral operation with the reference signal of reference channel in the input signal processor again, because the signal conversion causes the not high defective of error and phase accuracy.
Summary of the invention
The object of the invention is to overcome shortcoming of the prior art with not enough, provide that a kind of precision is high, the digital lock-in amplifier of bandwidth, data stabilization, adopt the quadravalence iir filter to realize low-pass filter structure in the phase sensitivity related algorithm; Adopt the digital phase-locked loop feedback arrangement, improve phase accuracy; Adopt the software self-correcting technology, the frequency of having eliminated analog channel is non-linear, makes the absolute value of output data more accurate.
Specific implementation of the present invention is as follows:
A kind of digital lock-in amplifier, comprise: signalling channel, reference channel and three parts of signal processor, signalling channel is connected with signal processor by A/D converter, and described signal processor comprises frequency measurement module, phase frequency detector, Cordic generator, low pass filter; Reference channel forms two-way through the signal transformation circuit module and exports signal processor to, one the tunnel through frequency measurement module input Cordic generator, another road is through phase shift block and phase frequency detector input Cordic generator, after the sine of Cordic generator output, cosine signal multiply each other with the input signal of signalling channel respectively, successively by low pass filter and D/A converter output.
Further, signalling channel has two signal input parts, also comprises current/voltage modular converter, input coupling module, differential amplifier, trapper, programmable amplifier, numerical-control attenuator and the frequency overlapped-resistable filter of successively series connection.
Further, described trapper comprises a 50Hz trapper and a 100Hz trapper.
Further, described frequency overlapped-resistable filter comprises autotracking narrow band filter and low pass filter in parallel.
Further, described signal processor adopts a slice programmable logic device (FPGA) to realize.
Further, comprise also in the described signal processor that one is used for calculating the computing module of signal amplitude and phase place.
As preferably, described low pass filter is quadravalence IIR low pass filter.
Further, described this digital lock-in amplifier also comprises the sine wave shaped circuit module that is positioned on the feedback loop.
As preferably, described digital lock-in amplifier comprises that also one is used for the master controller that is connected with the control end of signal processor.
With respect to prior art, a kind of digital lock-in amplifier of the present invention, adopt the IIR low pass filter to replace original integral operation, avoided owing to integration is not the data unsteadiness that the number of cycles of signal is brought, and the IIR low pass filter has better attenuation slope than averaging filter, easily accomplishes lower cut-off frequency.
With respect to prior art, a kind of digital lock-in amplifier of the present invention has adopted the Digital Phase-Locked Loop Technology based on FPGA and Cordic algorithm, exportable digital sine signal.When reference clock frequency or phase generate variation, this digital phase-locked loop can detect this variation, and by Cordic generator regulation output frequency, until reference signal and output sinusoidal signal are synchronous.Also be provided with independently frequency measurement module in the digital lock-in amplifier of the present invention in the FPGA, locking time is shorter, therefore, convenient in Digital Signal Processing or need to other occasions of the synchronous digital sine signal of reference clock signal.
With respect to prior art, a kind of digital lock-in amplifier of the present invention, for the software self-correcting technology has been adopted in the impact of the frequency response error that reduces analogue device, thereby the frequency of having eliminated analog channel is non-linear, makes the absolute value of output data more accurate.
In order to understand more clearly the present invention, set forth the specific embodiment of the present invention below with reference to description of drawings.
Description of drawings
Fig. 1 is the block diagram of the lock-in amplifier of prior art.
Fig. 2 is the block diagram of digital lock-in amplifier of the present invention.
Fig. 3 is the phase sensitivity related algorithm structured flowchart of digital lock-in amplifier of the present invention.
Fig. 4 is the low-pass filter structure block diagram of digital lock-in amplifier of the present invention.
Embodiment
Below in conjunction with drawings and the specific embodiments the present invention is described in more detail.
See also digital lock-in amplifier shown in Figure 2, comprise signalling channel 1, reference channel 2 and signal processor 3.Measured signal carries out current/voltage conversion, amplification and filtering to it from signalling channel 1 input in signalling channel 1.Subsequently, this signal converts digital signal to through A/D converter 4, and input signal processor 3, adopts in the present embodiment programmable logic controller (PLC) (FPGA) to process.Reference signal can be selected with square-wave signal or sine wave signal input signal processor 3 after reference channel 2 carries out shaping.By signal processor 3 measured signal and reference signal are carried out forming two-way output after the computing, the output of this two-way is transformed into respectively the simulation output of X passage and Y passage through the first D/A converter 5 and the second D/A converter 5 ', this output signal is controlled by master controller (not shown among Fig. 2).
Signalling channel 1 has two signal input part A and B, comprises that also the electric current of successively series connection turns voltage module 11, input coupling module 12, differential amplifier 13, trapper 14, programmable amplifier 15, numerical-control attenuator 16 and frequency overlapped-resistable filter 17.Amplitude range 1nV～the 1V of signalling channel 1 input signal, frequency range 1mHz～300kHz.Because the amplitude of input signal is smaller, and is mixed in the various noises, so signalling channel 1 will carry out analog gain with the detection signal of input, and filters out as far as possible noise.Wherein, input coupling module 12 comprises input coupling module 121 and input coupling module 122, trapper 14 comprises 50Hz trapper 141 and 100Hz trapper 142 that switched by Control, series connection, frequency overlapped-resistable filter 17 comprises autotracking narrow band filter 171 and the low pass filter 172 of two parallel connections, is selected by Control.
Signal input part A is after electric current turns voltage module 11, and its output is connected with input coupling module 121 by relay.The effect that electric current turns voltage module 11 is that the current signal that will input converts voltage signal to, if input signal is voltage signal, and this module shuts down.The input of input coupling module 121 can be connected with signal input part A by relay switch, also can be connected with current/voltage modular converter 11, and output is connected with the anode of differential amplifier 13.
Signal input part B directly links to each other with the input of input coupling module 122, and the output of this input coupling module 122 is connected with the negative terminal of differential amplifier 13.Input coupling module 12 has AC coupled and two kinds of patterns of direct-current coupling.Exchange enough large amplitude is arranged in the time of should guaranteeing to be converted to digital signal when amplifying.
The positive-negative input end of differential amplifier 13 is connected with input coupling module 121,122 output respectively, and output is connected by the input of relay with 50Hz trapper 141.The input impedance of this differential amplifier 13 is very big, and noise is extremely low, in order to the signal of input A, B passage is realized calculus of differences and signal amplify.
The Main Function of 50Hz trapper 141 is that the filtering power frequency is disturbed, its input is connected by the output of relay with differential amplifier 13, output is connected with 100Hz trapper 142 inputs by relay, can pass through relay switch, determine whether allow signal pass through this 50Hz trapper 141.
The Main Function of 100Hz trapper 142 is second harmonics that the filtering power frequency is disturbed, its input is connected by the output of relay with 50Hz trapper 141, its output is connected with programmable amplifier 15 inputs, can by switching, determine whether allow signal pass through this 100Hz trapper 142.
The Main Function of programmable amplifier 15 is that signal is amplified, and its input is connected with the output of 100Hz trapper 142, and output is connected with the input of numerical-control attenuator 16.The output of numerical-control attenuator 16 is connected with the input of frequency overlapped-resistable filter 17, and its Main Function is that large-signal is decayed.
The effect of frequency overlapped-resistable filter 17 is filtering unwanted signals, and under undistorted prerequisite, and the upper frequency limit of the digitized signal of needs is limited in below half of sample frequency, avoids the signal of A/D converter 4 spurious signal to occur.This frequency overlapped-resistable filter 17 is by autotracking narrow band filter 171 and 172 parallel connections of wideband low pass filter, can select to adopt autotracking narrow band filter 171 or low pass filter 172 by relay switch, wherein the bandwidth of this autotracking narrow band filter 171 is 30kHz, can improve system and dynamically lay in; The bandwidth 300kHz of low pass filter 172.The input of this frequency overlapped-resistable filter 17 is connected with the output of numerical-control attenuator 16, output is connected with A/D converter 4, after analog-to-digital conversion, digital signal after being converted is sent in the signal processor 3, finish the function of phase-sensitive detector according to certain algorithm, again by obtaining the direct current signal behind the difference frequency behind the wave digital lowpass filter.
Reference channel 2 adopts identical sampling rate, provides digital phase-sensitive detector needed phase information with signalling channel 1, it comprises reference signal input 21 and signal transformation circuit module 22, this signal transformation circuit module 22 comprises square wave Shaping Module 221 and sine wave shaped module 222, and just have along triggering and two kinds of patterns of negative edge triggering, its Main Function is to be signal processor 3 discernible digital signals with reference to the signal input shaper.The frequency range 1mHz of reference channel input signal～300kHz.
This phase frequency detector 32 is comprised of two triggers and a NAND gate, and its principle is: carry out the phase bit comparison with reference to signal and feedback signal, and when feedback signal phase lag reference signal, output up signal; Otherwise then export the down signal.The linear phase demodulation scope of this phase frequency detector 32 is [2 π, 2 π].When this phase frequency detector 32 locking, phase difference is depended in its output, plays the phase discriminator effect; During non-locking, the difference on the frequency between signal is depended in its output, plays the frequency discriminator effect.
x
i+1＝x
i-y
id
i2
-i（3）
y
i+1＝y
i+x
id
i2
-i（4）
z
i+1＝z
i-d
itan
-1(2
-i)（5）
Make z
n=0 rotation is called rotary mode (rotation mode), y
n=0 rotation is called vector pattern (vector mode).Cordic generator 33 among the present invention adopts rotary mode, and the input angle value just can obtain corresponding sine value or cosine value by the Cordic algorithm.
Be divided into two-way behind the reference signal process reference channel 2 entering signal processors 3: one road signal processor 3 carries out frequency measurement to it, and measurement result is input to Cordic generator 33; The cosine signal that another road reference signal produces with Cordic generator 33 after phase shift block 7 phase shifts, through the 3rd D/A converter 5 " square-wave signal that feeds back behind the output Shaping carries out phase place and frequency contrast; and comparing result is input to Cordic generator 33, this phase place and frequency contrast are finished by phase frequency detector 32.Cordic generator 33 produces corresponding sinusoidal signal according to frequency values and phase frequency detector 32 Output rusults that frequency measurement module 31 records.
After input signal is processed by signalling channel 1, again behind the entering signal processor 3, the two-way sinusoidal signal of spending with the phase phasic difference 90 of Cordic generator 33 generations multiplies each other respectively, two-way result after multiplying each other inputs respectively quadravalence IIR the first low pass filter 34 and the second low pass filter 34 ', two-way low pass filter 34,34 ' direct output, namely two passages carry out respectively the result of phase sensitivity coherent detection, utilize computing module 35 can calculate amplitude and the phase place of signal.
See also Fig. 3, the structured flowchart of phase sensitivity related algorithm, suppose that the waveform equation of input signal is:
Wherein ω is the reference frequency of system, A
iSin (ω t+ φ) is signal section, B
i(t) be noise section.Reference signal resolves to through Cordic generator 33:
S
r(t)=A
rsin(ωt)（7）
S′
r(t)=A
rcos(ωt)（8）
After measured signal and reference signal multiply each other in multiplier
S
0, S
1Through behind the low pass filter, the uncorrelated amount of filtering, the only remaining amount relevant with range value and phase place
With
With these two amount input mean values and arctan() computing module 35, can obtain range value and the phase place of signal.
The frequency of supposing measured signal is F, when signal frequency is lower, the same frequency sinusoidal signal that input signal and Cordic generator 33 produce multiplies each other, produce the 2F signal in the Output rusults, because F is less, if leach the low frequency signal of this 2F frequency, only realizing with IIR quadravalence low pass filter 342 will be longer to the filter time constant requirement, just can reach so low cut-off frequency.Therefore, add symchronizing filter 341 on the basis of quadravalence low pass iir filter 342, be averaged with 341 pairs of signal one-periods with the 2F frequency of symchronizing filter first, input again quadravalence low pass filter 342 behind the filtering 2F frequency signal.
Also comprise digital to analog converter (DAC) 5 and the sine wave shaped circuit module 6 that is positioned on the feedback loop in this digital lock-in amplifier loop.Digital to analog converter 5 is converted to analog signal with sinusoidal digital signal, in the present embodiment, adopts 16 high accuracy conversion chips, and the switching rate rate is 2MSPS.Sine wave shaped module 6 adopts high-speed comparator to realize, its effect is that sinusoidal signal is shaped to the Transistor-Transistor Logic level signal that FPGA can identify, be the frequency square-wave signal consistent with phase place, reference signal after this signal and the phase shift is input to simultaneously in the phase frequency detector 32 and compares, the result that will contrast at last is defeated to get back to Cordic generator 33, thereby has just consisted of a digital phase-locking phase loop back path.
The phase-locked amplifying return circuit of this numeral also comprises master controller (not marking among the figure), mainly finishes the control to whole digital lock-in amplifier, comprises by key control liquid crystal control, circuit system control, the control of USB and dataphone etc.
Simultaneously, this digital lock-in amplifier also is provided with a plurality of simulation output points, is provided with signal results such as signalling channel 1 and overflows 71, and numerical-control attenuator 16 is provided with signal and overflows 72 etc.These outputs all have very great help for the operating state that detects digital lock-in amplifier of the present invention and experiment etc.
Because the processing to input signal in the signalling channel 1 is to adopt the mode of analogue device cascade to realize, and all there is certain defective in the frequency response of analogue device, then the frequency of whole passage is non-linear equals non-linear multiply each other long-pending of each analogue device, the frequency response of the final signal of exporting from signalling channel just has certain nonlinearity erron, and this occasion that signal absolute value is had relatively high expectations is with inapplicable.Digital lock-in amplifier of the present invention adopts the software alignment technique, so that this frequency response non-linear drops to is minimum, data output absolute value is more accurate.Specific implementation is to produce a sinusoidal signal identical with reference signal frequency by 5 outputs of the first D/A converter by FPGA, and the amplitude of this signal is determined, and the linearity of frequency response is better.This signal is input to signalling channel 1 again obtains corresponding output valve, calculate again the frequency response error of signalling channel 1 according to this output valve.Proofread and correct the output valve of measured signal with this frequency response error value, thereby obtain accurately absolute value.In the situation that proofread and correct without software, the relative error of the poorest Frequency point output valve is 5%, and after adding software was proofreaied and correct, relative error was 2%.
The present invention is not limited to above-mentioned execution mode, if various changes of the present invention or distortion are not broken away from the spirit and scope of the present invention, if these changes and distortion belong within claim of the present invention and the equivalent technologies scope, then the present invention also is intended to comprise these changes and distortion.
Claims (9)
1. digital lock-in amplifier, comprise: signalling channel (1), (3) three parts of reference channel (2) and signal processor, it is characterized in that: signalling channel (1) is connected with signal processor (3) by A/D converter (4), and described signal processor (3) comprises frequency measurement module (31), phase frequency detector (32), Cordic generator (33), low pass filter (34,34 '); Reference channel (2) forms two-way through signal transformation circuit module (22) and exports signal processor (3) to, one the tunnel through frequency measurement module (31) input Cordic generator (33), another road is successively through phase shift block (7) and phase frequency detector (32) input Cordic generator (33), sine through Cordic generator (33) output, cosine signal obtains the two-way result with the rear signal multiplication of exporting of entering signal passage (1) respectively, wherein one the tunnel successively by the first low pass filter (34) and the first D/A converter (5) output, and another road is successively by the second low pass filter (34 ') and the output of the second D/A converter (5 ').
2. digital lock-in amplifier according to claim 1, it is characterized in that: described signalling channel (1) has two signal input parts, also comprises current/voltage modular converter (11), input coupling module (12), differential amplifier (13), trapper (14), programmable amplifier (15), numerical-control attenuator (16) and the frequency overlapped-resistable filter (17) of successively series connection.
3. digital lock-in amplifier according to claim 2, it is characterized in that: described trapper (14) comprises a 50Hz trapper (141) and a 100Hz trapper (142).
4. digital lock-in amplifier according to claim 2 is characterized in that: described frequency overlapped-resistable filter (17) comprises autotracking narrow band filter (171) and low pass filter (172) in parallel.
5. digital lock-in amplifier according to claim 1 is characterized in that: described signal processor (3) adopts a slice programmable logic device (FPGA) to realize.
6. digital lock-in amplifier according to claim 1, it is characterized in that: comprise also in the described signal processor (3) that one is used for calculating the computing module (35) of signal amplitude and phase place, as the input of this computing module, operation result is signal amplitude and phase place simultaneously in the output of the output of the first low pass filter (34) and the second low pass filter (34 ').
7. digital lock-in amplifier according to claim 1, it is characterized in that: described the first low pass filter (34), the second low pass filter (34 ') are quadravalence IIR low pass filter.
8. digital lock-in amplifier according to claim 1, it is characterized in that: described digital lock-in amplifier also comprises the sine wave shaped circuit module (6) that is positioned on the feedback loop, this feedback loop by the cosine signal of Cordic generator (33) output successively through the 3rd D/A converter (5 "), sine wave shaped circuit module (6) and input phase frequency detector (32) and form.
9. digital lock-in amplifier according to claim 1 is characterized in that: described digital lock-in amplifier comprises that also one is used for the master controller that is connected with the control end of signal processor.
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| CN 201110029206 CN102045036B (en) | 2011-01-27 | 2011-01-27 | Digital phase lock amplifier |
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| CN 201110029206 CN102045036B (en) | 2011-01-27 | 2011-01-27 | Digital phase lock amplifier |
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| CN102928667A (en) * | 2012-10-23 | 2013-02-13 | 江南大学 | Architecture for realizing wide-frequency high-precision phase measurement |
| CN103389161A (en) * | 2013-07-30 | 2013-11-13 | 东莞理工学院 | Method and phase locking amplifier device for detecting terahertz weak signal |
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| CN103986418A (en) * | 2014-05-22 | 2014-08-13 | 杨树纲 | Digital frequency discriminator and frequency discrimination method thereof |
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| CN104580047B (en) * | 2015-01-22 | 2018-02-13 | 山东大学 | A kind of software implementation method of FSK demodulation |
| CN104953970A (en) * | 2015-06-30 | 2015-09-30 | 中国地质调查局南京地质调查中心 | Phase-locked amplifier |
| CN105337613B (en) * | 2015-11-18 | 2018-02-06 | 华南理工大学 | A kind of pll low pass filter based on operational transconductance amplifier |
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| CN106405236A (en) * | 2016-10-27 | 2017-02-15 | 中国地质大学（武汉） | Weak ripple and harmonic voltage detection device and method for direct-current voltage-stabilized power supply |
| CN107154790B (en) * | 2017-04-26 | 2020-05-12 | 烽火通信科技股份有限公司 | Feedback signal control method and system based on FPGA and optical module modulator |
| CN107134996B (en) * | 2017-04-27 | 2020-08-18 | 中山大学 | Digital phase-locked amplifier with multiple reference modes |
| CN107425850B (en) * | 2017-07-25 | 2020-10-16 | 北京航空航天大学 | Dual-channel digital phase-locked amplifier for SERF (spin-exchange fiber) atomic spin gyroscope |
| CN107450178B (en) * | 2017-09-06 | 2020-05-12 | 北京航天长征飞行器研究所 | Two-dimensional MEMS micro-mirror driving control system and method |
| CN107462324A (en) * | 2017-09-13 | 2017-12-12 | 中国科学技术大学 | Device and method for the measurement of near-infrared sky brightness |
| CN108288956A (en) * | 2017-12-29 | 2018-07-17 | 河南北瑞电子科技有限公司 | A kind of digital Lock-in Amplifier based on DSP |
| CN108418579B (en) * | 2018-04-08 | 2024-02-13 | 中船重工（武汉）凌久电气有限公司 | Output sine wave phase-locking phase-shifting device and sine phase-locking phase-shifting algorithm |
| CN109687842A (en) * | 2018-12-24 | 2019-04-26 | 陕西航天时代导航设备有限公司 | A kind of filter for flexure gyroscope noise |
| CN109831165B (en) * | 2019-01-25 | 2023-04-28 | 石家庄市凯拓电子技术有限公司 | Ultrahigh frequency amplifier module |
| CN112929025B (en) * | 2021-01-29 | 2023-09-22 | 北京大学 | Broadband automatic frequency conversion digital phase-locked amplifier and implementation method thereof |
| CN116938251B (en) * | 2023-09-18 | 2023-12-19 | 厦门电科星拓科技有限公司 | Method, circuit and system for improving spread spectrum tracking capability of time-to-digital converter |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6483886B1 (en) * | 1999-01-08 | 2002-11-19 | Altera Corporation | Phase-locked loop circuitry for programmable logic devices |
| CN100461629C (en) * | 2007-06-19 | 2009-02-11 | 中山大学 | A digital phase-lock amplifier |
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