CN112350721B - Phase compensation method and device for quadrature phase-locked amplifier based on time-division multiplexing - Google Patents
Phase compensation method and device for quadrature phase-locked amplifier based on time-division multiplexing Download PDFInfo
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- CN112350721B CN112350721B CN202011246410.6A CN202011246410A CN112350721B CN 112350721 B CN112350721 B CN 112350721B CN 202011246410 A CN202011246410 A CN 202011246410A CN 112350721 B CN112350721 B CN 112350721B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
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Abstract
The invention discloses a phase compensation method and a device of a quadrature phase-locked amplifier based on time-sharing multiplexing, which carry out phase compensation on specific subharmonic signals output by the quadrature phase-locked amplifier through a DSP processing module, and comprise the following steps: the DSP processing module is used for alternately outputting square wave quadrature signals of fundamental wave and specific subharmonic frequency to the quadrature lock-in amplifier in a time-sharing way; carrying out quadrature multiplication on an actual signal and a square wave quadrature signal through a quadrature lock-in amplifier and outputting a PQ direct current component; the PQ direct current component is input into a DSP processing module and overlapped to eliminate the interference of a specific subharmonic signal on the base wave. The phase detection method has the advantages that the phase is compensated by extracting the component of the detected higher harmonic on the basis of not adding a hardware circuit through time-sharing multiplexing of one-way quadrature phase-locked circuit, so that the problem of inaccurate phase detection when the harmonic content of the detected signal is high is solved, and the phase detection precision is improved.
Description
Technical Field
The invention relates to the technical field of power equipment control, in particular to a phase compensation method and device of a quadrature phase-locked amplifier based on time-division multiplexing.
Background
Quadrature lock-in amplifier: a lock-in amplifier is an electronic instrument for measuring dynamic signals, whose function is to measure the phase and amplitude of a signal of a certain frequency from a signal drowned by noise. And extracting the measured signal with the same frequency and same phase as the reference signal by utilizing the cross-correlation characteristic of the reference signal and the measured signal.
The switch type phase-sensitive detection circuit can detect the phase of a signal with a specific sub-frequency, and if the harmonic content of the detected signal is high, the detected phase is shifted, so that the phase detection is inaccurate.
Disclosure of Invention
The embodiment of the invention aims to provide a phase compensation method and device for a quadrature phase-locked amplifier based on time-division multiplexing, which are used for extracting components of high-order harmonic waves to compensate the phase on the basis of not adding a hardware circuit by time-division multiplexing one-way quadrature phase-locked circuit, so that the problem of inaccurate phase detection when the harmonic wave content of a detection signal is high is solved, and the phase detection precision is improved.
To solve the above-mentioned technical problems, a first aspect of the embodiments of the present invention provides a phase compensation method for a quadrature lock-in amplifier based on time division multiplexing,
The phase compensation circuit carries out phase compensation on a specific subharmonic signal output by the quadrature phase-locked amplifier through the DSP processing module, and comprises the following steps:
The DSP processing module alternately outputs square wave quadrature signals of fundamental wave and the specific subharmonic frequency to the quadrature lock-in amplifier in a time-sharing way;
Performing quadrature multiplication on the actual signal and the square wave quadrature signal through a quadrature lock-in amplifier and outputting a PQ direct current component;
and inputting the PQ direct current component into the DSP processing module and superposing the PQ direct current component so as to eliminate the interference of the specific subharmonic signal on the base wave.
Further, the frequency of the time-division multiplexing is a preset proportional value of the fundamental frequency.
Further, the preset ratio value is 1%.
Further, the square wave quadrature signal comprises a first square wave and a second square wave which are alternately arranged;
The frequency of the first square wave is the same as the frequency of the fundamental wave, and the frequency of the second square wave is a specific secondary multiple of the frequency of the fundamental wave;
The first square wave and the second square wave both comprise a first time period and a second time period, the first time period is an output unstable region of the PQ direct current component under the square wave orthogonal signal, and the second time period is an output stable region of the PQ direct current component under the square wave orthogonal signal.
Accordingly, a second aspect of the embodiments of the present invention provides a quadrature phase-locked amplifier phase compensation apparatus based on time-division multiplexing, which performs phase compensation on a specific subharmonic signal output by a quadrature phase-locked amplifier through a DSP processing module, including:
The square wave orthogonal signal generating module is used for alternately outputting orthogonal square wave signals of fundamental wave and specific subharmonic frequency to the orthogonal phase-locked circuit in a time-sharing way through the DSP processing module;
a first signal processing module for orthogonally multiplying the real signal and the square wave quadrature signal by a quadrature lock-in amplifier and outputting a PQ direct current component;
And the second signal processing module is used for inputting the PQ direct current component into the DSP processing module and superposing the PQ direct current component so as to eliminate the interference of the specific subharmonic signal on the base wave.
Further, the frequency of the time-division multiplexing is a preset proportional value of the fundamental frequency.
Further, the preset ratio value is 1%.
Further, the square wave quadrature signal comprises a first square wave and a second square wave which are alternately arranged;
The frequency of the first square wave is the same as the frequency of the fundamental wave, and the frequency of the second square wave is a specific secondary multiple of the frequency of the fundamental wave;
The first square wave and the second square wave both comprise a first time period and a second time period, the first time period is an output unstable region of the PQ direct current component under the square wave orthogonal signal, and the second time period is an output stable region of the PQ direct current component under the square wave orthogonal signal.
Accordingly, a third aspect of the embodiment of the present invention further provides an electronic device, including: at least one processor; and a memory coupled to the at least one processor; wherein the memory stores instructions executable by the one processor to cause the at least one processor to perform the time division multiplexing based quadrature phase lock amplifier phase compensation method as described in any one of the above.
Accordingly, a fourth aspect of embodiments of the present invention also provides a computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement a time division multiplexing based quadrature phase lock amplifier phase compensation method as described in any of the above.
The technical scheme provided by the embodiment of the invention has the following beneficial technical effects:
The phase detection method has the advantages that the phase is compensated by extracting the component of the detected higher harmonic on the basis of not adding a hardware circuit through time-sharing multiplexing of one-way quadrature phase-locked circuit, so that the problem of inaccurate phase detection when the harmonic content of the detected signal is high is solved, and the phase detection precision is improved.
Drawings
FIG. 1 is a schematic diagram of a phase compensation circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of orthogonal multiplication of a P-axis reference signal and a sinusoidal signal provided by an embodiment of the present invention;
FIG. 3 is a schematic diagram of quadrature multiplication of a Q-axis reference signal with a sinusoidal signal provided by an embodiment of the present invention;
Fig. 4 is a flowchart of a phase compensation method of a quadrature lock-in amplifier based on time division multiplexing according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a reference signal principle provided by an embodiment of the present invention;
fig. 6 is a block diagram of a quadrature phase-locked amplifier phase compensation apparatus based on time-division multiplexing according to an embodiment of the present invention.
Reference numerals:
1. The system comprises a square wave orthogonal signal generation module, an acquisition module, a superposition module and a square wave orthogonal signal generation module.
Detailed Description
The objects, technical solutions and advantages of the present invention will become more apparent by the following detailed description of the present invention with reference to the accompanying drawings. It should be understood that the description is only illustrative and is not intended to limit the scope of the invention. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the present invention.
Fig. 1 is a schematic diagram of a phase compensation circuit according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of orthogonal multiplication of a P-axis reference signal and a sinusoidal signal according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of quadrature multiplication of a Q-axis reference signal and a sinusoidal signal provided by an embodiment of the present invention.
Referring to fig. 1,2 and 3, the switching phase sensitive circuit includes a first compensation unit, a second compensation unit and a phase shifter. The first compensation unit includes a first multiplier and a first low-pass filter connected in series, and the second compensation unit includes a second multiplier and a second low-pass filter connected in series.
Fig. 4 is a flowchart of a phase compensation method of a quadrature lock-in amplifier based on time division multiplexing according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a reference signal principle provided in an embodiment of the present invention.
Referring to fig. 4 and 5, a first aspect of the embodiment of the present invention provides a phase compensation method for a quadrature phase-locked amplifier based on time-division multiplexing, which performs phase compensation on a specific subharmonic signal output by the quadrature phase-locked amplifier through a DSP processing module, where the phase compensation circuit includes the following steps:
S100, outputting square wave quadrature signals of fundamental wave and specific subharmonic frequency to a quadrature lock-in amplifier in a time-sharing and alternating mode through a DSP processing module.
S200, the quadrature lock-in amplifier is used for carrying out quadrature multiplication on the actual signal and the square wave quadrature signal, and the PQ direct current component is output.
S300, inputting the PQ direct current component into a DSP processing module and superposing to eliminate interference of a specific subharmonic signal on the base wave.
According to the technical scheme, the phase is compensated by extracting the component of the high-order harmonic on the basis of not adding a hardware circuit through time-sharing multiplexing of one-way quadrature phase-locked circuit, so that the problem of inaccurate phase detection when the harmonic content of the detection signal is very high is solved, and the phase detection precision is improved.
Specifically, the frequency of the time-division multiplexing is a preset proportional value of the fundamental frequency.
Optionally, the preset ratio is 1%.
Further, the square wave quadrature signal comprises a first square wave and a second square wave which are alternately arranged; the frequency of the first square wave is the same as that of the fundamental wave, and the frequency of the second square wave is a specific secondary multiple of the frequency of the fundamental wave; the first square wave and the second square wave comprise a first time period and a second time period, wherein the first time period is an output unstable region of the square wave quadrature signal, and the second time period is an output stable region of the square wave quadrature signal.
Referring to fig. 1, assume that an input signal has a 3-frequency square wave quadrature signal superimposed therein is:
According to fourier transform, square wave quadrature signal:
The two are multiplied as follows:
In the above formula: Is a difference frequency term,/> Is a sum frequency term;
the residual term after low pass filtering is:
The above equation shows that: the 3 rd harmonic will affect the final output result, and similarly we can deduce the effect of the 5 th 7 th harmonic as follows:
in order to eliminate the influence of the higher harmonics on the phase detection, the higher harmonics must be detected.
Suppose that the detection signal is overlapped with the frequency-3 signal:
According to fourier transform, the square wave quadrature signal is a 3-frequency-multiplied square wave quadrature signal:
wherein, the residual term after low-pass filtering in the above formula is:
assuming that 5 th harmonic is also in the input signal, the square wave quadrature signal is a 3-frequency multiplication square wave:
according to the fourier transform, the reference signal is a 3-frequency multiplied square wave:
the remaining terms after low-pass filtering in the above method are as follows: from this we can conclude that the 5 th harmonic and the 7 th harmonic do not affect the output result through the above processing, only 9 th and 15 th harmonics affect, and the low content of the higher harmonic of the actual signal has little effect on the final result.
As shown in fig. 4 and fig. 5, the phase detection circuit is time-division multiplexed, the time-division frequency is 1/100 of the fundamental frequency, taking extracting 3 rd harmonic components as an example herein, the square wave quadrature signal is a square wave for time-division outputting the fundamental frequency f and a square wave of 3f with f/100 as the frequency, each time-division period is divided into two periods a, B, a period a is an output unstable region, B is an output stable region, we sample the output of the phase detection circuit in the output stable region B, the f frequency band sampling result is U d-f,Uq-f, the 3f frequency band sampling result is U d-3f,Uq-3f, and the U d,Uq of the fundamental wave according to the foregoing analysis should be:
The phase angle after compensation is
The scheme can be popularized to 5 times and 7 times of harmonic compensation.
Fig. 6 is a block diagram of a quadrature phase-locked amplifier phase compensation apparatus based on time-division multiplexing according to an embodiment of the present invention.
Accordingly, referring to fig. 6, a second aspect of the present invention provides a quadrature phase-locked amplifier phase compensation apparatus based on time-division multiplexing, which performs phase compensation on a specific subharmonic signal output by a quadrature phase-locked amplifier through a DSP processing module, including: a square wave quadrature signal generation module 1, a first signal processing module 2 and a second signal processing module 3.
The square wave orthogonal signal generating module 1 is used for alternately outputting orthogonal square wave signals of fundamental wave and specific subharmonic frequency to the orthogonal phase-locked circuit in a time-sharing way through the DSP processing module; the first signal processing module 2 is used for carrying out quadrature multiplication on the actual signal and the square wave quadrature signal through a quadrature lock-in amplifier and outputting a PQ direct current component; the second signal processing module 3 is configured to input the PQ direct current component into the DSP processing module and perform superposition to eliminate interference of the specific subharmonic signal on the base wave.
Specifically, the frequency of the time-division multiplexing is a preset proportional value of the fundamental frequency.
Optionally, the preset ratio is 1%.
Further, the square wave quadrature signal comprises a first square wave and a second square wave which are alternately arranged; the frequency of the first square wave is the same as that of the fundamental wave, and the frequency of the second square wave is a specific secondary multiple of the frequency of the fundamental wave; the first square wave and the second square wave comprise a first time period and a second time period, wherein the first time period is an output unstable region of the PQ direct current component under the square wave orthogonal signal, and the second time period is an output stable region of the PQ direct current component under the square wave orthogonal signal.
According to the technical scheme, the phase is compensated by extracting the component of the high-order harmonic on the basis of not adding a hardware circuit through time-sharing multiplexing of one-way quadrature phase-locked circuit, so that the problem of inaccurate phase detection when the harmonic content of the detection signal is very high is solved, and the phase detection precision is improved.
Accordingly, a third aspect of the embodiment of the present invention provides an electronic device, including: at least one processor; and a memory coupled to the at least one processor; the memory stores instructions executable by a processor to cause the at least one processor to perform any of the time division multiplexing based quadrature phase lock amplifier phase compensation methods described above.
Accordingly, a fourth aspect of embodiments of the present invention provides a computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement a quadrature phase lock amplifier phase compensation method based on time division multiplexing as any one of the above.
The embodiment of the invention aims to protect a phase compensation method and a phase compensation device for a quadrature phase-locked amplifier based on time-division multiplexing, which carry out phase compensation on specific subharmonic signals output by the quadrature phase-locked amplifier through a DSP processing module, and comprise the following steps: the DSP processing module is used for alternately outputting square wave quadrature signals of fundamental wave and specific subharmonic frequency to the quadrature lock-in amplifier in a time-sharing way; carrying out quadrature multiplication on an actual signal and a square wave quadrature signal through a quadrature lock-in amplifier and outputting a PQ direct current component; the PQ direct current component is input into a DSP processing module and overlapped to eliminate the interference of a specific subharmonic signal on the base wave. The technical scheme has the following effects:
The phase detection method has the advantages that the phase is compensated by extracting the component of the detected higher harmonic on the basis of not adding a hardware circuit through time-sharing multiplexing of one-way quadrature phase-locked circuit, so that the problem of inaccurate phase detection when the harmonic content of the detected signal is high is solved, and the phase detection precision is improved.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the invention without departing from the spirit and scope of the invention, which is intended to be covered by the claims.
Claims (8)
1. The phase compensation method of the quadrature phase-locked amplifier based on time-division multiplexing is characterized by comprising the following steps of:
The DSP processing module alternately outputs square wave quadrature signals of fundamental wave and the specific subharmonic frequency to the quadrature lock-in amplifier in a time-sharing way;
Performing quadrature multiplication on the actual signal and the square wave quadrature signal through a quadrature lock-in amplifier and outputting a PQ direct current component;
inputting the PQ direct current component into the DSP processing module and superposing to eliminate the interference of the specific subharmonic signal on the base wave;
The square wave quadrature signal comprises a first square wave and a second square wave which are alternately arranged;
The frequency of the first square wave is the same as the frequency of the fundamental wave, and the frequency of the second square wave is a specific secondary multiple of the frequency of the fundamental wave;
The first square wave and the second square wave both comprise a first time period and a second time period, the first time period is an output unstable region of the PQ direct current component under the square wave orthogonal signal, and the second time period is an output stable region of the PQ direct current component under the square wave orthogonal signal.
2. The method for phase compensation of a quadrature phase lock amplifier based on time division multiplexing as claimed in claim 1, wherein,
The time-sharing multiplexing frequency is a preset proportional value of the fundamental wave frequency.
3. The method for phase compensation of a quadrature phase lock amplifier based on time division multiplexing as claimed in claim 2, wherein,
The preset proportion value is 1%.
4. The phase compensation device of the quadrature phase-locked amplifier based on time-division multiplexing is characterized in that the phase compensation is carried out on a specific subharmonic signal output by the quadrature phase-locked amplifier through a DSP processing module, and the phase compensation device comprises:
The square wave orthogonal signal generating module is used for alternately outputting orthogonal square wave signals of fundamental wave and specific subharmonic frequency to the orthogonal phase-locked circuit in a time-sharing way through the DSP processing module;
a first signal processing module for orthogonally multiplying the real signal and the square wave quadrature signal by a quadrature lock-in amplifier and outputting a PQ direct current component;
The second signal processing module is used for inputting the PQ direct current component into the DSP processing module and superposing the PQ direct current component so as to eliminate the interference of the specific subharmonic signal on the base wave;
The square wave quadrature signal comprises a first square wave and a second square wave which are alternately arranged;
The frequency of the first square wave is the same as the frequency of the fundamental wave, and the frequency of the second square wave is a specific secondary multiple of the frequency of the fundamental wave;
the first square wave and the second square wave both comprise a first time period and a second time period, the first time period is an output unstable region of the PQ direct current component under the square wave orthogonal signal, and the second time period is an output stable region of the PQ direct current component under the square wave orthogonal signal.
5. The phase compensation apparatus of a quadrature phase lock amplifier based on time division multiplexing as claimed in claim 4,
The time-sharing multiplexing frequency is a preset proportional value of the fundamental wave frequency.
6. The phase compensation apparatus of claim 5, wherein the phase compensation circuit comprises a phase compensation circuit configured to compensate for the phase compensation signal,
The preset proportion value is 1%.
7. An electronic device, comprising: at least one processor; and a memory coupled to the at least one processor; wherein the memory stores instructions executable by the one processor to cause the at least one processor to perform the time division multiplexing based quadrature lock-in amplifier phase compensation method of any of claims 1-3.
8. A computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement a time division multiplexing based quadrature lock-in amplifier phase compensation method as claimed in any one of claims 1 to 3.
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| CN101060311A (en) * | 2007-06-19 | 2007-10-24 | 中山大学 | A digital phase-lock amplifier |
| CN101183043A (en) * | 2007-12-07 | 2008-05-21 | 大恒新纪元科技股份有限公司北京光电技术研究所 | Optical phase put-off precision measurement method and system thereof |
| CN107425850A (en) * | 2017-07-25 | 2017-12-01 | 北京航空航天大学 | A kind of SERF atomic spins gyroscope two-channel digital lock-in amplifier |
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2020
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101060311A (en) * | 2007-06-19 | 2007-10-24 | 中山大学 | A digital phase-lock amplifier |
| CN101183043A (en) * | 2007-12-07 | 2008-05-21 | 大恒新纪元科技股份有限公司北京光电技术研究所 | Optical phase put-off precision measurement method and system thereof |
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