CN100452279C - Method for manufacturing plasma display panel - Google Patents

Method for manufacturing plasma display panel Download PDF

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Publication number
CN100452279C
CN100452279C CNB2006100796952A CN200610079695A CN100452279C CN 100452279 C CN100452279 C CN 100452279C CN B2006100796952 A CNB2006100796952 A CN B2006100796952A CN 200610079695 A CN200610079695 A CN 200610079695A CN 100452279 C CN100452279 C CN 100452279C
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CN
China
Prior art keywords
electrode
voltage
plasmia indicating
indicating panel
panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2006100796952A
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Chinese (zh)
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CN1858883A (en
Inventor
崔盛天
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Nanjing Plasma Co Ltd
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LG Electronics Nanjing Plasma Co Ltd
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Publication date
Application filed by LG Electronics Nanjing Plasma Co Ltd filed Critical LG Electronics Nanjing Plasma Co Ltd
Publication of CN1858883A publication Critical patent/CN1858883A/en
Application granted granted Critical
Publication of CN100452279C publication Critical patent/CN100452279C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296Driving circuits for producing the waveforms applied to the driving electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20Constructional details
    • H01J11/22Electrodes, e.g. special shape, material or configuration
    • H01J11/24Sustain electrodes or scan electrodes

Abstract

The invention discloses a preparing method of plasma display panel, which comprises the following steps: forming scanning electrode and maintaining electrode on the upper part of front glass; setting upper limit voltage for scanning electrode or maintaining electrode; restoring electrode; forming electric dielectric layer for scanning electrode and maintaining electrode. The invention exerts voltage for front panel within specific time, which avoids insulating phenomenon in advance.

Description

The manufacture method of Plasmia indicating panel
One, technical field
The invention relates to Plasmia indicating panel, saying so in more detail a kind ofly applies the upper voltage limit of setting, the manufacture method of repairing the Plasmia indicating panel of incongruent electrode to the electrode that is formed at front panel.
Two, background technology
In general, in the Plasmia indicating panel, the spaced walls that is formed between prebasal plate and the metacoxal plate constitutes a unit cell, is filled with neon (Ne), helium (He) or charging and discharging gas as the mist (Ne+He) of neon and helium and the non-active gas that contains small amount of xenon (Xe) in each unit.When relying on high frequency voltage to discharge, non-active gas sends vacuum ultraviolet (Vacuum Ultraviolet rays) thereby makes the light-emitting phosphor display frame that is formed between spaced walls.Such Plasmia indicating panel is not only thin but also light, is the display unit of future generation that attracts tremendous attention.
Fig. 1 is the structural representation of existing Plasmia indicating panel.
As shown in Figure 1, Plasmia indicating panel by arranging scan electrode 102 on the front glass 101 of display frame and keeping that electrode 103 pairings form a plurality of keep the front panel 100 of electrode pair and forming arranging on the back surface glass 111 at the back side with above-mentioned a plurality of back faceplate panels 110 of keeping a plurality of addressing electrodes 113 that electrode pair intersects form with a determining deviation joined in parallel.
Front panel 100 comprises: keep the luminous scan electrode in unit 102 and keep electrode 103 thereby make to discharge mutually in the discharge cell, promptly have a pair of scan electrode 102 of transparency electrode (a) that is made of transparent ITO material and the bus electrode of being made by metal material (b) and keep electrode 103.Scan electrode 102 and keep electrode 103 restriction discharging currents is coated with on them and makes the dielectric layer 104 that insulate between electrode pair more than one.On upper dielectric layer 104, be more prone to the protective layer 105 of magnesium oxide (MgO) that has been formed with plated film for making discharging condition.
Rear board 110 is arranged with a plurality of discharge spaces, the strip of the formation discharge cell that promptly is arranged in parallel (perhaps well word shape) spaced walls 112.And carrying out address discharge, to send vacuum ultraviolet a plurality of addressing electrode 113 are corresponding spaced walls 112 parallel installations.To scribble when address discharge be the R that visible rays is sent in display frame on the upper strata of plate 110 in the back, G, B fluorophor 114.Form protection addressing electrode 113 bottom dielectrics 115 between addressing electrode 113 and the fluorophor 114.
Like this, when making Plasmia indicating panel, after plate formed electrode in front, the state of the electrode that control forms if incongruent part, for the purpose that it is repaired, carried out DC test to the electrode of front panel with this spline structure of Fig. 2.
In the existing front panel, after forming electrode, smear dielectric layer before, when being exposed to airborne two interelectrode distances and being 50um, in air, take place to destroy insulation, the decomposition voltage that causes causing discharge reduces in a large number, the minimum 150V that reaches.But when taking place to destroy the situation that insulate strong, electrode shape and dielectric on every side deform, even cause carrying out follow-up operation, the possibility that can not become excellent product increases.But electrode gap is destroyed insulation voltage and also will be reduced during less than the situation of design load.During this situation, if apply high voltage, will bring out electrode deformation and dielectric strain, so be difficult to apply high voltage.
Therefore, in present operation,, thereby, carry out next operation then by searching and repair the position that forms electrode gap below the design load to the direct voltage that applies between positive electrode about a large amount of 100V.At this moment, as shown in Figure 3, because the voltage waveform that applies as DC test merely connects dc voltage power supply in the regular hour, so there is the problem that can not accurately search and repair the part narrower than design load.
Three, summary of the invention
The manufacture method that the purpose of this invention is to provide a kind of Plasmia indicating panel, the following electrode of design load can easily be searched and repair to this method by the electrode application voltage to front panel, when making Plasmia indicating panel, thereby prevent to destroy insulation in advance, improve the actual output rate.
The objective of the invention is to be achieved through the following technical solutions:
A kind of manufacture method of Plasmia indicating panel is characterized in that it may further comprise the steps:
(a) stage that forms scan electrode and keep electrode on the top of front glass;
(b) to above-mentioned scan electrode or keep the stage that electrode applies the upper voltage limit of setting and repairs electrode;
(c) comprise above-mentioned front glass, form the stage of dielectric layer on above-mentioned scan electrode and the top of keeping electrode.
Here, (b) stage makes voltage rise to the upper voltage limit of setting according to certain gradient at the appointed time, and the afore mentioned rules time is 1 second~30 seconds.
Simultaneously, the voltage that (b) is applied in the stage is kept and be 1 second~10 seconds fall time.
The invention has the beneficial effects as follows: when making Plasmia indicating panel, at the appointed time,, can search and repair incongruent electrode at an easy rate lentamente to the scan electrode that is formed at front panel with keep the voltage that electrode applies prescribed level in advance.
Simultaneously, the present invention is after the Plasmia indicating panel manufacturing is finished, and interelectrode destruction insulation reduces, thereby can improve the effect of actual output rate.
Four, description of drawings
Fig. 1 is the structural representation of existing Plasmia indicating panel.
Fig. 2 is the schematic diagram of the front panel electrode structure of existing Plasmia indicating panel.
Fig. 3 is the schematic diagram of the voltage waveform that applies when checking the electrode of existing Plasmia indicating panel.
Fig. 4 is the schematic diagram of demonstration according to the inspection method of the front panel electrode of Plasmia indicating panel of the present invention.
The schematic diagram of the voltage waveform that Fig. 5 applies when being the electrode of checking according to Plasmia indicating panel of the present invention.
The description of symbols of major part in the accompanying drawing
202a, 203a: transparency electrode 202b, 203b: bus electrode
Five, embodiment
Below, the present invention is described in detail with reference to drawings and Examples.
Fig. 4 is the schematic diagram of demonstration according to the inspection method of the front panel electrode of Plasmia indicating panel of the present invention.
Before Fig. 4, need to prove, be to keep the rear board of a plurality of addressing electrodes that electrode pair intersects to form and form with certain separation seal by a plurality of front panels of keeping electrode pair being installed and subtend being installed according to Plasmia indicating panel of the present invention.
With reference to Fig. 4, according in the Plasmia indicating panel of the present invention, front panel uses E-beam or sharp shooting method transparency electrode (ITO) 202a that is formed by indium oxide and tin oxide in the front glass top of display frame 200 plated film specific thicknesses, 203a.Form transparency electrode 202a, after the 203a, at transparency electrode 202a, 203a top lamination forms photoresist (Photo Resist), for example dry film photoresist (Dry FilmPhoto Resist).Then, the photomask that has formed AD HOC is placed the top of above-mentioned DFR, irradiates light makes the DFR sclerosis then, thereby and carries out etching and form scan electrode and keep electrode transparency electrode 202a, 203a.
Afterwards, at transparency electrode 202a, bus electrode 202b is formed at 203a top, 203b).Bus electrode 202b though the formation method of 203b has many kinds, only describes with a kind of example wherein, print photosensitive silver (Ag) coating by stencilization (Screen-printing) mode, identical with said method, form bus electrode 202b, 203b with exposure process.
Then, scan electrode with keep two electrodes of electrode on be connected voltage feeder 300 and apply certain voltage.At this moment, make a termination electrode ground connection of electrode, to other end electrode application voltage.Here, the voltage that applies to electrode is the upper voltage limit of setting in advance, and it rises lentamente with certain gradient at the appointed time.
Like this, if two voltages between the electrode are slowly increased, after forming electrode, trickle destruction insulation takes place in left trickle electrode substance between two electrodes so, and owing to heat burns.Simultaneously, two interelectrode width are during less than the situation of design load, as mentioned above, rely on trickle destruction insulation phenomenon and burned, finally correctly repair electrode and form.
The schematic diagram of the voltage waveform that Fig. 5 applies when checking according to the electrode of front panel of the present invention.The upper voltage limit of setting is divided between voltage first transition, voltage sustaining region, the voltage last transition.At this moment, the voltage first transition was optimal between 1 second~30 seconds, maintained 1 second with the voltage last transition between voltage sustaining region~10 seconds.
Different with the manufacture method of existing Plasmia indicating panel, even the state of incongruent electrode is not necessarily, select suitable voltage range also can accurately search and repair the electrode narrower than design load.
Promptly, after providing the electric current, voltage range of qualification, if two voltages between the electrode are increased, after the operation that forms electrode, make to be retained in two interelectrode trickle electrode substances (being called " residue ") and insulation fine to take place to destroy so than design load electrode narrower or unaccommodated shape.Thus,, thereby rely on the heat that is accompanied by to come combustion residue and electrode part, finally can form suitable electrode by the destruction insulation that between underproof two electrodes, produces.
Afterwards, if finished reparation to defective electrode, just by above-mentioned transparency electrode 202a, 203a and bus electrode 202b, the scan electrode that 203b forms and keep electrode and the dielectric agent is smeared on front glass 200 tops, carry out drying then, fire with about 500 ℃~600 ℃ temperature afterwards and form dielectric layer.
Afterwards, use CVD method, plating ion method or Vacuum Coating method etc. to form the diaphragm that forms by magnesium oxide (MgO), just finished the front panel of Plasmia indicating panel on the surface of dielectric layer.
As mentioned above, the staff of the technical field of the invention can implement other concrete form under the situation that does not change technological thought of the present invention or essential feature.
Therefore, all aspects of the above embodiment all are exemplary, and do not have limited.All changes or the deformation form that are drawn by equal notion all belong to scope of the present invention.

Claims (1)

1, a kind of manufacture method of Plasmia indicating panel is characterized in that it may further comprise the steps:
(a) stage that forms scan electrode and keep electrode on the top of front glass;
(b) to above-mentioned scan electrode and keeping the stage that electrode applies the upper voltage limit of setting and repairs electrode; In 1 second~30 second time, made voltage rise to the upper voltage limit of setting according to gradient; The voltage that is applied in is kept and be 1 second~10 seconds fall time;
(c) comprise above-mentioned front glass, form the stage of dielectric layer on above-mentioned scan electrode and the top of keeping electrode.
CNB2006100796952A 2005-07-18 2006-05-09 Method for manufacturing plasma display panel Expired - Fee Related CN100452279C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050064896A KR100726663B1 (en) 2005-07-18 2005-07-18 Making Method of Plasma Display Panel
KR1020050064896 2005-07-18

Publications (2)

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CN1858883A CN1858883A (en) 2006-11-08
CN100452279C true CN100452279C (en) 2009-01-14

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002131527A (en) * 2000-10-27 2002-05-09 Ntn Corp Device for correction of defect and method for correcting defect
JP2002216634A (en) * 2001-01-23 2002-08-02 Matsushita Electric Ind Co Ltd Electrode-repairing method of plasma display panel
CN1503982A (en) * 2001-12-25 2004-06-09 ���µ�����ҵ��ʽ���� Plasma display panel and mfg method thereof
JP2004303516A (en) * 2003-03-31 2004-10-28 Toray Ind Inc Repair method, and method of manufacturing member for plasma display panel
CN1567509A (en) * 2003-06-17 2005-01-19 友达光电股份有限公司 Method for repairing defects of electrode pattern
JP2005050674A (en) * 2003-07-28 2005-02-24 Nec Plasma Display Corp Device and method for repairing plasma display panel electrode

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3978939B2 (en) * 1999-07-01 2007-09-19 カシオ計算機株式会社 Display control apparatus and program recording medium thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002131527A (en) * 2000-10-27 2002-05-09 Ntn Corp Device for correction of defect and method for correcting defect
JP2002216634A (en) * 2001-01-23 2002-08-02 Matsushita Electric Ind Co Ltd Electrode-repairing method of plasma display panel
CN1503982A (en) * 2001-12-25 2004-06-09 ���µ�����ҵ��ʽ���� Plasma display panel and mfg method thereof
JP2004303516A (en) * 2003-03-31 2004-10-28 Toray Ind Inc Repair method, and method of manufacturing member for plasma display panel
CN1567509A (en) * 2003-06-17 2005-01-19 友达光电股份有限公司 Method for repairing defects of electrode pattern
JP2005050674A (en) * 2003-07-28 2005-02-24 Nec Plasma Display Corp Device and method for repairing plasma display panel electrode

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CN1858883A (en) 2006-11-08
KR100726663B1 (en) 2007-06-12

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Granted publication date: 20090114