CN100444084C - 计算机系统中的扼制存储器 - Google Patents

计算机系统中的扼制存储器 Download PDF

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CN100444084C
CN100444084C CNB2005800160902A CN200580016090A CN100444084C CN 100444084 C CN100444084 C CN 100444084C CN B2005800160902 A CNB2005800160902 A CN B2005800160902A CN 200580016090 A CN200580016090 A CN 200580016090A CN 100444084 C CN100444084 C CN 100444084C
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P·胡苏
A·米什拉
J·施
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Intel Corp
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Abstract

用于管理存储器设备的系统和方法允许通过增强的存储器扼制来提供降低的功耗和更好的热管理。在一个实施例中，存储器单元包括存储器设备和耦合至该存储器设备的温度测量模块。温度测量设备测量存储器设备的内部温度。从而可基于更准确的测量并使用短得多的响应时间来实现存储器扼制。

Description

计算机系统中的扼制存储器
技术领域
本发明的实施例一般涉及存储器设备。更具体而言，各实施例涉及计算机系统中的扼制存储器。
背景技术
尽管计算机行业中向更小的计算平台和更大的功能的近来的趋势合乎消费者的需求，但这些趋势对计算机系统设计者以及制造者提出了众多挑战。例如，因为笔记本个人计算机(PC)、个人数字助理(PDA)和无线“智能”电话的小形状因数和它们对组件过热的敏感性，设计这些系统可能是相当困难的。具体地，过高的温度可导致处理器、存储器设备和其它组件以低于最优性能等级的水平操作。在某些情况中，过热可导致设备故障。过热还可导致关于平台外壳的表面温度的安全性问题。此外，为计算机系统设计的应用程序继续要求增加的功率，这对温度有直接影响。例如，3D游戏应用程序和“总是在线”无线特征仅是消费者可用的相对较高功率的应用程序的类型的示例。当这样的应用程序被包含在小形状因数的计算机系统中时，热问题加剧。
为了更好地管理上述问题，众多计算机设计者为给定平台建立热设计功率(TDP)限制，其中TDP本质上定义了平台应在其下操作以最小化与过热相关的性能损失和安全性问题的功率阈值。具体地，确定了对诸如系统存储器等存储器单元的访问对总体系统的功耗影响重大。为解决这个问题，某些解决方案涉及将温度传感器结合到存储器控制器集线器(MCH)中，其中MCH控制经由存储器总线对存储器单元的访问。如果MCH的温度超过预设的值，则存储器单元通过减少对该存储器单元的存储器访问通信量来被“扼制”。
尽管上述方法在某些环境下是合适的，但仍存在众多难点。例如，在MCH内测量的温度不能反映存储器单元的实际内部温度。作为结果，难以将所测温度与实际温度相关，且这可导致不准确性。而且，为弥补不准确温度测量的风险，众多设计涉及过于保守的温度限制，从而与显著的性能损失相关联。常规方法的另一难点涉及响应时间。具体地，诸如同步动态随机存取存储器(SDRAM)设备等某些存储器设备具有相对较高的电流浪涌瞬变，这可能要求在过热的情况下的立即关闭。然而常规方法的相对较长的响应时间可能无法及时检测到过热，因为温度是在MCH处测量的。
发明内容
本发明通过以下方面来解决以上提出的一个或多个问题。
本发明的第一方面提出了一种具有温度测量能力的存储器单元，包括：存储器设备；耦合至所述存储器设备的温度测量模块，所述温度测量模块测量所述存储器设备的内部温度，所述温度测量模块包括：嵌入在所述存储器设备内的热二极管；耦合至所述热二极管的串行存在检测SPD设备。
本发明的第二方面提出了一种具有温度测量能力的系统，包括：存储器控制器集线器MCH；耦合至所述MCH的系统存储器总线；以及耦合至所述系统存储器总线的存储器单元，所述存储器单元包括存储器设备以及耦合至所述存储器设备的温度测量模块，所述温度测量模块测量所述存储器设备的内部温度，所述温度测量模块包括：嵌入在所述存储器设备内的热二极管；耦合至所述热二极管的串行存在检测SPD设备。
本发明的第三方面提出了一种温度测量方法，包括：使用温度测量模块测量存储器设备的内部温度；以及经由系统管理总线将所述内部温度传输给系统控制器，使用温度测量模块包括使用嵌入在所述存储器设备内的热二极管以及耦合至所述热二极管的串行存在检测SPD设备。
本发明的第四方面提出了一种具有温度测量能力的存储器单元，包括：多个同步动态随机存取存储器SDRAM设备；对应于所述多个SDRAM设备的多个热二极管，每一热二极管嵌入在所述多个SDRAM设备之一中；以及耦合至所述热二极管的串行存在检测SPD设备，所述SPD设备包括生成选择信号的控制逻辑；耦合至所述控制逻辑以基于所述选择信号在所述热二极管之间进行选择的多路复用器；耦合至所述多路复用器和所述控制逻辑以将一对测量信号注入到所述热二极管中的电流源，所述测量信号为所述热二极管产生依赖于温度的电压差；耦合至所述多路复用器以将所述电压差转换成数字信号的模数转换器ADC；以及耦合至所述A/D转换器以基于所述数字信号为所述多个SDRAM设备计算多个内部温度的温度计算电路。
附图说明
通过阅读以下说明书和所附权利要求书，并参考以下附图，本发明的实施例的各个优点对本领域的技术人员将是显而易见的，附图中：
图1是根据本发明的一个实施例的存储器单元的示例的框图；
图2是根据本发明的一个实施例的系统的示例的框图；
图3是根据本发明的一个实施例的串行存在检测设备的示例的框图；以及
图4是管理根据本发明的一个实施例的存储器设备的方法的示例的流程图。
具体实施方式
图1示出了提供优于常规存储器单元的众多优点的存储器单元10。具体地，存储器单元10含有多个存储器设备12(12a-12n)和耦合至存储器设备12的温度测量模块14。如将在以下更具体讨论的，存储器单元10可以是一般在笔记本个人计算机(PC)中使用的类型的小型双重内嵌式存储器模块(SO-DIMM)。存储器单元10也可以是台式PC中更常用的微型DIMM、或全尺寸的DIMM。而且，存储器设备12可以是同步动态随机存取存储器(SDRAM)设备，它一般具有相对较高的电流浪涌瞬变，从而可能对过热高度敏感。尽管参考SO-DIMM和SDRAM设备描述了众多实施例，但本发明的实施例不如此受限。事实上，可使用具有依赖于温度的性能的任何存储器设备而不背离所述实施例的本质和精神。尽管如此，存在相当适合此处所述的原理的SO-DIMM和SDRAM设备的众多方面。
示出的温度测量模块14测量每一存储器设备12的内部温度。通过测量存储器设备12的内部温度而非相邻存储器控制器集线器(MCH，未示出)的内部温度，温度测量模块14有效地排除了对准确性和响应时间的常规问题。例如，由模块14进行的温度测量更准确地反映了存储器设备12的管芯温度，且可用于比常规温度测量更快地检测过热。
现在转向图2，在16处更详细地示出了带有改进的存储器单元的系统的一个示例。具体地，系统16包括SO-DIMM 10′、MCH 22、系统管理接口26和系统存储器总线24。SO-DIMM 10′可具有支持64位传输的144管脚配置、支持64位传输的72管脚配置或任何其它可接受的配置(见例如2003年10月的JEDEC标准第21-C册的PC133 SDRAM Unbuffered SO-DIMM参考设计规范第1.02版)。所示SO-DIMM 10′含有多个SDRAM设备12′(12a′-12d′)和温度测量模块14′。尽管示出了四个SDRAM设备，但可使用更多或更少数量的存储器设备。温度测量模块14′包括串行存在检测(SPD)设备18和多个热二极管20(20a-20d)，其中每一热二极管20被嵌入在SDRAM设备12′之一中。
除存储由基本输入/输出系统(BIOS，未示出)在系统启动时使用的配置信息(例如，模块大小、数据宽度、速度和电压)以外，SPD设备18能够将SDRAM设备12′的内部温度传输给系统管理接口26。如果该内部温度超过温度阈值，则系统管理接口26可生成扼制控制信号，其中MCH 22可响应于扼制控制信号减少对SO-DIMM 10′的存储器访问通信量(即，扼制)。
具体地，所示的系统管理接口26包括耦合至SPD设备18的系统管理总线28和耦合至系统管理总线28的系统控制器(例如，系统管理控制器和键盘控制器SMC/KBC)30。系统控制器30经由系统管理总线28从SPD设备18处接收内部温度，将内部温度与温度阈值进行比较，且如果内部温度超过温度阈值则生成扼制控制信号。
在一个示例中，系统管理总线28是内部集成电路(I2C)总线(例如，2000年1月Philips Semiconductors的I2C规范第2.1版)，它物理地可由两条有效导线和接地连接组成。被称为串行数据线(SDA)和串行时钟线(SCL)的有效导线均为双向的。在这样的方法中，连接至总线的每一组件取决于其功能可用作接收器和/或发送器。在任何给定的事务中，用作发送器的组件被认为是总线主设备，而其余的组件被认为是总线从设备。因此，就内部温度的传输而言，SPD设备18可用作总线主设备，系统控制器30可用作总线从设备。在其中配置信息是为BIOS的目的正从SPD电可擦可编程只读存储器(EEPROM，未示出)中检索的情况下，系统控制器30可用作总线主设备，而SPD设备18可用作总线从设备。
系统管理总线28也可在SMBus框架(例如，200年8月，SBS ImplementersForum的SMBus规范第2.0版)下操作。SMBus接口使用I2C作为其主干，并允许组件来回传递消息，而非仅行进于单独的控制线。这样的方法对诸如SO-DIMM10′等将SPD数据传输给BIOS的存储器单元尤其有用。
所示系统管理接口26还包括耦合至系统控制器30的芯片组总线(例如，2002年8月
Figure C20058001609000081
低管脚数/LPC接口规范修订1.1版)32、耦合至芯片组总线32的输入/输出控制器集线器(ICH)34和耦合至ICH 34和MCH22的集线器总线36。ICH经由芯片组总线32从系统控制器30中接收扼制控制信号，并经由集线器接口36将控制信号转发给MCH 22。如已所述的，MCH 22能够基于控制信号对SO-DIMM10′进行扼制。就此方面而言，系统16可包括诸如处理器、图形控制器、网络接口等期望经由系统存储器总线24和/或MCH 22对SO-DIMM 10′上的SDRAM设备12′进行读和/或写访问的其它组件(未示出)。
例如，图形控制器可以处理需要经由系统存储器24对SDRAM设备12′中的一个或多个进行频繁访问的3维(3D)游戏应用程序，而MCH 22具有调节系统存储器24上的通信量的能力。如果SDRAM设备12′增加的活动造成高于特定阈值的SDRAM设备12′的内部温度，则系统控制器30生成扼制启动信号，这最终使得MCH 22限制系统存储器总线24上的存储器访问通信量。通过测量SDRAM设备12′的更准确的内部温度，系统16还能够实现更积极的存储器扼制。而且，系统16能够比常规系统更迅速地对温度峰值作出反应。
现在转向图3，在18′处更详细地示出了在SPD设备中实现温度测量的一种方法。具体地，所示的SPD设备18′包括将一对测量信号注入热二极管20(图2)的每一个中的电流源38，其中测量信号对每一热二极管产生依赖于温度的电压差。尽管将电流源38示为SPD设备18′的一部分，但电流源也可位于系统中的任何位置。本质上，含有已知电流的第一测量信号被注入给定的热二极管中，而第一测量信号产生通过该热二极管的第一电压降。同样含有已知电流的第二测量信号然后被注入该热二极管，产生第二电压降。由于热二极管的正向偏流是管芯温度的函数，因此两个电压降之间的差也是管芯温度的函数。例如，当处于高管芯温度时，差大于当处于低温度时的差。两个测量信号通过热二极管的电压因此定义了依赖于温度的电压差。应注意到，或者可使用单个测量信号来获得绝对电压值。然而，由于通过热二极管的电压/电流特性的变化，在这一方法中可能需要校准来获得可接受的准确率级别。
所示的SPD设备18′还具有多路复用器40，它基于来自控制逻辑42的选择信号在热二极管之间选择。选择可按照“循环”的方式，或基于诸如存储器设备利用率等某些其它参数。响应于选择信号，多路复用器40将电流源38连接至一对端口之一。例如，控制逻辑42可发信号通知多路复用器40选择端口DP1和DN1，这可分别对应于热二极管20a(图2)的阳极和阴极端子。控制逻辑42然后使电流源38将第一测量信号注入端口DP1中。端口DP1与端口DN1之间的电压从而表示了热二极管上的电压降。控制逻辑42然后使电流源38将第二测量信号注入端口DP1中，产生热二极管上的第二电压降。这两个电压降之间的差(例如，依赖于温度的电压差)可能与热二极管的温度直接相关，它可被发送给模数转换器(ADC)44。
实际上，可使用其它电路。例如，可使用低通滤波器来从差分波形中移除噪声，可使用斩波器稳定放大器来放大并整流差分波形以产生与该差分成比例的直流(DC)电压。这一电路没有被示出，以便不妨碍本发明的实施例的更相关的方面。
ADC 44可将依赖于温度的电压差转换成数字信号。因此，每一DP端口可用作热二极管沟道的组合的电流源和ADC正输入，且每一DN端口可用作组合的电流宿和ADC负输入。控制逻辑42然后可前进至下一对端口，并重复该过程。所示的SPD设备18′还具有耦合至ADC 44以基于数字信号计算存储器设备的内部温度的温度计算电路46。
现在转向图4，示出了管理存储器设备的方法48。方法48可在使用任何适当的硬件和/或软件程序设计技术的存储器单元中实现。例如，方法48可容易地结合到串行存在检测(SPD)设备和/或系统控制器的专用集成电路(ASIC)中。或者，方法48可被实现为被存储在诸如RAM、ROM、闪存等机器可读存储器中的一组指令。所示的方法48允许在处理框50处将一对测量信号注入嵌入在存储器设备内的热二极管中。测量信号对热二极管产生依赖于温度的电压差。框52允许将该电压差转换成数字信号，框54允许基于该数字信号计算存储器设备的内部温度。在框56处将该内部温度与温度阈值进行比较，且框58允许确定是否超出了该阈值。如果是，则在框60处将扼制控制信号发给存储器控制器集线器。否则，在框62处选择下一存储器设备，并重复该过程。
因此，此处所述的技术可用于在诸如服务器、台式PC、笔记本PC、个人数字助理(PDA)、无线“智能”电话等系统中显著改进存储器扼制和热设计功率。具体地，与笔记本PC、PDA和智能电话相关联的小形状因数尤其适于本发明的实施例。而且，具有可能要求在过热的情况中立即关闭的相对较高的电流浪涌瞬变的存储器结构中可相当程度地受益于所讨论的原理。
术语“耦合”在此处用于指示允许通信在所述接口上发生的任何类型的直接或间接连接。因此，耦合可包括中间组件。耦合也可允许电子、电磁、光和其它形式的通信。
本领域的技术人员从前述描述中能够理解，本发明的实施例的宽泛的技术可按照各种形式实现。从而，尽管结合其特定示例描述了本发明的实施例，但本发明的实施例的真正的范围应不如此限制，因为当本领域的技术人员在研究附图、说明书和以下权利要求书之后其它的修改将是显而易见的。

Claims (14)

1.一种具有温度测量能力的存储器单元，包括：
存储器设备；
耦合至所述存储器设备的温度测量模块，所述温度测量模块测量所述存储器设备的内部温度，所述温度测量模块包括：
嵌入在所述存储器设备内的热二极管；
耦合至所述热二极管的串行存在检测设备；
其中所述串行存在检测设备包括：
将一对测量信号注入到所述热二极管中的电流源，所述测量信号对所述热二极管产生依赖于温度的电压差；
耦合至所述热二极管以将所述电压差转换成数字信号的模数转换器；以及
耦合至所述模数转换器以基于所述数字信号计算所述存储器设备的内部温度的温度计算电路。
2.如权利要求1所述的存储器单元，其特征在于，还包括带有相应的多个嵌入的热二极管的多个存储器设备，所述串行存在检测设备包括生成选择信号的控制逻辑，耦合至所述控制逻辑、所述存储器设备和所述模数转换器以基于所述选择信号在所述热二极管之间进行选择的多路复用器。
3.如权利要求2所述的存储器单元，其特征在于，每一存储器设备包括同步动态随机存取存储器设备。
4.如权利要求1所述的存储器单元，其特征在于，所述存储器单元包括小型双重内嵌式存储器模块。
5.一种具有温度测量能力的系统，包括：
存储器控制器集线器；
耦合至所述存储器控制器集线器的系统存储器总线；以及
耦合至所述系统存储器总线的存储器单元，所述存储器单元包括存储器设备以及耦合至所述存储器设备的温度测量模块，所述温度测量模块测量所述存储器设备的内部温度；所述温度测量模块包括：
嵌入在所述存储器设备内的热二极管；
耦合至所述热二极管的串行存在检测设备；
其中所述串行存在检测设备包括：
将一对测量信号注入到所述热二极管中的电流源，所述测量信号对所述热二极管产生依赖于温度的电压差；
耦合至所述热二极管以将所述电压差转换成数字信号的模数转换器；以及
耦合至所述模数转换器以基于所述数字信号计算所述存储器设备的内部温度的温度计算电路。
6.如权利要求5所述的系统，其特征在于，还包括耦合至所述串行存在检测设备和所述存储器控制器集线器的系统管理接口，所述系统管理接口响应于所述内部温度超过温度阈值生成扼制控制信号。
7.如权利要求6所述的系统，其特征在于，所述系统管理接口包括：
耦合至所述串行存在检测设备的系统管理总线；以及
耦合至所述系统管理总线的系统控制器，所述系统控制器经由所述系统管理总线从所述串行存在检测设备接收所述内部温度，将所述内部温度与所述温度阈值进行比较，且如果所述内部温度超过所述温度阈值则生成所述扼制控制信号。
8.如权利要求7所述的系统，其特征在于，所述系统管理总线包括内部集成电路总线，就所述内部温度的传输而言，所述串行存在检测设备用作总线主设备，而所述系统控制器用作总线从设备。
9.如权利要求7所述的系统，其特征在于，所述系统管理接口还包括：
耦合至所述系统控制器的芯片组总线；
耦合至所述芯片组总线的输入/输出控制器集线器；以及
耦合至所述输入/输出控制器集线器和所述存储器控制器集线器的集线器接口，所述输入/输出控制器集线器经由所述芯片组总线从所述系统控制器接收所述扼制控制信号，并经由所述集线器接口将所述扼制控制信号转发给所述存储器控制器集线器。
10.一种温度测量方法，包括：
使用温度测量模块测量存储器设备的内部温度；以及
经由系统管理总线将所述内部温度传输给系统控制器，
使用温度测量模块包括使用嵌入在所述存储器设备内的热二极管以及耦合至所述热二极管的串行存在检测设备；
其中使用所述串行存在检测设备包括：
使用所述串行存在检测设备中的电流源将一对测量信号注入到所述热二极管中，所述测量信号对所述热二极管产生依赖于温度的电压差；
使用所述串行存在检测设备中的耦合至所述热二极管的模数转换器，将所述电压差转换成数字信号；以及
使用所述串行存在检测设备中的耦合至所述模数转换器的温度计算电路，以基于所述数字信号计算所述存储器设备的内部温度。
11.如权利要求10所述的方法，其特征在于，还包括为小型双重内嵌式存储器模块中的多个同步动态随机存取存储器设备重复所述测量和所述传输。
12.一种具有温度测量能力的存储器单元，包括：
多个同步动态随机存取存储器设备；
对应于所述多个同步动态随机存取存储器设备的多个热二极管，每一热二极管嵌入在所述多个同步动态随机存取存储器设备之一中；以及
耦合至所述热二极管的串行存在检测设备，所述串行存在检测设备包括生成选择信号的控制逻辑；耦合至所述控制逻辑以基于所述选择信号在所述热二极管之间进行选择的多路复用器；耦合至所述多路复用器和所述控制逻辑以将一对测量信号注入到所述热二极管中的电流源，所述测量信号为所述热二极管产生依赖于温度的电压差；耦合至所述多路复用器以将所述电压差转换成数字信号的模数转换器；以及耦合至所述模数转换器以基于所述数字信号为所述多个同步动态随机存取存储器设备计算多个内部温度的温度计算电路。
13.如权利要求12所述的存储器单元，其特征在于，所述存储器单元包括小型双重内嵌式存储器模块。
14.如权利要求12所述的存储器单元，其特征在于，所述存储器单元包括微型双重内嵌式存储器模块。
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US7304905B2 (en) 2007-12-04
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US20050259496A1 (en) 2005-11-24
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US20140112370A1 (en) 2014-04-24
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