CN100401086C - 具有测试单元的电子电路 - Google Patents
具有测试单元的电子电路 Download PDFInfo
- Publication number
- CN100401086C CN100401086C CNB038157551A CN03815755A CN100401086C CN 100401086 C CN100401086 C CN 100401086C CN B038157551 A CNB038157551 A CN B038157551A CN 03815755 A CN03815755 A CN 03815755A CN 100401086 C CN100401086 C CN 100401086C
- Authority
- CN
- China
- Prior art keywords
- node
- electronic circuit
- test
- circuit
- nodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 134
- 239000000872 buffer Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 9
- 230000008878 coupling Effects 0.000 claims description 3
- 238000010168 coupling process Methods 0.000 claims description 3
- 238000005859 coupling reaction Methods 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 claims 1
- 230000008901 benefit Effects 0.000 description 9
- 230000006870 function Effects 0.000 description 5
- 238000001514 detection method Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 239000013598 vector Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/022—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in I/O circuitry
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318544—Scanning methods, algorithms and patterns
- G01R31/31855—Interconnection testing, e.g. crosstalk, shortcircuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
Description
模式号 | I/O节点121-124 | I/O节点131-135(“异或”门) | I/O节点131-135(“同”门) |
1 | 0000 | 01010 | 01011 |
2 | 1000 | 11011 | 11010 |
3 | 0100 | 00011 | 00010 |
4 | 0010 | 01111 | 01110 |
5 | 0001 | 01001 | 01000 |
6 | 1111 | 10100 | 10101 |
7 | 0111 | 00101 | 00100 |
8 | 1011 | 11101 | 11100 |
9 | 1101 | 10001 | 10000 |
10 | 1110 | 10111 | 10110 |
提供给I/O节点121、122的测试模式 | 对于图2a的位置中的线“与”而言,位于I/O节点131、132的测试结果 | 对于图2b的位置中的线“与”而言,位于I/O节点131、132的测试结果 |
00 | 01 | 00 |
10 | 01 | 11 |
01 | 01 | 00 |
11 | 10 | 00 |
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02077733.0 | 2002-07-08 | ||
EP02077733 | 2002-07-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1666110A CN1666110A (zh) | 2005-09-07 |
CN100401086C true CN100401086C (zh) | 2008-07-09 |
Family
ID=30011175
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB038157551A Expired - Fee Related CN100401086C (zh) | 2002-07-08 | 2003-06-20 | 具有测试单元的电子电路 |
Country Status (9)
Country | Link |
---|---|
US (1) | US7199573B2 (zh) |
EP (1) | EP1521974B1 (zh) |
JP (1) | JP4176716B2 (zh) |
CN (1) | CN100401086C (zh) |
AT (1) | ATE406582T1 (zh) |
AU (1) | AU2003244975A1 (zh) |
DE (1) | DE60323232D1 (zh) |
TW (1) | TWI287638B (zh) |
WO (1) | WO2004005946A2 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7567521B2 (en) * | 2006-06-06 | 2009-07-28 | Litepoint Corp. | Apparatus for capturing multiple data packets in a data signal for analysis |
US20090021383A1 (en) * | 2007-07-16 | 2009-01-22 | International Business Machines Corporation | Method for redundant control of service indicator leds |
JP4365433B2 (ja) * | 2007-09-11 | 2009-11-18 | Okiセミコンダクタ株式会社 | 半導体集積回路 |
US7928755B2 (en) * | 2008-02-21 | 2011-04-19 | Verigy (Singapore) Pte. Ltd. | Methods and apparatus that selectively use or bypass a remote pin electronics block to test at least one device under test |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS635272A (ja) * | 1986-06-25 | 1988-01-11 | Fujitsu Ten Ltd | 出力異常検出機能付きロジツク回路装置 |
WO1999039218A2 (en) * | 1998-02-02 | 1999-08-05 | Koninklijke Philips Electronics N.V. | Circuit with interconnect test unit and a method of testing interconnects between a first and a second electronic circuit |
US6208571B1 (en) * | 1999-04-30 | 2001-03-27 | Fujitsu Limited | Semiconductor memory device, circuit board mounted with semiconductor memory device, and method for testing interconnection between a semiconductor memory device with a circuit board |
TW444127B (en) * | 1999-08-20 | 2001-07-01 | Taiwan Semiconductor Mfg | Comparing circuit, testing circuit and testing method for the parallel test of DRAM devices |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4556840A (en) * | 1981-10-30 | 1985-12-03 | Honeywell Information Systems Inc. | Method for testing electronic assemblies |
US4575648A (en) * | 1983-12-23 | 1986-03-11 | At&T Bell Laboratories | Complementary field effect transistor EXCLUSIVE OR logic gates |
US4789951A (en) * | 1986-05-16 | 1988-12-06 | Advanced Micro Devices, Inc. | Programmable array logic cell |
EP0400179B1 (de) * | 1989-05-31 | 1995-07-19 | Siemens Aktiengesellschaft | Verfahren und Vorrichtung zum internen Paralleltest von Halbleiterspeichern |
GB2244364B (en) * | 1990-05-24 | 1994-03-09 | Coin Controls | Coin discrimination apparatus |
US5241265A (en) * | 1992-03-26 | 1993-08-31 | Northern Telecom Limited | Logic function circuit with an array of data stores and their circuit testing |
JP3865828B2 (ja) * | 1995-11-28 | 2007-01-10 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JPH10303737A (ja) * | 1997-04-23 | 1998-11-13 | Mitsubishi Electric Corp | 3入力排他的否定論理和回路 |
JP4044663B2 (ja) * | 1998-02-25 | 2008-02-06 | 富士通株式会社 | 半導体装置 |
-
2003
- 2003-06-20 JP JP2004519104A patent/JP4176716B2/ja not_active Expired - Fee Related
- 2003-06-20 AU AU2003244975A patent/AU2003244975A1/en not_active Abandoned
- 2003-06-20 US US10/520,198 patent/US7199573B2/en not_active Expired - Lifetime
- 2003-06-20 AT AT03738449T patent/ATE406582T1/de not_active IP Right Cessation
- 2003-06-20 EP EP03738449A patent/EP1521974B1/en not_active Expired - Lifetime
- 2003-06-20 WO PCT/IB2003/002957 patent/WO2004005946A2/en active IP Right Grant
- 2003-06-20 DE DE60323232T patent/DE60323232D1/de not_active Expired - Lifetime
- 2003-06-20 CN CNB038157551A patent/CN100401086C/zh not_active Expired - Fee Related
- 2003-07-04 TW TW092118363A patent/TWI287638B/zh not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS635272A (ja) * | 1986-06-25 | 1988-01-11 | Fujitsu Ten Ltd | 出力異常検出機能付きロジツク回路装置 |
WO1999039218A2 (en) * | 1998-02-02 | 1999-08-05 | Koninklijke Philips Electronics N.V. | Circuit with interconnect test unit and a method of testing interconnects between a first and a second electronic circuit |
US6208571B1 (en) * | 1999-04-30 | 2001-03-27 | Fujitsu Limited | Semiconductor memory device, circuit board mounted with semiconductor memory device, and method for testing interconnection between a semiconductor memory device with a circuit board |
TW444127B (en) * | 1999-08-20 | 2001-07-01 | Taiwan Semiconductor Mfg | Comparing circuit, testing circuit and testing method for the parallel test of DRAM devices |
Non-Patent Citations (1)
Title |
---|
STATIC COMPONENTINTERCONNECT TEST TECHNOLOGY (SCITT) a newtechnology for assembly testing. Alex Biewenga et al.ITC'99, INTERNATIONAL TEST CONFERENCE, NY: IEEE, US,Vol.CONF. 30 . 1999 * |
Also Published As
Publication number | Publication date |
---|---|
JP2005532548A (ja) | 2005-10-27 |
EP1521974B1 (en) | 2008-08-27 |
TW200403444A (en) | 2004-03-01 |
AU2003244975A1 (en) | 2004-01-23 |
TWI287638B (en) | 2007-10-01 |
EP1521974A2 (en) | 2005-04-13 |
JP4176716B2 (ja) | 2008-11-05 |
WO2004005946A3 (en) | 2004-06-03 |
US20060061376A1 (en) | 2006-03-23 |
CN1666110A (zh) | 2005-09-07 |
WO2004005946A2 (en) | 2004-01-15 |
US7199573B2 (en) | 2007-04-03 |
AU2003244975A8 (en) | 2004-01-23 |
ATE406582T1 (de) | 2008-09-15 |
DE60323232D1 (de) | 2008-10-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: NXP CO., LTD. Free format text: FORMER OWNER: KONINKLIJKE PHILIPS ELECTRONICS N.V. Effective date: 20070914 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20070914 Address after: Holland Ian Deho Finn Applicant after: Koninkl Philips Electronics NV Address before: Holland Ian Deho Finn Applicant before: Koninklijke Philips Electronics N.V. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080709 Termination date: 20180620 |
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CF01 | Termination of patent right due to non-payment of annual fee |