CN100373617C - 一种配对晶体管及其制造方法 - Google Patents

一种配对晶体管及其制造方法 Download PDF

Info

Publication number
CN100373617C
CN100373617C CNB2004100812458A CN200410081245A CN100373617C CN 100373617 C CN100373617 C CN 100373617C CN B2004100812458 A CNB2004100812458 A CN B2004100812458A CN 200410081245 A CN200410081245 A CN 200410081245A CN 100373617 C CN100373617 C CN 100373617C
Authority
CN
China
Prior art keywords
transistors
transistor
cores
paired transistor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2004100812458A
Other languages
English (en)
Other versions
CN1624914A (zh
Inventor
吴才荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CNB2004100812458A priority Critical patent/CN100373617C/zh
Publication of CN1624914A publication Critical patent/CN1624914A/zh
Application granted granted Critical
Publication of CN100373617C publication Critical patent/CN100373617C/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

一种配对晶体管及其制造方法，配对晶体管包括有两个晶体三极管，其特征在于：两个晶体三极管的特性参数相同或非常相近，且两晶体三极管的管芯彼此分离地塑封于一体。该配对晶体管的制造方法是从同一个晶体管管芯的圆片上取下相邻的两只管芯，相对应地彼此分离地置于各自的引脚框架上，压焊好金丝导线，用注塑封装机将这两只管芯塑封于一体，形成特性参数相同或非常相近的配对晶体管。本发明具有结构简单、工作可靠和使用寿命长等优点。

Description

一种配对晶体管及其制造方法
(一)、所属技术领域
本发明涉及一种半导体产品及其制造方法，特别是一种配对晶体管及其制造方法。
(二)、技术背景
现有的晶体三极管一般包括有一个晶体管管芯，它是从晶体管管芯的圆片上取下一只管芯，相对应地置于引脚框架上，压焊好金丝导线，用注塑封装机将塑封成一只晶体管。随着电子技术的发展，许多电子、电器产品要求晶体管配对使用，在大批量生产过程中，从众多的晶体管中选定配对的两只晶体管，劳动强度大，不仅浪费人力、物力和时间，而且两晶体管的特性参数很难配对一致，在使用过程中，容易出现参数不一致导致配对晶体管中其中一只晶体管过载而发热严重，从而严重地影响电子、电器产品的质量、可靠性和寿命。
(三)、发明内容
本发明的目的之一就是提供一种工作可靠性强和使用寿命长的配对晶体管。
本发明的另一个目的就是提供一种制造上述配对晶体管的方法，它可以轻易地实现两个晶体管的特性参数相同或非常相近的配对，降低劳动强度，节省人力、物力和时间。
本发明的第一个目的是通过这样的技术方案实现的，它包括有两个晶体三极管，其特征在于：两个晶体三极管的特性参数相同或非常相近，且两晶体三极管的管芯彼此分离地塑封于一体。将这种特性参数相同或非常相近的配对晶体管用于需要配对使用晶体三极管的电子、电器产品中，可以显著地增强电子、电器产品的工作可靠性，同时显著地延长产品的使用寿命。但是在众多的晶体管中选取两个特性参数相同或非常相近的晶体三极管是非常困难的，需要花费大量的人力、物力和时间。为了解决这个问题，可以采用下述的方法来方便地实现。
本发明的第二个目的是通过这样的技术方案实现的，它是从同一个晶体管管芯的圆片上取下相邻的两只管芯，相对应地彼此分离地置于各自的引脚框架上，压焊好金丝导线，用注塑封装机将这两只管芯塑封于一体，形成特性参数相同或非常相近的配对晶体管。众所周知，对同一个晶体管管芯的圆片而言，在加工制造过程中，由于工艺条件及环境条件基本相同，使得同一个圆片上相邻的两个晶体管管芯的特性参数是相同或非常相近的。因此，采用所述的方法，就可以方便地实现两个特性参数相同或非常相近的晶体管配对，显著地降低劳动强度，节省了人力、物力和时间，提高了产品的质量。
由于采用了上述技术方案，本发明结构简单、工作可靠和使用寿命长等优点。
(四)、附图说明
本发明的附图说明如下：
图1为本发明的配对晶体管的结构示意图；
图中：1.晶体三极管；2.管芯；3.集电极；4.发射极；5.基极；6.塑封体。
(五)、具体实施方式
下面结合附图和实施例对本发明作进一步说明：
如图1所示，本发明所述的配对晶体管包括有两个晶体三极管1，其特征在于：两个晶体三极管1的特性参数相同或非常相近，且两晶体三极管1的管芯2彼此分离地塑封于一体。将这种特性参数相同或非常相近的配对晶体管用于需要配对使用晶体三极管的电子、电器产品中，可以显著地增强电子、电器产品的工作可靠性，同时显著地延长产品的使用寿命。但是在众多的晶体管中选取两个特性参数相同或非常相近的晶体三极管是非常困难的，需要花费大量的人力、物力和时间。为了解决这个问题，可以采用下述的方法来方便地实现。
上述配对晶体管的制造方法是从同一个晶体管管芯的圆片上取下相邻的两只管芯，相对应地彼此分离地置于各自的引脚框架上，压焊好金丝导线，用注塑封装机将这两只管芯塑封于一体，形成特性参数相同或非常相近的配对晶体管。众所周知，对同一个晶体管管芯的圆片而言，在加工制造过程中，由于工艺条件及环境条件基本相同，使得同一个圆片上相邻的两个晶体管管芯的特性参数是相同或非常相近的。因此，采用所述的方法，就可以方便地实现两个特性参数相同或非常相近的晶体管配对，显著地降低劳动强度，节省了人力、物力和时间，提高了产品的质量。

Claims (2)

1.一种配对晶体管，包括有两个晶体三极管(1)，其特征在于：两个晶体三极管(1)的特性参数相同或非常相近，且两晶体三极管(1)的管芯(2)彼此分离地塑封于一体。
2.一种配对晶体管的制造方法，其特征在于：它是从同一个晶体管管芯的圆片上取下相邻的两只管芯，相对应地彼此分离地置于各自的引脚框架上，压焊好金丝导线，用注塑封装机将这两只管芯塑封于一体，形成特性参数相同或非常相近的配对晶体管。
CNB2004100812458A 2004-11-08 2004-11-08 一种配对晶体管及其制造方法 Expired - Fee Related CN100373617C (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2004100812458A CN100373617C (zh) 2004-11-08 2004-11-08 一种配对晶体管及其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2004100812458A CN100373617C (zh) 2004-11-08 2004-11-08 一种配对晶体管及其制造方法

Publications (2)

Publication Number Publication Date
CN1624914A CN1624914A (zh) 2005-06-08
CN100373617C true CN100373617C (zh) 2008-03-05

Family

ID=34765651

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004100812458A Expired - Fee Related CN100373617C (zh) 2004-11-08 2004-11-08 一种配对晶体管及其制造方法

Country Status (1)

Country Link
CN (1) CN100373617C (zh)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0809292A2 (en) * 1993-04-23 1997-11-26 Fuji Electric Co. Ltd. Power transistor module
CN2461150Y (zh) * 2001-01-19 2001-11-21 杭州百事特电子有限公司 表面贴装式晶体管组合器件
US20040195649A1 (en) * 2003-03-26 2004-10-07 Denso Corporation Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0809292A2 (en) * 1993-04-23 1997-11-26 Fuji Electric Co. Ltd. Power transistor module
CN2461150Y (zh) * 2001-01-19 2001-11-21 杭州百事特电子有限公司 表面贴装式晶体管组合器件
US20040195649A1 (en) * 2003-03-26 2004-10-07 Denso Corporation Semiconductor device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
简单易制的晶体三极管配对检测仪器. 金甜.家电维修技术，第2002年第10期. 2002 *

Also Published As

Publication number Publication date
CN1624914A (zh) 2005-06-08

Similar Documents

Publication Publication Date Title
CN100373617C (zh) 一种配对晶体管及其制造方法
CN106485236A (zh) 一种指纹模组的制作方法、指纹模组及终端
CN102446781B (zh) 相变存储器芯片的封装方法
CN112216666B (zh) 元器件电性连接方法及芯片封装
CN103606539A (zh) 一种基于框架采用开孔优化技术的扁平封装件及其制作工艺
CN102800765A (zh) Led封装结构及其封装工艺
CN102651360A (zh) 一种可铜线键接的封装体结构及其制作方法
CN206370419U (zh) 多引脚贴片元件
CN101661919A (zh) 大功率晶体管
CN100437855C (zh) 拉带成型方法
CN106783836A (zh) 智能功率模块、智能功率模块的制备方法和电力电子设备
CN209515637U (zh) 一种功率模块结构
CN203085519U (zh) 一种芯片引线框架
CN206003767U (zh) 一种超薄封装器件
CN109545759A (zh) 一种功率模块结构及其制造方法
CN102076171B (zh) 印制电路板的封装方法以及晶体振荡器
KR100231837B1 (ko) 파인 피치 리드프레임의 이너리드 제조방법
CN107564883A (zh) 一种具有嵌入式pin针的dip封装结构及其工艺方法
CN212303862U (zh) 一种通讯用小型化隔离器的封装外壳
CN203351645U (zh) 正装双电极芯片反贴应用的结构
CN203589007U (zh) 一种基于框架的多器件smt扁平封装件
JP2665201B2 (ja) ボールグリッドアレイ型半導体装置の製造方法
CN215220716U (zh) 多基岛芯片封装结构
CN201829491U (zh) 塑封增强型三极管引线框架
CN2504854Y (zh) 一种胶粘塑封滤波器

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee