CN100352035C - 用于高纵横比半导体器件的掺硼氮化钛层 - Google Patents
用于高纵横比半导体器件的掺硼氮化钛层 Download PDFInfo
- Publication number
- CN100352035C CN100352035C CNB028152131A CN02815213A CN100352035C CN 100352035 C CN100352035 C CN 100352035C CN B028152131 A CNB028152131 A CN B028152131A CN 02815213 A CN02815213 A CN 02815213A CN 100352035 C CN100352035 C CN 100352035C
- Authority
- CN
- China
- Prior art keywords
- contact
- conductive contact
- channel
- layer
- titanium
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/918,919 US6696368B2 (en) | 2001-07-31 | 2001-07-31 | Titanium boronitride layer for high aspect ratio semiconductor devices |
| US09/918,919 | 2001-07-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1539164A CN1539164A (zh) | 2004-10-20 |
| CN100352035C true CN100352035C (zh) | 2007-11-28 |
Family
ID=25441171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB028152131A Expired - Lifetime CN100352035C (zh) | 2001-07-31 | 2002-07-30 | 用于高纵横比半导体器件的掺硼氮化钛层 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6696368B2 (enExample) |
| EP (1) | EP1412976B1 (enExample) |
| JP (1) | JP4168397B2 (enExample) |
| KR (1) | KR100715389B1 (enExample) |
| CN (1) | CN100352035C (enExample) |
| AT (1) | ATE532212T1 (enExample) |
| WO (1) | WO2003012860A2 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030036242A1 (en) * | 2001-08-16 | 2003-02-20 | Haining Yang | Methods of forming metal-comprising materials and capacitor electrodes; and capacitor constructions |
| US6746952B2 (en) * | 2001-08-29 | 2004-06-08 | Micron Technology, Inc. | Diffusion barrier layer for semiconductor wafer fabrication |
| US7067416B2 (en) * | 2001-08-29 | 2006-06-27 | Micron Technology, Inc. | Method of forming a conductive contact |
| US7164165B2 (en) * | 2002-05-16 | 2007-01-16 | Micron Technology, Inc. | MIS capacitor |
| US7150789B2 (en) * | 2002-07-29 | 2006-12-19 | Micron Technology, Inc. | Atomic layer deposition methods |
| US6753271B2 (en) | 2002-08-15 | 2004-06-22 | Micron Technology, Inc. | Atomic layer deposition methods |
| US6890596B2 (en) * | 2002-08-15 | 2005-05-10 | Micron Technology, Inc. | Deposition methods |
| US6673701B1 (en) * | 2002-08-27 | 2004-01-06 | Micron Technology, Inc. | Atomic layer deposition methods |
| KR100487563B1 (ko) * | 2003-04-30 | 2005-05-03 | 삼성전자주식회사 | 반도체 소자 및 그 형성 방법 |
| US7233073B2 (en) * | 2003-07-31 | 2007-06-19 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for fabricating the same |
| US7358172B2 (en) * | 2006-02-21 | 2008-04-15 | International Business Machines Corporation | Poly filled substrate contact on SOI structure |
| CN103022163A (zh) * | 2011-09-22 | 2013-04-03 | 比亚迪股份有限公司 | 一种晶硅太阳能电池及其制备方法 |
| EP3032575B1 (en) * | 2014-12-08 | 2020-10-21 | IMEC vzw | Method for forming an electrical contact. |
| US10854505B2 (en) | 2016-03-24 | 2020-12-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Removing polymer through treatment |
| US10361213B2 (en) * | 2016-06-28 | 2019-07-23 | Sandisk Technologies Llc | Three dimensional memory device containing multilayer wordline barrier films and method of making thereof |
| US10355139B2 (en) | 2016-06-28 | 2019-07-16 | Sandisk Technologies Llc | Three-dimensional memory device with amorphous barrier layer and method of making thereof |
| US20180331118A1 (en) * | 2017-05-12 | 2018-11-15 | Sandisk Technologies Llc | Multi-layer barrier for cmos under array type memory device and method of making thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05267220A (ja) * | 1992-03-19 | 1993-10-15 | Sony Corp | 半導体装置の密着層及びメタルプラグ形成方法 |
| US5976976A (en) * | 1997-08-21 | 1999-11-02 | Micron Technology, Inc. | Method of forming titanium silicide and titanium by chemical vapor deposition |
| US20010002071A1 (en) * | 1999-08-24 | 2001-05-31 | Agarwal Vishnu K. | Boron incorporated diffusion barrier material |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5747116A (en) | 1994-11-08 | 1998-05-05 | Micron Technology, Inc. | Method of forming an electrical contact to a silicon substrate |
| US5946594A (en) | 1996-01-02 | 1999-08-31 | Micron Technology, Inc. | Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants |
| FR2744461B1 (fr) * | 1996-02-01 | 1998-05-22 | Tecmachine | Nitrure de titane dope par du bore, revetement de substrat a base de ce nouveau compose, possedant une durete elevee et permettant une tres bonne resistance a l'usure, et pieces comportant un tel revetement |
| US5908947A (en) | 1996-02-09 | 1999-06-01 | Micron Technology, Inc. | Difunctional amino precursors for the deposition of films comprising metals |
| US5990021A (en) | 1997-12-19 | 1999-11-23 | Micron Technology, Inc. | Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture |
| US5700716A (en) | 1996-02-23 | 1997-12-23 | Micron Technology, Inc. | Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers |
| JPH09306870A (ja) | 1996-05-15 | 1997-11-28 | Nec Corp | バリア膜の形成方法 |
| US5977636A (en) | 1997-01-17 | 1999-11-02 | Micron Technology, Inc. | Method of forming an electrically conductive contact plug, method of forming a reactive or diffusion barrier layer over a substrate, integrated circuitry, and method of forming a layer of titanium boride |
| US5856237A (en) * | 1997-10-20 | 1999-01-05 | Industrial Technology Research Institute | Insitu formation of TiSi2/TiN bi-layer structures using self-aligned nitridation treatment on underlying CVD-TiSi2 layer |
| US6037252A (en) | 1997-11-05 | 2000-03-14 | Tokyo Electron Limited | Method of titanium nitride contact plug formation |
| US6156638A (en) | 1998-04-10 | 2000-12-05 | Micron Technology, Inc. | Integrated circuitry and method of restricting diffusion from one material to another |
| KR100331261B1 (ko) * | 1998-12-30 | 2002-08-22 | 주식회사 하이닉스반도체 | 반도체장치의 제조 방법 |
| US6086442A (en) | 1999-03-01 | 2000-07-11 | Micron Technology, Inc. | Method of forming field emission devices |
| US6329670B1 (en) * | 1999-04-06 | 2001-12-11 | Micron Technology, Inc. | Conductive material for integrated circuit fabrication |
| US6200649B1 (en) * | 1999-07-21 | 2001-03-13 | Southwest Research Institute | Method of making titanium boronitride coatings using ion beam assisted deposition |
| DE10019164A1 (de) | 2000-04-12 | 2001-10-18 | Mannesmann Ag | SIM-Lock auf bestimmte IMSI-Bereiche einer SIM-Karte für Prepaid- und Postpaid-Karten |
| US7067416B2 (en) * | 2001-08-29 | 2006-06-27 | Micron Technology, Inc. | Method of forming a conductive contact |
| US6746952B2 (en) * | 2001-08-29 | 2004-06-08 | Micron Technology, Inc. | Diffusion barrier layer for semiconductor wafer fabrication |
-
2001
- 2001-07-31 US US09/918,919 patent/US6696368B2/en not_active Expired - Lifetime
-
2002
- 2002-07-30 WO PCT/US2002/024088 patent/WO2003012860A2/en not_active Ceased
- 2002-07-30 EP EP02765900A patent/EP1412976B1/en not_active Expired - Lifetime
- 2002-07-30 JP JP2003517937A patent/JP4168397B2/ja not_active Expired - Lifetime
- 2002-07-30 KR KR1020047001585A patent/KR100715389B1/ko not_active Expired - Lifetime
- 2002-07-30 AT AT02765900T patent/ATE532212T1/de active
- 2002-07-30 CN CNB028152131A patent/CN100352035C/zh not_active Expired - Lifetime
- 2002-11-04 US US10/287,203 patent/US6822299B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05267220A (ja) * | 1992-03-19 | 1993-10-15 | Sony Corp | 半導体装置の密着層及びメタルプラグ形成方法 |
| US5976976A (en) * | 1997-08-21 | 1999-11-02 | Micron Technology, Inc. | Method of forming titanium silicide and titanium by chemical vapor deposition |
| US20010002071A1 (en) * | 1999-08-24 | 2001-05-31 | Agarwal Vishnu K. | Boron incorporated diffusion barrier material |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1412976B1 (en) | 2011-11-02 |
| KR20040019102A (ko) | 2004-03-04 |
| US20030025206A1 (en) | 2003-02-06 |
| CN1539164A (zh) | 2004-10-20 |
| JP2005527098A (ja) | 2005-09-08 |
| US6822299B2 (en) | 2004-11-23 |
| WO2003012860A3 (en) | 2003-11-27 |
| WO2003012860A2 (en) | 2003-02-13 |
| ATE532212T1 (de) | 2011-11-15 |
| US20030075802A1 (en) | 2003-04-24 |
| KR100715389B1 (ko) | 2007-05-08 |
| EP1412976A2 (en) | 2004-04-28 |
| US6696368B2 (en) | 2004-02-24 |
| JP4168397B2 (ja) | 2008-10-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20071128 |