CH715813B1 - Method for controlling a three-phase pulse-controlled rectifier system with a current link. - Google Patents

Abstract

The invention relates to a method for controlling a three-phase pulse rectifier system (1, 2, 3) with a three-phase bridge circuit (2), an intermediate circuit inductance (L) and a load converter (3). In chronologically consecutive sections, the following is carried out in each section: • In that bridge branch, hereinafter referred to as the selected bridge branch, of the three-phase bridge circuit (2) to which the mains phase with the highest phase current in terms of absolute value, hereinafter referred to as the selected mains phase, is assigned depending on the polarity of the phase current, this mains phase is connected to a switch of the selected bridge arm, hereinafter referred to as the selected switch, a positive connection point (p) or a negative connection point (n) of the three-phase bridge circuit (2), with this mains phase being connected to a positive phase current connected to the positive terminal and to the negative terminal when the phase current is negative, and remain connected for the duration of this segment. • In the other two, non-selected bridge branches, the corresponding positive or negative connection point is alternately connected to the two non-selected phases by pulsing the switch opposite the selected switch. The invention also relates to a device for controlling a three-phase pulse rectifier system (1, 2, 3).

Description

The invention relates to the field of three-phase pulse rectifier systems, in particular to a method for controlling the input phase currents to a sinusoidal shape and the output DC voltage.

In order to convert the voltage of the three-phase network into a DC voltage, the DC value of which is below the minimum value of the rectified line-to-line three-phase voltage, as is required, for example, when charging the batteries of electric vehicles, according to the prior art, active three-phase pulse rectifier systems with step-down converter characteristics are generally used .

The input terminals, i.e. the center taps, of a bidirectionally blocking three-phase bridge circuit are connected directly to the mains terminals, with the individual switching elements of the three bridge branches being connected, for example, by the anti-series circuit of a unidirectional blocking component and a diode, the anti-series circuit of two unidirectional blocking components, or a bidirectional blocking component can be realized.

By appropriate clocking of the bridge arms, which have the function of switching through the input voltage lying at the midpoint to either the positive or negative output voltage rail, a switched DC voltage is now generated at the output of the three-phase bridge circuit, i.e. between the positive and negative output voltage rail, the mean value of which just coincides with the direct voltage to be formed, but whose instantaneous value corresponds in sections to one of the possible concatenated input voltages depending on the selected pulse pattern. To smooth the switched DC voltage to a constant DC output voltage with the same mean value, a low-pass filter consisting of an output inductance and a DC support capacity is therefore arranged at the output terminals of the three-phase bridge circuit.

[0005] Clocking means high-frequency switching of the converters or their power switches, in contrast to the low-frequency profile of the mains voltages. A corresponding clock frequency is also called switching frequency, its reciprocal value is a clock period.

[0006] In terms of low mains feedback, a mains voltage-proportional input current profile is advantageously set by appropriate selection of the pulse pattern. In this case, the three-phase pulse rectifier system behaves like a three-phase resistive load and thus draws constant power from the three-phase network, i.e. when regulated to a constant DC output voltage, a constant DC inductance current or intermediate circuit current flows in the output inductance.

Thus, the clocking of the bridge branches can also be understood as switching the constant DC inductance current to the three input phases, with the pulse pattern being selected in such a way that the distribution of the DC inductance current at the center taps of the three-phase bridge circuit leads to three input currents proportional to the mains voltage at low frequency. Switching the DC inductance current causes switching-frequency pulsed phase currents to be drawn from the center taps of the three-phase bridge circuit, which is why input capacitors are arranged in a star or delta connection at the input of the three-phase pulse rectifier system to smooth the phase currents.

Alternatively, an input current profile with a defined phase shift relative to the mains voltage can also be set within a certain range.

If the underlying application is also to be able to form a higher output voltage, a DC/DC step-up converter stage must be arranged downstream of the system, resulting in a two-stage three-phase step-up converter pulse rectifier system, with the output inductance of the three-phase rectifier also advantageously being used as the inductance of the step-up converter stage step-down converter stage is used, i.e. the bridge branch of the step-up converter stage is arranged between the output inductance of the three-phase rectifier step-down converter stage and the DC back-up capacitance, and the inductance thus forms a DC intermediate circuit inductance as a DC intermediate circuit inductance (see Figure 1).

If the step-up converter stage is bidirectional, power supplied by an active load can then also be fed into the DC current intermediate circuit between the two converter stages and from there power can be fed back into the grid. This operation occurs, for example, when photovoltaically generated power is fed into the three-phase network or when a three-phase machine is fed from a DC voltage.

For a compact implementation, it is advantageous in both cases to provide a high clock frequency for the converter stages, although this results in relatively high switching losses, which reduce the efficiency of the energy conversion. Furthermore, for the high-frequency clocking of the electronic switches, a relatively high driving power is required overall, which also impairs the efficiency.

The object of the invention is therefore to create a method for the regulation and modulation of a two-stage three-phase step-up converter pulse rectifier system, which has reduced switching losses, with a sinusoidal mains current curve advantageously lying in phase or in opposite phase with the mains voltage and a constant output voltage should be ensured.

[0013] The object is achieved by a control method according to the patent claims.

The method is used to regulate a three-phase pulse rectifier system, which has a three-phase bridge circuit for power exchange between a three-phase network and an intermediate circuit inductance, and a load converter for power exchange between the intermediate circuit inductance and a load.

The bridge arms of the three-phase bridge circuit are arranged for switching phase currents flowing through the intermediate circuit inductance, with successive sections, each lasting one-sixth of the period of the three-phase network, each in a section • in that bridge arm, hereinafter selected bridge arm referred to as, the three-phase bridge circuit, to which the mains phase with the highest absolute value phase current, hereinafter referred to as selected mains phase, is assigned, this mains phase optionally, depending on the polarity of the phase current, with a switch of the selected bridge arm, hereinafter referred to as selected switch, a positive connection point or is connected to a negative connection point of the three-phase bridge circuit, this mains phase being connected to the positive connection point in the case of a positive phase current and to the negative connection point in the case of a negative phase current, and during the period d of this section remains connected, • in the other two, non-selected bridge branches, the corresponding positive or negative connection point is alternately connected to the two non-selected phases by pulsing the switch opposite the selected switch.

In the selected branch of the bridge, the non-selected switch remains open, ie not conductive, for the entire duration of the section. There is therefore no freewheeling of the intermediate circuit current through a bridge arm. Neither the selected switch nor the opposite one in the same phase are clocked. Switching losses and a control power requirement that would occur with clocking are avoided.

[0017] These advantages can also be regarded as a result of the choice that the current through the intermediate circuit inductance is equal to the phase current in the time segment. Instead of a conventional regulation of this current to a constant value, this current develops a six-pulse course over an entire period of the three-phase system.

The current through the selected switch flows through the intermediate circuit inductance. Conversely, the entire intermediate circuit current also flows through the selected switch. The intermediate circuit current flows back through the other two phases and is divided between these two other phases by means of the two opposite switches.

[0019] By only switching these two opposite switches (alternately) to the positive or negative connection point, the number of switchovers in a clock period can be halved, and larger voltage jumps can be avoided.

With respect to a lower switch, the upper switches are understood to be opposite switches, and vice versa. For example, if the bottom switch of the first bridge arm is the selected switch, then the opposite switches in the unselected bridge arms are equal to the top switches in the second and third bridge arms.

In embodiments, a sinusoidal phase current is set in each case in a time section by clocking in each of the other two, unselected, bridge arms.

In embodiments, the load converter uses clocking to set a voltage at a connection of the intermediate circuit inductance on the load converter side, which in conjunction with a switched DC voltage formed by the three-phase bridge circuit at the other connection of the intermediate circuit inductance on the bridge circuit side results in a predetermined intermediate circuit current.

Here and in the following, for the sake of simplicity, the AC voltage side or mains side is considered as the input and the DC voltage side as the output. However, a power flow can not only take place from the input to the output but also vice versa. If the circuit is to allow power to flow in both directions, the power switches used are usually also bidirectionally conducting and switching, i.e. they can conduct currents in both directions through the switch and switch them on or off. If a power flow is to be realized in only one direction, unidirectionally conducting and switching circuit breakers can be used.

The subject of the invention is explained in more detail below with reference to preferred exemplary embodiments which are illustrated in the accompanying drawings. The following are shown schematically in each case: FIG. 1: Power section of the system, the input section being designed as a bidirectionally blocking three-phase bridge circuit and a load converter as a DC/DC step-up converter. Figure 2: Current curves of the mains input currents (ia, ibund ic) and the intermediate circuit current iL. The subdivision into the six current sectors and the allocation of the mains currents to the intermediate circuit current (iL) takes place depending on the current ratios of the mains input currents, with the intermediate circuit current (iL) always corresponding to the largest mains input current (ia, ibor ic) in terms of amount. Figure 3: Voltage curves of the mains input voltages (ua, u and uc) and the switched DC voltage ubu in the third sector at time (t1) for the conventional control method. The course of the switched DC voltage ubu has four voltage intervals, beginning with a freewheeling interval (ucc), i.e. a total of four switchovers are necessary during a switching period. FIG. 4: Exemplary voltage curves of the mains input voltages (ua, u and uc) and the switched DC voltage ubu in the third sector at time (t1) for the control method according to the invention. The course of the switched DC voltage ubu has only two voltage intervals, i.e. the number of switchovers can be reduced to two during a switching period. Figure 5: (Combined from Figures 5a and 5b) Circuit implementation of the method for controlling and modulating the system according to Figure 1. Figure 6: Alternative design of the load converter as an active current-impressing series element in the form of a switching cell, i.e. the load converter is one in the connecting line from positive output voltage rail of the three-phase bridge branch and positive output voltage terminal arranged full-bridge switching cell, which actively forms the intermediate circuit current via appropriate clocking. Figure 7: Alternative design of the load converter as a pulse converter, in particular as a pulse-controlled inverter, for direct feeding of a machine M.

Instead of a constant current, the course of the current intermediate circuit (iL) is regulated in the current intermediate circuit in such a way that a six-pulse current is set over one mains period, the instantaneous value of which corresponds to the phase current with the highest magnitude (see FIG. 2). Thus, within an input current sector, the bridge arm associated with the largest phase current can be switched through depending on the polarity of the largest phase current, i.e. the upper switch remains switched on for a positive phase current and the lower switch remains switched on within an input current sector for a negative phase current, and switching can be carried out of this bridge branch into freewheeling, i.e. simultaneous switching on of the upper and lower switch, must be prevented.

In contrast to a conventional implementation with a constant current in the current intermediate circuit, the degree of freedom with regard to the selection of the intermediate circuit current profile is used, the largest phase current being formed by changing the current in the current intermediate circuit over time instead of by pulse width modulation of all phases. The method according to the invention thus avoids clocking the bridge branch with the phase current which is the greatest in terms of absolute value, which advantageously ensures lower switching losses and a lower control power requirement (cf. FIG. 2).

[0027] Furthermore, a continuous current profile is achieved within an input current sector for the phase current with the greatest amount, which advantageously leads to lower EMC interference emission and thus better EMC behavior.

Since pulse rectifier systems typically have no connection to the network star point (m), the sum of the phase currents is forced to zero or the largest phase current flows back as a sum over the other two phases. Since the bridge branch with the largest phase current is not clocked in the method according to the invention, the largest phase current is divided between the two other phases exclusively by switching between the two remaining bridge branches instead of switching between all bridge branches, with the conduction time of the two switch-on intervals being able to be divided in this way that a sinusoidal phase current profile is also achieved in the other two phases (see FIG. 2).

Based on conventional control with a symmetrical pulse pattern, in this case the switched DC voltage at the output of the three-phase bridge circuit consists of only two instead of three concatenated input voltages, i.e. two instead of three voltage levels, which means that the number of switchovers in a clock period in can be halved from four to two compared to the conventional method. Advantageously, the largest voltage jump can be avoided in both cases, as a result of which lower switching losses and lower switching-frequency current ripple in the intermediate circuit inductance are achieved (cf. FIGS. 3 and 4).

This situation is explained below, assuming resistive network behavior using the example of the third input current sector, in which the phase current with the greatest magnitude flows in phase (c), for the conventional method and the method according to the invention.

[0031] While in the conventional method the intermediate circuit current is kept constant and at least at the peak value of the input phase currents and thus all phase currents are always smaller than the intermediate circuit current during an entire network period or up to six discrete points in time, all three bridges must be clocked in order to to achieve a sinusoidal course of all phase currents. As shown by way of example in Figure 3 for the time (t1), the switched DC voltage (ubu) is then composed of four voltage intervals, assuming a symmetrical pulse pattern, with the upper and lower switches of the phase (c) belonging to the phase (c) beginning with a freewheeling interval (ucc). Bridge branch are switched on and then only the upper switch of phase (b) or (a) is switched on for the two active phase-to-phase voltages (ubc) and (uac).

If the intermediate circuit current (iL) is regulated according to the method according to the invention to a six-pulse curve corresponding to the phase current with the highest magnitude, then the freewheeling interval (ucc) can be dispensed with, as shown by way of example in FIG. 4 for the same time (t1), in which case the switched DC voltage (ubu), assuming a symmetrical pulse pattern, consists of only two voltage intervals, i.e. the two active line-to-line voltages (ubc) and (uac), with only the upper switch of phase (b) or (a) being switched on and the lower one Phase (c) switch stays on all the time.

It should be noted that in the conventional method the lower switch of the bridge branch associated with phase (c) also remains switched on continuously, but the upper switches change between all three phases during a switching period, while in the method according to the invention the upper switches only switch between two Change phases and thus the intermediate circuit current (iL) flows back via phase (c) during the entire interval shown in FIG. According to the example, the pulse pattern as well as the switched voltage for the other sectors takes place by cyclically swapping the phases.

It should be noted that fluctuations in the intermediate circuit current (iL) over time can be compensated for by appropriate pulse width modulation of the downstream load converter, for example a step-up converter stage, i.e. a constant output voltage (uo) can still be formed. In particular, the load converter can be used to set the voltage (ubo) at the connection of the intermediate circuit inductance on the load converter side in such a way that the desired intermediate circuit current (iL) results in interaction with the voltage at the other connection on the bridge circuit side (towards the bridge circuit, i.e. the switched DC voltage ubu). . The switched DC voltage ubu is specified by the mains voltages and the switching states of the three-phase bridge circuit (2). The desired intermediate circuit current (iL) should follow the aforementioned six-pulse curve, since it is equal to one of the phase currents in some sections.

It should be noted that the two-stage three-phase step-up converter pulse rectifier system is not limited to a pure step-up converter function, but can also be operated as a step-down converter. In this case, the upper switch of the step-up converter on the output side must be switched through so that the output voltage (uo) corresponds to the mean value of the switched DC voltage at the output of the three-phase rectifier (ubu); the active three-phase bridge is then operated as a conventional step-down converter, with more than two bridge arms having to be clocked to regulate a constant intermediate circuit current or output voltage. A state-of-the-art method can then be used for regulation. Depending on the operation (step-up or step-down converter operation), there is a switchover between the regulation according to the invention and a regulation according to the prior art.

The three-phase step-up converter pulse rectifier system to be controlled and regulated by the method according to the invention can, with a known structure, be replaced on the input side by a bidirectionally blocking three-phase two-point bridge circuit (2) (bridge circuit) with three AC phase inputs (a, b and c) and a positive (p) and a negative voltage rail (n) are formed, with both voltage rails being routed to the input of a converter stage on the output side (load converter) (3) which feeds a consumer, or across the consumer a voltage (load voltage) ( uo) generated (cf. Figure 1).

Furthermore, the phase inputs of the bridge circuit (a, b and c) are connected either directly or via an input filter to the associated phase terminals (a, b and c) of the feeding three-phase AC network (network) (1), but where at least each phase input of the bridge circuit (a, b and c) is routed to a filter capacitor (mains filter capacitors) (C), which are connected either in a star or delta connection in order to keep the pulse-shaped input currents that occur during operation in the three-phase bridge circuit away from the mains or to prevent the Defining the supply voltage independently of the internal impedance of the network.

The bridge circuit (2) generally has three bridge branches, each bridge branch having an upper electronic switch connected to the positive voltage rail (p) and a lower electronic switch connected to the negative voltage rail (n) with bipolar blocking capability and the phase output of the bridge branch ( a, b and c) is formed by the junction of the free ends of the upper and lower switches. The bipolar blocking switches (21 and 22) can each be realized, for example, by the anti-series circuit of a unidirectional blocking component and a diode, the anti-series circuit of two unidirectional blocking components, or by a bidirectional blocking component.

Furthermore, the load converter (3), as mentioned in the introduction, can be designed as a simple bidirectional step-up converter which has a switched two-point bridge branch (step-up converter bridge branch) (31), the upper switch (311) of which is connected to the positive DC output voltage rail (d) and lower switch (312) is connected to the negative DC output voltage rail (n), a buffer capacitor (output capacitor) (Co) being placed between these two DC output voltage rails to support the output voltage (uo) for the load across it.

The switching point (p) of the two-point bridge branch (31), i.e. the connection point of the upper switch (311) and lower switch (312), is routed to a first connection of a step-up converter inductance (L), whose second connection is connected on the input side to the positive voltage rail (p) of the input-side three-phase bridge circuit (2) is connected and thus acts as an intermediate circuit inductance. The negative output voltage terminal of the two-point bridge branch (31) is connected directly to the negative voltage rail (n).

The system is modulated as a function of the relative magnitudes of the line phase currents (in other words: as a function of the relationships between the absolute values of the line phase currents), with sections for a symmetrical three-phase line within 1/6 of the line period, i.e. within a 60° width Sector or section of a complete oscillation period of the mains voltage corresponding to 360°, the bridge arm associated with the largest phase current is switched through depending on the polarity of the largest phase current, with the upper switch (21) being switched on for a positive phase current and the lower switch (22) for a negative phase current ) remains switched on within an input current sector. This results in a six-pulse course for the intermediate circuit current (iL) over one mains period, with its instantaneous value corresponding to the phase current with the highest magnitude (cf. FIG. 2).

FIG. 2 shows, for example, in a first time segment, corresponding to a sector 1: the current with the greatest absolute value is ib, it flows in the second phase (b) and has a negative sign. Thus, for the duration of this section, the lower switch sb,L of the second (or selected) phase is on and carries the intermediate circuit current (iL). The upper switch sb,H of this selected phase and the two other lower switches sa,L, sc,L remain open. The other two top switches sa,H, sc,H can be switched to split the returning intermediate circuit current (iL) to the corresponding (unselected) two phases.

The largest phase current or the intermediate circuit current (iL) must flow back as a sum over the other two phases. So if the largest phase current flows through the lower switch (22), the upper switches (21) of the bridge branches belonging to the two other phases must be switched on alternately, with their lower switch (22) remaining switched off permanently. The duration of the switching period is divided between the two switch-on intervals in such a way that a sinusoidal phase current profile is achieved in all phases. If the phase with the greatest phase current is routed via one of the upper switches (21), the lower switches (22) of the other two phases must be switched on alternately, with their upper switch (22) then remaining permanently switched off (cf. Figure 2 ).

Advantageously, only two instead of three phase-to-phase input voltages are then applied to the output terminals of the three-phase bridge circuit, which reduces the number of switching operations and thus the switching losses and the switching-frequency current ripple in the intermediate circuit inductance (see FIGS. 3 and 4). These show a section, greatly enlarged over time, with the voltage conditions within a clock period Tp. During this period, the voltages can be regarded as being more or less constant. A clock frequency is typically at least ten times, twenty times or fifty times the basic frequency of the AC voltages, in particular the mains voltages.

[0045] If the magnitudes of the input currents change during the transition to the next sector or section, the modulation is also adapted accordingly. This means that the phase with the respectively largest phase current is assigned to a different physical phase in each sector (see FIG. 2).

The aim of the regulation of the system is in the mains phases sinusoidal currents (ia, ibund ic) lying in phase (for power consumption from the mains, or in phase opposition for power feedback) with the associated mains phase voltage (ua, ubund uc) with all currents having the same amplitude for a symmetrical network and optionally generating a defined load voltage (uo) at the output of the load converter (3) corresponding to a specified setpoint (load voltage setpoint) (uo*), or generally a defined power to the to deliver consumers (cf. Figure 5). Alternatively, the mains phase currents can also have a phase shift in relation to the associated mains phase voltages. For the further description, however, ohmic network behavior is assumed for the sake of clarity. Accordingly, viewed from the mains, the system can be seen as a star connection of equal ohmic resistances (equivalent input resistances) or conductance values (equivalent input conductance values), the power of which is passed on directly to the output, i.e. to the consumer, under the idealized assumption of freedom from losses.

Following this idea, the target value of the input equivalent conductance (input target conductance) (G*) is formed as a function of the load voltage control deviation, i.e. the difference between a specified load voltage target value (uo*) and the measured load voltage actual value (uo), by applying the load voltage control deviation to the input of an output voltage regulator (51) which forms the required nominal value of the recharging current (iCo*) of the output capacitor (Co) at the output. ) the target value of the power to be delivered to the output (output power target value) (Po*) results, which is ultimately to be obtained from the network, i.e. directly defining the input power target value, neglecting the losses of the system. Accordingly, in the next step, the nominal input conductance (G*) is determined by dividing by the sum of the squares of the input phase voltages (ua, u and uc), whereby it corresponds to a power consumption from the network equal to the nominal output power value (Po*).

By multiplying the input setpoint conductance (G*) by the measured phase voltages (ua, u and uc), the input phase current setpoints (ia*, ib* and ic*) result, from which in turn the intermediate circuit current setpoint (iL*) is determined by the absolute value is formed for all input phase current setpoints (ia*, ib* and ic*) and the largest value is used as the intermediate circuit current setpoint (iL*).

Furthermore, the duty ratios for the three-phase bridge circuit (da, db and dc) can now be calculated from the ratio of the respective input phase current setpoints (ia*, ib* and ic*) and the intermediate circuit current setpoint (iL*), from which the effective duty cycles ( da,H, da,L, db,H, db,L, dc,H and dc,L) and the local mean value of the switched DC voltage at the output of the three-phase bridge circuit (ubu) can be obtained. • Either the calculated duty cycle (da, dbor dc) is positive and the relative switch-on time for the upper switch (da,H, db,Hor dc,H) then corresponds exactly to the calculated duty cycle (da, dbor dc) with the lower switch always remains off, i.e. the on-time is zero for the lower switch (da,L, db,Lor dc,L), • or the duty cycle (da, dbor dc) is negative and the upper switch remains off, i.e. the on-time for the upper switch (da,H, db,Hordc,H) is zero, in which case the relative on-time for the lower switch (da,L, db,Lor dc,L) corresponds exactly to the magnitude of the calculated duty cycle (da, dbor dc).

The effective switching signals (sa,H1, sa,H2, sa,L1, sa,L2, sb,H1, sb,H2, sb,L1, sb,L2, sc,H1, Sc,H2, sc,L1 and sc,L2) are generated for the individual switches.

The local mean value of the switched DC voltage (ubu) is obtained either by multiplying the calculated duty cycles (da, dbund dc) by the corresponding phase voltages (ua, ubund uc) or alternatively (not shown) by dividing the output power setpoint (Po*) by the intermediate circuit current setpoint (iL*).

The control of the intermediate circuit current or inductance current (iL) is then carried out with a subordinate current control in that first the control deviation is determined by subtracting the measured intermediate circuit current (iL) from the intermediate circuit current setpoint (iL*) and this is then fed to an intermediate circuit current controller (52), which outputs at its output the desired value of the voltage (uL*) to be formed on average over a clock period at the associated intermediate circuit inductance (L). Subtracting this reference value (uL*) from the calculated local mean value of the switched DC voltage (ubu) results in the local mean value of the voltage reference value (ubo*) that is required at the midpoint of the boost converter bridge branch. If this midpoint voltage (ubo*) is divided by the target value of the output voltage (uo*), the relative duty cycle (dd) or, from a modulator (53), the effective switching signal (sd) for the upper switch (311) results directly from this. of the step-up converter bridge branch, the lower switch (312) of the bridge branch being switched off while the upper switch (311) is switched on, i.e. both switches of the bridge branch work in push-pull mode and the clock period preferably has a constant length or the clock frequency preferably has a constant value. Overall, the intermediate circuit current actual value (iL) is managed according to the associated intermediate circuit current setpoint curve (iL*).

It should be noted that the clocking of the three-phase bridge circuit and the step-up converter bridge branch can be carried out, for example, with the same clock frequency and can be timed in such a way that a minimum switching-frequency fluctuation of the intermediate circuit current (iL) is achieved.

It should be noted that in addition to the design of the load converter as a DC/DC step-up converter, there are several other forms of implementation: a full-bridge switching cell 6 with internal DC voltage for implementing active shaping of the intermediate circuit current (cf. FIG. 6). The intermediate circuit current is equal to the output current, which is impressed on the full-bridge switching cell 6 via appropriate clocking. Since the cell only compensates for power pulsations at six times the mains frequency, no DC-side feed is required. In addition, switching elements with a relatively low blocking voltage can advantageously be used for the full-bridge switching cell 6 compared to the three-phase bridge circuit. • A three-phase pulse converter, in particular a pulse-controlled inverter 7 (see FIG. 7), • or another voltage-stabilizing converter stage such as, for example, a galvanically isolated DC/DC converter.

The full-bridge switching cell 6 has two terminals. It can be formed by two bridge branches which are connected in parallel to one another and in parallel to a switching cell capacitance between a switching cell positive pole and a switching cell negative pole. The center taps of the bridge branches form the two connections.

The power switches of the full-bridge switching cell 6 can be designed to switch unidirectionally, each with anti-parallel freewheeling diodes.

It should be noted that ohmic network behavior is assumed to be desirable for the drawings and the above statements, but the control method according to the invention can also be used for a phase shift of the line phase currents compared to the assigned line phase voltages, in which case the phase current setpoints (which according to the above statements are formed for ohmic network behavior) corresponding reactive components are added.

Claims (9)

1. Method for controlling a three-phase pulse rectifier system (1, 2, 3), which has a three-phase bridge circuit (2) for exchanging power between a three-phase network (1) and an intermediate circuit inductor (L) and a load converter (3) for exchanging power between the intermediate circuit inductor (L) and a load, has wherein the bridge branches of the three-phase bridge circuit (2) are arranged for switching phase currents flowing through the intermediate circuit inductance (L), in chronologically consecutive sections, each of which lasts one-sixth of the period of the three-phase network, in each case in one section • in that bridge branch, hereinafter referred to as the selected bridge branch, of the three-phase bridge circuit (2) to which the mains phase with the largest phase current in terms of absolute value, hereinafter referred to as the selected mains phase, is assigned, this mains phase optionally, depending on the polarity of the phase current, with a switch of the selected bridge branch, referred to below as the selected switch, is connected to a positive connection point (p) or a negative connection point (n) of the three-phase bridge circuit (2), this network phase being connected to the positive connection point in the case of a positive phase current and to the negative connection point in the case of a negative phase current will, and remain connected during the duration of this section, • in the other two, non-selected bridge branches, the corresponding positive or negative connection point is alternately connected to the two non-selected phases by pulsing the switch opposite the selected switch. 2. The method according to claim 1, wherein a sinusoidal phase current is set in each case in a time segment by clocking in each of the other two, non-selected, bridge arms. 3. The method according to claim 1 or 2, wherein the load converter uses clocking to set a voltage (ubo) at a connection of the intermediate circuit inductance (L) on the load converter side which, in cooperation with a switched DC voltage (ubu) formed by the three-phase bridge circuit (2), am other connection of the intermediate circuit inductance (L) on the bridge circuit side results in a predetermined intermediate circuit current (iL). 4. The method according to claim 3, wherein the intermediate circuit current (iL) is specified by an intermediate circuit current setpoint (iL*), and this is determined according to the following steps: • an input reference value (G*) is formed as a function of a load voltage control deviation, which is equal to the difference between a specified load voltage reference value (uo*) and a measured load voltage actual value (uo), o by feeding the load voltage control deviation to the input of an output voltage regulator (51), which forms a target value for a recharging current (iCo*) of an output capacitor (Co) of the load converter (3) at the output, from which, after optional addition, a measured load current (iLoad) and after multiplication with an output reference voltage (uo*), a desired output power value (Po*) of a power to be supplied to the output of the load converter (3) results; o and by dividing the output power target value (Po*) by a sum of squares of input phase voltages (ua, u and uc), the input target conductance (G*) is determined, whereby this corresponds to a power consumption from the three-phase network (1) in the amount of the output power target value (Po*) is equivalent to; and • input phase current setpoints (ia*, ib* and ic*) can be determined by multiplying the input setpoint conductance (G*) with measured phase voltages (ua, u and uc), from which the intermediate circuit current setpoint (iL*) is determined by all input phase current setpoints (ia* , ib* and ic*) the absolute value is formed and the largest value is used as the intermediate circuit current setpoint (iL*). 5. The method according to claim 4, wherein duty ratios (da, db and dc) of the three-phase bridge circuit (2) are calculated from the ratios of the input phase current setpoints (ia*, ib* and ic*) and the intermediate circuit current setpoint (iL*), from which the effective duty cycles (da,H, da,L, db,H, db,L, dc,H and dc,L) can be determined by using each bridge branch of the three-phase bridge circuit (2) • if the calculated duty cycle (da, db, or dc) is positive, the duty cycle for an upper switch (da,H, db,H, or dc,H) of the bridge arm is equal to the calculated duty cycle (da, db, or dc), and the lower one switch of the bridge arm always remains switched off; • if the duty cycle (da, db, or dc) is negative, the top switch of the bridge arm remains off, and the relative on-time for the bottom switch (da,L, db,Lor dc,L) of the bridge arm equals the magnitude of the calculated duty cycle ( da, dbor dc) is. 6. Method according to one of claims 4 or 5, in which corresponding reactive components are added to the input phase current setpoints in order to achieve a phase shift of mains voltage and mains current. 7. The method according to any one of claims 1 to 6, in which the load converter (3) is operated as a step-up converter. 8. The method according to any one of claims 1 to 6, in which • the load converter (3) is operated as a pulse-controlled inverter; or • the load converter (3) is a full-bridge switching cell with internal switching cell capacitance arranged in a connecting line between the positive intermediate circuit voltage and positive output voltage terminal of the three-phase pulse rectifier system or between the negative intermediate circuit voltage and negative output voltage terminal of the three-phase pulse rectifier system, and is operated as a full-bridge switching cell with inner switching cell capacitance. 9. The method according to claim 7, which switches between a first mode and a second mode, wherein • in the first operating mode, the three-phase bridge circuit (2) is operated like the three-phase bridge circuit (2) described in one of claims 1 to 6 and the load converter (3) is operated as a step-up converter; and • in the second operating mode, the three-phase bridge circuit (2) is operated as a step-down converter and the load converter (3) switches its output to its input and is not clocked.