CH616787A5 - - Google Patents
Download PDFInfo
- Publication number
- CH616787A5 CH616787A5 CH365577A CH365577A CH616787A5 CH 616787 A5 CH616787 A5 CH 616787A5 CH 365577 A CH365577 A CH 365577A CH 365577 A CH365577 A CH 365577A CH 616787 A5 CH616787 A5 CH 616787A5
- Authority
- CH
- Switzerland
- Prior art keywords
- signal
- counter
- flip
- flop
- final
- Prior art date
Links
- 230000000903 blocking effect Effects 0.000 description 14
- 238000010586 diagram Methods 0.000 description 13
- 230000001105 regulatory effect Effects 0.000 description 6
- 230000007704 transition Effects 0.000 description 4
- 230000001419 dependent effect Effects 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
- H03K23/665—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by presetting
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/68—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/38—Starting, stopping or resetting the counter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Manipulation Of Pulses (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Pulse Circuits (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2616398A DE2616398C2 (de) | 1976-04-14 | 1976-04-14 | Schaltungsanordnung zur Regelung der Impulsfolgefrequenz eines Signals |
Publications (1)
Publication Number | Publication Date |
---|---|
CH616787A5 true CH616787A5 (fr) | 1980-04-15 |
Family
ID=5975365
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH365577A CH616787A5 (fr) | 1976-04-14 | 1977-03-23 |
Country Status (10)
Country | Link |
---|---|
US (1) | US4115687A (fr) |
JP (1) | JPS52127052A (fr) |
BE (1) | BE853599A (fr) |
CH (1) | CH616787A5 (fr) |
DE (1) | DE2616398C2 (fr) |
FR (1) | FR2348601A1 (fr) |
GB (1) | GB1560333A (fr) |
IT (1) | IT1076712B (fr) |
NL (1) | NL7704100A (fr) |
SE (1) | SE410076B (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2856012C2 (de) * | 1978-12-23 | 1983-10-06 | Kernforschungsanlage Juelich Gmbh, 5170 Juelich | Schaltungsanordnung zur Phasenverschiebung und deren Verwendung |
CH643106B (fr) * | 1980-11-26 | Suisse Horlogerie | Garde-temps comprenant une chaine de diviseurs au rapport de division ajustable. | |
US4647926A (en) * | 1984-07-27 | 1987-03-03 | Allied Corporation | Warning system for microwave landing system airborne receiver |
CA1290407C (fr) * | 1986-12-23 | 1991-10-08 | Shigeki Saito | Synthetiseur de frequence |
EP0316878B1 (fr) * | 1987-11-16 | 1993-07-21 | Sanyo Electric Co., Ltd. | Circuit PLL pour la génération d'un signal de sortie synchronisé à un signal d'entrée au moyen d'un diviseur commutable |
US4941160A (en) * | 1989-03-31 | 1990-07-10 | Digital Appliance Controls, Inc. | Frequency multiplier circuitry and method |
US5606276A (en) * | 1994-10-05 | 1997-02-25 | Altera Corporation | Method and apparatus for creating a large delay in a pulse in a layout efficient manner |
EP1004948A3 (fr) * | 1998-09-22 | 2006-02-15 | Siemens Aktiengesellschaft | Montre peu chère |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3413452A (en) * | 1966-01-14 | 1968-11-26 | North American Rockwell | Variable presetting of preset counters |
US3581066A (en) * | 1968-03-06 | 1971-05-25 | Lear Siegler Inc | Programmable counting circuit |
DE2013880C3 (de) * | 1970-03-23 | 1974-02-21 | Siemens Ag, 1000 Berlin U. 8000 Muenchen | Schaltungsanordnung zum Erzeugen von Taktimpulsen |
CH554015A (fr) * | 1971-10-15 | 1974-09-13 | ||
US3840724A (en) * | 1973-04-25 | 1974-10-08 | Inductosyn Corp | Scalar multiplier |
DE2352355A1 (de) * | 1973-10-18 | 1975-04-24 | Standard Elektrik Lorenz Ag | Schaltungsanordnung zur synchronisierung eines fernsehempfaengers |
US3937932A (en) * | 1974-04-15 | 1976-02-10 | Barber-Colman Company | Digital frequency generator |
US3983498A (en) * | 1975-11-13 | 1976-09-28 | Motorola, Inc. | Digital phase lock loop |
-
1976
- 1976-04-14 DE DE2616398A patent/DE2616398C2/de not_active Expired
-
1977
- 1977-03-23 CH CH365577A patent/CH616787A5/de not_active IP Right Cessation
- 1977-04-01 GB GB13796/77A patent/GB1560333A/en not_active Expired
- 1977-04-11 US US05/786,214 patent/US4115687A/en not_active Expired - Lifetime
- 1977-04-13 IT IT22391/77A patent/IT1076712B/it active
- 1977-04-13 SE SE7704241A patent/SE410076B/xx unknown
- 1977-04-13 FR FR7711102A patent/FR2348601A1/fr active Granted
- 1977-04-14 NL NL7704100A patent/NL7704100A/xx not_active Application Discontinuation
- 1977-04-14 JP JP4310277A patent/JPS52127052A/ja active Pending
- 1977-04-14 BE BE176718A patent/BE853599A/fr unknown
Also Published As
Publication number | Publication date |
---|---|
SE7704241L (sv) | 1977-10-15 |
GB1560333A (en) | 1980-02-06 |
FR2348601B1 (fr) | 1983-02-04 |
BE853599A (fr) | 1977-10-14 |
IT1076712B (it) | 1985-04-27 |
JPS52127052A (en) | 1977-10-25 |
FR2348601A1 (fr) | 1977-11-10 |
US4115687A (en) | 1978-09-19 |
NL7704100A (nl) | 1977-10-18 |
DE2616398B1 (de) | 1977-10-06 |
DE2616398C2 (de) | 1978-06-01 |
SE410076B (sv) | 1979-09-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE2541163A1 (de) | Phasen- und/oder frequenzkomparator | |
DE4342266A1 (de) | Taktgenerator sowie Phasenkomparator zur Verwendung in einem solchen Taktgenerator | |
DE2400394B2 (de) | Schaltungsanordnung zur digitalen Frequenzteilung | |
DE3022746A1 (de) | Digitale phasenkomparatorschaltung | |
CH616787A5 (fr) | ||
DE2905395A1 (de) | Digitaler frequenzumsetzer | |
DE2704756C2 (de) | Digital-Analog-Umsetzer | |
DE2755796C2 (de) | Schaltungsanordnung zur Erzeugung phasenverschobener Signale | |
DE2050476A1 (de) | Datenumsetzer | |
DE102007043340B4 (de) | Erhöhung der PWM-Auflösung durch Modulation | |
DE4216148C2 (de) | Verriegelungsschaltung für einen dualen Phasenregelkreis | |
EP1374035B1 (fr) | Procede et dispositif pour la generation d'impulsions d'horloge dans un systeme a bus comprenant au moins une station, systeme a bus et station | |
DE2149128C3 (de) | Verfahren zur Frequenzsynthese und Schaltungsanordnung zur Ausführung des Verfahrens | |
DE1292183B (de) | Schaltungsanordnung zur Phasenkorrektur von von einem Taktgeber abgegebenen Signalen durch impulsfoermige Steuersignale | |
EP0002811B2 (fr) | Dispositif de thérapie par courants interférenciels | |
DE3133838C2 (de) | Schaltungsanordnung zur Übergabe des Refresh-Signals an einem Halbleiterspeicher | |
DE2938043C2 (fr) | ||
DE3314973C1 (de) | Schaltungsanordnung zur Erzeugung einer stabilen festen Frequenz | |
DE19729476C2 (de) | Numerisch gesteuerter Oszillator | |
DE3719582C2 (de) | Schaltungsanordnung zur Erzeugung eines Phasenreferenzsignals | |
EP1012980B1 (fr) | Boucle numerique a phase asservie | |
DE2400285C2 (de) | Auswerteeinrichtung für frequenz- oder periodendaueranaloge Meßsignale | |
DE2342224C3 (de) | Schaltungsanordnung fur die Motorsteuerung zum Umsetzen der Impulsfrequenz, z.B. für einen Schrittmotor | |
DE2844938C2 (de) | Schaltungsanordnung zur Erzielung eines Gleichlaufs zwischen der Oszillatorfrequenz und der Resonanzfrequenz des Eingangskreises eines Überlagerungsempfängers | |
DE4136980A1 (de) | Vorrichtung zur veraenderung des tastverhaeltnisses oder der pulszahldichte einer signalfolge |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |