CH610160A5 - Logic element - Google Patents

Logic element

Info

Publication number
CH610160A5
CH610160A5 CH461076A CH461076A CH610160A5 CH 610160 A5 CH610160 A5 CH 610160A5 CH 461076 A CH461076 A CH 461076A CH 461076 A CH461076 A CH 461076A CH 610160 A5 CH610160 A5 CH 610160A5
Authority
CH
Switzerland
Prior art keywords
logic element
logic
Prior art date
Application number
CH461076A
Other languages
English (en)
Inventor
Ronald Rathbone
Peter Rydval
Ulrich Dr Schwabe
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH610160A5 publication Critical patent/CH610160A5/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/12Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using diode rectifiers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/221Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65Integrated injection logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Logic Circuits (AREA)
  • Bipolar Transistors (AREA)
CH461076A 1975-06-03 1976-04-12 Logic element CH610160A5 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2524579A DE2524579C3 (de) 1975-06-03 1975-06-03 Halbleiter-Logikglied

Publications (1)

Publication Number Publication Date
CH610160A5 true CH610160A5 (en) 1979-03-30

Family

ID=5948131

Family Applications (1)

Application Number Title Priority Date Filing Date
CH461076A CH610160A5 (en) 1975-06-03 1976-04-12 Logic element

Country Status (7)

Country Link
AT (1) AT336930B (enExample)
CA (1) CA1060587A (enExample)
CH (1) CH610160A5 (enExample)
DE (1) DE2524579C3 (enExample)
FR (1) FR2313820A1 (enExample)
GB (1) GB1551276A (enExample)
IT (1) IT1079512B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156246A (en) * 1977-05-25 1979-05-22 Bell Telephone Laboratories, Incorporated Combined ohmic and Schottky output transistors for logic circuit
US4347585A (en) * 1980-06-09 1982-08-31 International Business Machines Corporation Reproduce only storage matrix
US4415817A (en) * 1981-10-08 1983-11-15 Signetics Corporation Bipolar logic gate including circuitry to prevent turn-off and deep saturation of pull-down transistor
NL8300843A (nl) * 1983-03-09 1984-10-01 Philips Nv Geintegreerde logische schakeling.

Also Published As

Publication number Publication date
AT336930B (de) 1977-06-10
FR2313820A1 (fr) 1976-12-31
DE2524579B2 (de) 1980-03-27
FR2313820B1 (enExample) 1982-09-03
GB1551276A (en) 1979-08-30
DE2524579C3 (de) 1980-11-27
CA1060587A (en) 1979-08-14
ATA618375A (de) 1976-09-15
DE2524579A1 (de) 1976-12-23
IT1079512B (it) 1985-05-13

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Legal Events

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PL Patent ceased
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