CH539377A - Einrichtung zum Verbinden und Halten elektrischer Bauteile und Verfahren zur Herstellung dieser Einrichtung - Google Patents

Einrichtung zum Verbinden und Halten elektrischer Bauteile und Verfahren zur Herstellung dieser Einrichtung

Info

Publication number
CH539377A
CH539377A CH846671A CH846671A CH539377A CH 539377 A CH539377 A CH 539377A CH 846671 A CH846671 A CH 846671A CH 846671 A CH846671 A CH 846671A CH 539377 A CH539377 A CH 539377A
Authority
CH
Switzerland
Prior art keywords
making
electrical components
holding electrical
holding
components
Prior art date
Application number
CH846671A
Other languages
English (en)
Inventor
Lee Parks Howard
Original Assignee
Bunker Ramo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bunker Ramo filed Critical Bunker Ramo
Publication of CH539377A publication Critical patent/CH539377A/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01075—Rhenium [Re]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Combinations Of Printed Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CH846671A 1970-06-25 1971-06-10 Einrichtung zum Verbinden und Halten elektrischer Bauteile und Verfahren zur Herstellung dieser Einrichtung CH539377A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US4987370A 1970-06-25 1970-06-25

Publications (1)

Publication Number Publication Date
CH539377A true CH539377A (de) 1973-07-15

Family

ID=21962185

Family Applications (1)

Application Number Title Priority Date Filing Date
CH846671A CH539377A (de) 1970-06-25 1971-06-10 Einrichtung zum Verbinden und Halten elektrischer Bauteile und Verfahren zur Herstellung dieser Einrichtung

Country Status (9)

Country Link
US (1) US3705332A (de)
JP (1) JPS5529597B1 (de)
CA (1) CA945271A (de)
CH (1) CH539377A (de)
DE (1) DE2129132A1 (de)
GB (1) GB1337652A (de)
IT (1) IT986807B (de)
NL (1) NL7107988A (de)
ZA (1) ZA713954B (de)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3813773A (en) * 1972-09-05 1974-06-04 Bunker Ramo Method employing precision stamping for fabricating the wafers of a multiwafer electrical circuit structure
US3952231A (en) * 1974-09-06 1976-04-20 International Business Machines Corporation Functional package for complex electronic systems with polymer-metal laminates and thermal transposer
US4095867A (en) * 1974-10-10 1978-06-20 Bunker Ramo Corporation Component connection system
US4240198A (en) * 1979-02-21 1980-12-23 International Telephone And Telegraph Corporation Method of making conductive elastomer connector
US4288841A (en) * 1979-09-20 1981-09-08 Bell Telephone Laboratories, Incorporated Double cavity semiconductor chip carrier
US4283755A (en) * 1980-02-05 1981-08-11 The United States Of America As Represented By The Secretary Of The Air Force Modulator multilayer detector
JPS57197604U (de) * 1981-06-09 1982-12-15
DE3319339A1 (de) * 1982-05-31 1983-12-29 Sharp K.K., Osaka Treiberanordnung fuer eine x-y-elektrodenmatrix
US4597617A (en) * 1984-03-19 1986-07-01 Tektronix, Inc. Pressure interconnect package for integrated circuits
US4739448A (en) * 1984-06-25 1988-04-19 Magnavox Government And Industrial Electronics Company Microwave multiport multilayered integrated circuit chip carrier
US4704319A (en) * 1984-11-23 1987-11-03 Irvine Sensors Corporation Apparatus and method for fabricating modules comprising stacked circuit-carrying layers
US4613892A (en) * 1985-02-19 1986-09-23 Sundstrand Corporation Laminated semiconductor assembly
US4659931A (en) * 1985-05-08 1987-04-21 Grumman Aerospace Corporation High density multi-layered integrated circuit package
JPS61288455A (ja) * 1985-06-17 1986-12-18 Fujitsu Ltd 多層半導体装置の製造方法
US4705332A (en) * 1985-08-05 1987-11-10 Criton Technologies High density, controlled impedance connectors
US5227959A (en) * 1986-05-19 1993-07-13 Rogers Corporation Electrical circuit interconnection
JPH0286166U (de) * 1988-12-23 1990-07-09
DE69015878T2 (de) * 1989-04-17 1995-07-13 Ibm Mehrschichtleiterplattenstruktur.
US5089880A (en) * 1989-06-07 1992-02-18 Amdahl Corporation Pressurized interconnection system for semiconductor chips
US5245751A (en) * 1990-04-27 1993-09-21 Circuit Components, Incorporated Array connector
US5071359A (en) * 1990-04-27 1991-12-10 Rogers Corporation Array connector
US5357403A (en) * 1990-06-29 1994-10-18 General Electric Company Adaptive lithography in a high density interconnect structure whose signal layers have fixed patterns
US5714802A (en) * 1991-06-18 1998-02-03 Micron Technology, Inc. High-density electronic module
US5383269A (en) * 1991-09-03 1995-01-24 Microelectronics And Computer Technology Corporation Method of making three dimensional integrated circuit interconnect module
US5270571A (en) * 1991-10-30 1993-12-14 Amdahl Corporation Three-dimensional package for semiconductor devices
US5343366A (en) * 1992-06-24 1994-08-30 International Business Machines Corporation Packages for stacked integrated circuit chip cubes
DE4435121A1 (de) * 1994-09-30 1996-04-04 Siemens Ag An Datenbus betreibbare tragbare Datenträgeranordnung
US5637920A (en) * 1995-10-04 1997-06-10 Lsi Logic Corporation High contact density ball grid array package for flip-chips
US6661085B2 (en) * 2002-02-06 2003-12-09 Intel Corporation Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack
US6762076B2 (en) * 2002-02-20 2004-07-13 Intel Corporation Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
US20030213619A1 (en) * 2002-05-14 2003-11-20 Denzene Quentin S. Ground discontinuity improvement in RF device matching
US7030486B1 (en) * 2003-05-29 2006-04-18 Marshall Paul N High density integrated circuit package architecture
US7087538B2 (en) * 2004-08-16 2006-08-08 Intel Corporation Method to fill the gap between coupled wafers
US9084382B2 (en) * 2012-10-18 2015-07-14 Infineon Technologies Austria Ag Method of embedding an electronic component into an aperture of a substrate

Also Published As

Publication number Publication date
CA945271A (en) 1974-04-09
ZA713954B (en) 1972-02-23
US3705332A (en) 1972-12-05
IT986807B (it) 1975-01-30
GB1337652A (en) 1973-11-21
DE2129132A1 (de) 1972-01-05
JPS5529597B1 (de) 1980-08-05
NL7107988A (de) 1971-12-28

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