CH471524A - Verfahren zur Herstellung gedruckter Leiterplatten mit metallisierten Löchern - Google Patents

Verfahren zur Herstellung gedruckter Leiterplatten mit metallisierten Löchern

Info

Publication number
CH471524A
CH471524A CH68968A CH68968A CH471524A CH 471524 A CH471524 A CH 471524A CH 68968 A CH68968 A CH 68968A CH 68968 A CH68968 A CH 68968A CH 471524 A CH471524 A CH 471524A
Authority
CH
Switzerland
Prior art keywords
production
printed circuit
circuit boards
metallized holes
metallized
Prior art date
Application number
CH68968A
Other languages
German (de)
English (en)
Inventor
Lacruche Bernard
Jouwersma Cornelis
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR91976A external-priority patent/FR1515251A/fr
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH471524A publication Critical patent/CH471524A/de

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/54Electroplating of non-metallic surfaces
    • C25D5/56Electroplating of non-metallic surfaces of plastics
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1603Process or apparatus coating on selected surface areas
    • C23C18/1605Process or apparatus coating on selected surface areas by masking
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0191Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0264Peeling insulating layer, e.g. foil, or separating mask
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/0542Continuous temporary metal layer over metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0574Stacked resist layers used for different processes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0713Plating poison, e.g. for selective plating or for preventing plating on resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1173Differences in wettability, e.g. hydrophilic or hydrophobic areas
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377Protective layers
    • H05K2203/1383Temporary protective insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377Protective layers
    • H05K2203/1388Temporary protective conductive layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1415Applying catalyst after applying plating resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/062Etching masks consisting of metals or alloys or metallic inorganic compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Electrochemistry (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacture Or Reproduction Of Printing Formes (AREA)
  • Manufacturing Of Printed Wiring (AREA)
CH68968A 1967-01-20 1968-01-17 Verfahren zur Herstellung gedruckter Leiterplatten mit metallisierten Löchern CH471524A (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR91975A FR1534709A (fr) 1967-01-20 1967-01-20 Procédé de fabrication de circuits imprimés à trous métallisés
FR91976A FR1515251A (fr) 1967-01-20 1967-01-20 Méthode de fabrication de circuits imprimés à trous métallisés

Publications (1)

Publication Number Publication Date
CH471524A true CH471524A (de) 1969-04-15

Family

ID=26174562

Family Applications (2)

Application Number Title Priority Date Filing Date
CH68968A CH471524A (de) 1967-01-20 1968-01-17 Verfahren zur Herstellung gedruckter Leiterplatten mit metallisierten Löchern
CH68868A CH471523A (de) 1967-01-20 1968-01-17 Verfahren zur Herstellung gedruckter Leiterplatten mit metallisierten Löchern

Family Applications After (1)

Application Number Title Priority Date Filing Date
CH68868A CH471523A (de) 1967-01-20 1968-01-17 Verfahren zur Herstellung gedruckter Leiterplatten mit metallisierten Löchern

Country Status (8)

Country Link
AT (1) AT281169B (da)
BE (2) BE709580A (da)
CH (2) CH471524A (da)
DE (2) DE1665276A1 (da)
ES (2) ES349469A1 (da)
FR (1) FR1534709A (da)
GB (2) GB1209963A (da)
NL (2) NL6800576A (da)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0127955A2 (en) * 1983-06-01 1984-12-12 FERRANTI INTERNATIONAL plc Manufacture of printed circuit boards
DE102005032019A1 (de) * 2005-07-01 2007-01-04 Siemens Ag Verfahren zum Abscheiden eines Materials in ein Loch in einem elektrisch leitenden Werkstück

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4085285A (en) * 1973-11-29 1978-04-18 U.S. Philips Corporation Method of manufacturing printed circuit boards
JPS5932915B2 (ja) * 1981-07-25 1984-08-11 「弐」夫 甲斐 スル−ホ−ルを有する配線基板製造方法
GB2118369B (en) * 1982-04-06 1986-05-21 Kanto Kasei Company Limited Making printed circuit boards
US4619887A (en) * 1985-09-13 1986-10-28 Texas Instruments Incorporated Method of plating an interconnect metal onto a metal in VLSI devices
CN110201864B (zh) * 2019-06-20 2022-05-20 四川轻化工大学 一种含铜抗菌自清洁涂层、制备方法及其应用

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0127955A2 (en) * 1983-06-01 1984-12-12 FERRANTI INTERNATIONAL plc Manufacture of printed circuit boards
EP0127955A3 (en) * 1983-06-01 1985-11-21 Ferranti Plc Manufacture of printed circuit boards
DE102005032019A1 (de) * 2005-07-01 2007-01-04 Siemens Ag Verfahren zum Abscheiden eines Materials in ein Loch in einem elektrisch leitenden Werkstück

Also Published As

Publication number Publication date
ES349469A1 (es) 1969-04-01
NL6800576A (da) 1968-07-22
DE1665276A1 (de) 1971-01-28
ES349471A1 (es) 1969-05-01
BE709579A (da) 1968-07-18
GB1207444A (en) 1970-09-30
BE709580A (da) 1968-07-18
FR1534709A (fr) 1968-08-02
CH471523A (de) 1969-05-30
NL6800575A (da) 1968-07-22
AT281169B (de) 1970-05-11
DE1665277A1 (de) 1971-03-11
GB1209963A (en) 1970-10-28

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Legal Events

Date Code Title Description
PL Patent ceased