CH446440A - Schaltung mit mindestens einem Flip-Flop zur vorübergehenden Speicherung von Datensignalen - Google Patents

Schaltung mit mindestens einem Flip-Flop zur vorübergehenden Speicherung von Datensignalen

Info

Publication number
CH446440A
CH446440A CH877865A CH877865A CH446440A CH 446440 A CH446440 A CH 446440A CH 877865 A CH877865 A CH 877865A CH 877865 A CH877865 A CH 877865A CH 446440 A CH446440 A CH 446440A
Authority
CH
Switzerland
Prior art keywords
flop
flip
circuit
temporary storage
data signals
Prior art date
Application number
CH877865A
Other languages
English (en)
Inventor
Stopper Herbert
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of CH446440A publication Critical patent/CH446440A/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4026Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
    • H01L27/1022Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/10SRAM devices comprising bipolar components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Static Random-Access Memory (AREA)
CH877865A 1964-06-29 1965-06-23 Schaltung mit mindestens einem Flip-Flop zur vorübergehenden Speicherung von Datensignalen CH446440A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US37872664A 1964-06-29 1964-06-29

Publications (1)

Publication Number Publication Date
CH446440A true CH446440A (de) 1967-11-15

Family

ID=23494312

Family Applications (1)

Application Number Title Priority Date Filing Date
CH877865A CH446440A (de) 1964-06-29 1965-06-23 Schaltung mit mindestens einem Flip-Flop zur vorübergehenden Speicherung von Datensignalen

Country Status (6)

Country Link
US (1) US3421026A (de)
CH (1) CH446440A (de)
DE (1) DE1265784B (de)
FR (1) FR1455187A (de)
GB (1) GB1063003A (de)
SE (1) SE312578B (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539839A (en) * 1966-01-31 1970-11-10 Nippon Electric Co Semiconductor memory device
US3508209A (en) * 1966-03-31 1970-04-21 Ibm Monolithic integrated memory array structure including fabrication and package therefor
US3540010A (en) * 1968-08-27 1970-11-10 Bell Telephone Labor Inc Diode-coupled semiconductive memory
DE1912176C2 (de) * 1969-03-11 1983-10-27 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Speicherzelle
GB1232946A (de) * 1970-02-06 1971-05-26
US3885169A (en) * 1971-03-04 1975-05-20 Bell Telephone Labor Inc Storage-processor element including a bistable circuit and a steering circuit
US3720821A (en) * 1971-03-04 1973-03-13 Bell Telephone Labor Inc Threshold logic circuits
US4302823A (en) * 1979-12-27 1981-11-24 International Business Machines Corp. Differential charge sensing system
US5173619A (en) * 1988-05-26 1992-12-22 International Business Machines Corporation Bidirectional buffer with latch and parity capability
US5107507A (en) * 1988-05-26 1992-04-21 International Business Machines Bidirectional buffer with latch and parity capability
US4991138A (en) * 1989-04-03 1991-02-05 International Business Machines Corporation High speed memory cell with multiple port capability
US5629569A (en) * 1995-05-15 1997-05-13 Intermatic, Inc. Thermal photocontrol switch circuit
CN103632712A (zh) 2012-08-27 2014-03-12 辉达公司 存储单元和存储器
US9685207B2 (en) 2012-12-04 2017-06-20 Nvidia Corporation Sequential access memory with master-slave latch pairs and method of operating
US9281817B2 (en) 2012-12-31 2016-03-08 Nvidia Corporation Power conservation using gray-coded address sequencing
US20140244921A1 (en) * 2013-02-26 2014-08-28 Nvidia Corporation Asymmetric multithreaded fifo memory
US10141930B2 (en) 2013-06-04 2018-11-27 Nvidia Corporation Three state latch

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1050376B (de) * 1959-02-12 Siemens Schuckertwerke Aktiengesellschaft Berlin und Erlangen Einrichtungen an bistabilen HaIbleiterkippschaltungen als Gedächtniselemente in Steuer und Regelanlagen zur Vermeidung von Fch'kommandos nach Netzspannungsausfallen
US2888580A (en) * 1955-05-02 1959-05-26 North American Aviation Inc Transistor multivibrator
NL202652A (de) * 1955-12-07
US3173028A (en) * 1962-02-13 1965-03-09 Westinghouse Electric Corp Solid state bistable multivibrator

Also Published As

Publication number Publication date
SE312578B (de) 1969-07-21
GB1063003A (en) 1967-03-22
FR1455187A (fr) 1966-04-01
DE1265784B (de) 1968-04-11
US3421026A (en) 1969-01-07

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