CH434487A - Verfahren zur Herstellung von Feldeffekt-Transistoren mit isolierter Steuerelektrode - Google Patents

Verfahren zur Herstellung von Feldeffekt-Transistoren mit isolierter Steuerelektrode

Info

Publication number
CH434487A
CH434487A CH1195065A CH1195065A CH434487A CH 434487 A CH434487 A CH 434487A CH 1195065 A CH1195065 A CH 1195065A CH 1195065 A CH1195065 A CH 1195065A CH 434487 A CH434487 A CH 434487A
Authority
CH
Switzerland
Prior art keywords
production
field effect
control electrode
effect transistors
insulated control
Prior art date
Application number
CH1195065A
Other languages
English (en)
Inventor
Ernest Brennemann Andrew
Philip Seraphim Donald
Tansel Sabih
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH434487A publication Critical patent/CH434487A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/126Power FETs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/91Controlling charging state at semiconductor-insulator interface
CH1195065A 1964-08-26 1965-08-25 Verfahren zur Herstellung von Feldeffekt-Transistoren mit isolierter Steuerelektrode CH434487A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US392144A US3386163A (en) 1964-08-26 1964-08-26 Method for fabricating insulated-gate field effect transistor

Publications (1)

Publication Number Publication Date
CH434487A true CH434487A (de) 1967-04-30

Family

ID=23549423

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1195065A CH434487A (de) 1964-08-26 1965-08-25 Verfahren zur Herstellung von Feldeffekt-Transistoren mit isolierter Steuerelektrode

Country Status (4)

Country Link
US (1) US3386163A (de)
CH (1) CH434487A (de)
DE (1) DE1514038C3 (de)
GB (1) GB1095412A (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3465209A (en) * 1966-07-07 1969-09-02 Rca Corp Semiconductor devices and methods of manufacture thereof
CH454279A (de) * 1966-12-02 1968-04-15 Bbc Brown Boveri & Cie Halbleiterventil
USRE28402E (en) * 1967-01-13 1975-04-29 Method for controlling semiconductor surface potential
US3767463A (en) * 1967-01-13 1973-10-23 Ibm Method for controlling semiconductor surface potential
US3502950A (en) * 1967-06-20 1970-03-24 Bell Telephone Labor Inc Gate structure for insulated gate field effect transistor
US3470610A (en) * 1967-08-18 1969-10-07 Conductron Corp Method of producing a control system
US3967310A (en) * 1968-10-09 1976-06-29 Hitachi, Ltd. Semiconductor device having controlled surface charges by passivation films formed thereon
US3663870A (en) * 1968-11-13 1972-05-16 Tokyo Shibaura Electric Co Semiconductor device passivated with rare earth oxide layer
US3590477A (en) * 1968-12-19 1971-07-06 Ibm Method for fabricating insulated-gate field effect transistors having controlled operating characeristics
JPS5126035B1 (de) * 1970-06-11 1976-08-04
JPS5126036B1 (de) * 1970-06-19 1976-08-04
US3706918A (en) * 1970-10-05 1972-12-19 Frank J Barone Silicon-silicon dioxide interface of predetermined space charge polarity
US3856587A (en) * 1971-03-26 1974-12-24 Co Yamazaki Kogyo Kk Method of fabricating semiconductor memory device gate
US4003071A (en) * 1971-09-18 1977-01-11 Fujitsu Ltd. Method of manufacturing an insulated gate field effect transistor
US3882530A (en) * 1971-12-09 1975-05-06 Us Government Radiation hardening of mos devices by boron
US3787251A (en) * 1972-04-24 1974-01-22 Signetics Corp Mos semiconductor structure with increased field threshold and method for making the same
US3849204A (en) * 1973-06-29 1974-11-19 Ibm Process for the elimination of interface states in mios structures
DE2452289A1 (de) * 1974-11-04 1976-05-06 Siemens Ag Halbleiterbauelement
US4161814A (en) * 1975-12-08 1979-07-24 Cornell Research Foundation, Inc. Tunnel injection of minority carriers in semi-conductors
US4116721A (en) * 1977-11-25 1978-09-26 International Business Machines Corporation Gate charge neutralization for insulated gate field-effect transistors
JP5460375B2 (ja) * 2010-02-22 2014-04-02 株式会社東芝 磁気抵抗効果素子の製造方法
US9761620B1 (en) * 2016-09-19 2017-09-12 Peter C. Salmon, Llc Method and system for manufacturing using a programmable patterning structure

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE500536A (de) * 1950-01-31
US2787564A (en) * 1954-10-28 1957-04-02 Bell Telephone Labor Inc Forming semiconductive devices by ionic bombardment
US2981646A (en) * 1958-02-11 1961-04-25 Sprague Electric Co Process of forming barrier layers
US3040218A (en) * 1959-03-10 1962-06-19 Hoffman Electronics Corp Constant current devices
NL267831A (de) * 1960-08-17
US3183128A (en) * 1962-06-11 1965-05-11 Fairchild Camera Instr Co Method of making field-effect transistors
NL293292A (de) * 1962-06-11
BE636316A (de) * 1962-08-23 1900-01-01
US3177100A (en) * 1963-09-09 1965-04-06 Rca Corp Depositing epitaxial layer of silicon from a vapor mixture of sih4 and h3

Also Published As

Publication number Publication date
DE1514038A1 (de) 1969-06-26
GB1095412A (de)
DE1514038C3 (de) 1974-03-14
US3386163A (en) 1968-06-04
DE1514038B2 (de) 1972-09-07

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