CH387807A - Verfahren zum Herstellen einer Halbleiteranordnung - Google Patents

Verfahren zum Herstellen einer Halbleiteranordnung

Info

Publication number
CH387807A
CH387807A CH1190460A CH1190460A CH387807A CH 387807 A CH387807 A CH 387807A CH 1190460 A CH1190460 A CH 1190460A CH 1190460 A CH1190460 A CH 1190460A CH 387807 A CH387807 A CH 387807A
Authority
CH
Switzerland
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
CH1190460A
Other languages
English (en)
Inventor
Lob Udo
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH387807A publication Critical patent/CH387807A/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
    • B23K35/005—Interlayers, transition pieces for metallurgical bonding of workpieces at least one of the workpieces being of a refractory metal
    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
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    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
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    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0495—5th Group
    • H01L2924/04953—TaN

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Laminated Bodies (AREA)
CH1190460A 1959-12-18 1960-10-25 Verfahren zum Herstellen einer Halbleiteranordnung CH387807A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1959S0066325 DE1110323C2 (de) 1959-12-18 1959-12-18 Verfahren zur Herstellung von Halbleiteranordnungen

Publications (1)

Publication Number Publication Date
CH387807A true CH387807A (de) 1965-02-15

Family

ID=7498732

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1190460A CH387807A (de) 1959-12-18 1960-10-25 Verfahren zum Herstellen einer Halbleiteranordnung

Country Status (4)

Country Link
CH (1) CH387807A (de)
DE (1) DE1110323C2 (de)
FR (1) FR1279527A (de)
GB (1) GB903206A (de)

Also Published As

Publication number Publication date
GB903206A (en) 1962-08-15
DE1110323B (de) 1961-07-06
FR1279527A (fr) 1961-12-22
DE1110323C2 (de) 1962-01-25

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