CA936597A - Monolithic integrated semiconductor array having reduced power consumption - Google Patents

Monolithic integrated semiconductor array having reduced power consumption

Info

Publication number
CA936597A
CA936597A CA069790A CA69790A CA936597A CA 936597 A CA936597 A CA 936597A CA 069790 A CA069790 A CA 069790A CA 69790 A CA69790 A CA 69790A CA 936597 A CA936597 A CA 936597A
Authority
CA
Canada
Prior art keywords
power consumption
reduced power
integrated semiconductor
monolithic integrated
semiconductor array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA069790A
Other languages
English (en)
Inventor
D. Pricer Wilbur
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA936597A publication Critical patent/CA936597A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415Address circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B99/00Subject matter not provided for in other groups of this subclass
    • H10B99/10Memory cells having a cross-point geometry

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)
CA069790A 1969-01-15 1969-12-15 Monolithic integrated semiconductor array having reduced power consumption Expired CA936597A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US79147769A 1969-01-15 1969-01-15

Publications (1)

Publication Number Publication Date
CA936597A true CA936597A (en) 1973-11-06

Family

ID=25153857

Family Applications (1)

Application Number Title Priority Date Filing Date
CA069790A Expired CA936597A (en) 1969-01-15 1969-12-15 Monolithic integrated semiconductor array having reduced power consumption

Country Status (7)

Country Link
US (1) US3621302A (de)
CA (1) CA936597A (de)
CH (1) CH501980A (de)
DE (1) DE2001530C3 (de)
FR (1) FR2028333A1 (de)
GB (1) GB1234709A (de)
NL (1) NL7000547A (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3732440A (en) * 1971-12-23 1973-05-08 Ibm Address decoder latch
NL163338C (nl) * 1972-03-25 1980-08-15 Philips Nv Elektronische schakeling.
US3870901A (en) * 1973-12-10 1975-03-11 Gen Instrument Corp Method and apparatus for maintaining the charge on a storage node of a mos circuit
US4151488A (en) * 1978-02-22 1979-04-24 Raytheon Company Pulsed power supply
FR2443118A1 (fr) * 1978-11-30 1980-06-27 Ibm France Dispositif pour l'alimentation des memoires monolithiques
FR2445642A1 (fr) * 1978-12-29 1980-07-25 Radiotechnique Compelec Agencement de securite en cas de chute d'une tension d'alimentation continue
JPS56143587A (en) * 1980-03-26 1981-11-09 Fujitsu Ltd Static type memory circuit
JPH0693484B2 (ja) * 1989-11-10 1994-11-16 株式会社東芝 半導体集積回路
JP2723338B2 (ja) * 1990-04-21 1998-03-09 株式会社東芝 半導体メモリ装置
US5321658A (en) * 1990-05-31 1994-06-14 Oki Electric Industry Co., Ltd. Semiconductor memory device being coupled by auxiliary power lines to a main power line
US5701143A (en) * 1995-01-31 1997-12-23 Cirrus Logic, Inc. Circuits, systems and methods for improving row select speed in a row select memory device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3226574A (en) * 1963-09-20 1965-12-28 Martin Marietta Corp Power saving storage circuit employing controllable power source
DE1524873B2 (de) * 1967-10-05 1970-12-23 Ibm Deutschland Monolithische integrierte Speicherzelle mit kleiner Ruheleistung

Also Published As

Publication number Publication date
NL7000547A (de) 1970-07-17
DE2001530B2 (de) 1973-07-26
FR2028333A1 (de) 1970-10-09
CH501980A (de) 1971-01-15
US3621302A (en) 1971-11-16
GB1234709A (en) 1971-06-09
DE2001530C3 (de) 1974-03-07
DE2001530A1 (de) 1970-07-30

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