CA2798868A1 - Method and apparatus for concurrently reading a plurality of memory devices using a single buffer - Google Patents

Method and apparatus for concurrently reading a plurality of memory devices using a single buffer Download PDF

Info

Publication number
CA2798868A1
CA2798868A1 CA2798868A CA2798868A CA2798868A1 CA 2798868 A1 CA2798868 A1 CA 2798868A1 CA 2798868 A CA2798868 A CA 2798868A CA 2798868 A CA2798868 A CA 2798868A CA 2798868 A1 CA2798868 A1 CA 2798868A1
Authority
CA
Canada
Prior art keywords
data
page buffer
read
page
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA2798868A
Other languages
English (en)
French (fr)
Inventor
Roland Schuetz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Novachips Canada Inc
Original Assignee
Mosaid Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mosaid Technologies Inc filed Critical Mosaid Technologies Inc
Publication of CA2798868A1 publication Critical patent/CA2798868A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4093Input/output [I/O] data interface arrangements, e.g. data buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
  • Information Transfer Systems (AREA)
CA2798868A 2010-05-07 2011-05-06 Method and apparatus for concurrently reading a plurality of memory devices using a single buffer Abandoned CA2798868A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US33223210P 2010-05-07 2010-05-07
US61/332,232 2010-05-07
PCT/CA2011/050281 WO2011137541A1 (en) 2010-05-07 2011-05-06 Method and apparatus for concurrently reading a plurality of memory devices using a single buffer

Publications (1)

Publication Number Publication Date
CA2798868A1 true CA2798868A1 (en) 2011-11-10

Family

ID=44902731

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2798868A Abandoned CA2798868A1 (en) 2010-05-07 2011-05-06 Method and apparatus for concurrently reading a plurality of memory devices using a single buffer

Country Status (8)

Country Link
US (1) US20110276775A1 (enExample)
EP (1) EP2567379A4 (enExample)
JP (1) JP5665974B2 (enExample)
KR (1) KR20130071436A (enExample)
CN (1) CN102971795A (enExample)
CA (1) CA2798868A1 (enExample)
TW (1) TW201209820A (enExample)
WO (1) WO2011137541A1 (enExample)

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WO2021159494A1 (zh) * 2020-02-14 2021-08-19 华为技术有限公司 固态存储硬盘和固态存储硬盘的控制方法
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Also Published As

Publication number Publication date
TW201209820A (en) 2012-03-01
US20110276775A1 (en) 2011-11-10
JP2013525924A (ja) 2013-06-20
EP2567379A1 (en) 2013-03-13
WO2011137541A1 (en) 2011-11-10
KR20130071436A (ko) 2013-06-28
EP2567379A4 (en) 2014-01-22
JP5665974B2 (ja) 2015-02-04
CN102971795A (zh) 2013-03-13

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Effective date: 20160425

FZDE Discontinued

Effective date: 20170510