CA2798868A1 - Method and apparatus for concurrently reading a plurality of memory devices using a single buffer - Google Patents
Method and apparatus for concurrently reading a plurality of memory devices using a single buffer Download PDFInfo
- Publication number
- CA2798868A1 CA2798868A1 CA2798868A CA2798868A CA2798868A1 CA 2798868 A1 CA2798868 A1 CA 2798868A1 CA 2798868 A CA2798868 A CA 2798868A CA 2798868 A CA2798868 A CA 2798868A CA 2798868 A1 CA2798868 A1 CA 2798868A1
- Authority
- CA
- Canada
- Prior art keywords
- data
- page buffer
- read
- page
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1673—Details of memory controller using buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Memory System (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US33223210P | 2010-05-07 | 2010-05-07 | |
| US61/332,232 | 2010-05-07 | ||
| PCT/CA2011/050281 WO2011137541A1 (en) | 2010-05-07 | 2011-05-06 | Method and apparatus for concurrently reading a plurality of memory devices using a single buffer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2798868A1 true CA2798868A1 (en) | 2011-11-10 |
Family
ID=44902731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA2798868A Abandoned CA2798868A1 (en) | 2010-05-07 | 2011-05-06 | Method and apparatus for concurrently reading a plurality of memory devices using a single buffer |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20110276775A1 (enExample) |
| EP (1) | EP2567379A4 (enExample) |
| JP (1) | JP5665974B2 (enExample) |
| KR (1) | KR20130071436A (enExample) |
| CN (1) | CN102971795A (enExample) |
| CA (1) | CA2798868A1 (enExample) |
| TW (1) | TW201209820A (enExample) |
| WO (1) | WO2011137541A1 (enExample) |
Families Citing this family (25)
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| US8565092B2 (en) | 2010-11-18 | 2013-10-22 | Cisco Technology, Inc. | Dynamic flow redistribution for head of line blocking avoidance |
| US20120307641A1 (en) * | 2011-05-31 | 2012-12-06 | Cisco Technology, Inc. | Dynamic Flow Segregation for Optimal Load Balancing Among Ports in an Etherchannel Group |
| US8462561B2 (en) * | 2011-08-03 | 2013-06-11 | Hamilton Sundstrand Corporation | System and method for interfacing burst mode devices and page mode devices |
| EP2856467A1 (en) * | 2012-05-29 | 2015-04-08 | MOSAID Technologies Incorporated | Ring topology status indication |
| US9336112B2 (en) * | 2012-06-19 | 2016-05-10 | Apple Inc. | Parallel status polling of multiple memory devices |
| US9471484B2 (en) | 2012-09-19 | 2016-10-18 | Novachips Canada Inc. | Flash memory controller having dual mode pin-out |
| US20140293705A1 (en) * | 2013-03-26 | 2014-10-02 | Conversant Intellecual Property Management Inc. | Asynchronous bridge chip |
| KR102074329B1 (ko) * | 2013-09-06 | 2020-02-06 | 삼성전자주식회사 | 데이터 저장 장치 및 그것의 데이터 처리 방법 |
| US9400745B2 (en) | 2013-11-06 | 2016-07-26 | International Business Machines Corporation | Physical address management in solid state memory |
| KR102391514B1 (ko) * | 2015-11-04 | 2022-04-27 | 삼성전자주식회사 | 메모리 장치 및 메모리 장치의 동작 방법 |
| US10254967B2 (en) * | 2016-01-13 | 2019-04-09 | Sandisk Technologies Llc | Data path control for non-volatile memory |
| KR20170086345A (ko) * | 2016-01-18 | 2017-07-26 | 에스케이하이닉스 주식회사 | 메모리 칩 및 메모리 컨트롤러를 포함하는 메모리 시스템 |
| US9830086B2 (en) * | 2016-03-03 | 2017-11-28 | Samsung Electronics Co., Ltd. | Hybrid memory controller for arbitrating access to volatile and non-volatile memories in a hybrid memory group |
| US10592114B2 (en) | 2016-03-03 | 2020-03-17 | Samsung Electronics Co., Ltd. | Coordinated in-module RAS features for synchronous DDR compatible memory |
| KR101867219B1 (ko) * | 2017-02-22 | 2018-06-12 | 연세대학교 산학협력단 | 동적 메모리 인터페이스에 기반하여 서로 다른 메모리 연산들을 처리하기 위한 장치 및 방법 |
| US9853805B1 (en) * | 2017-02-24 | 2017-12-26 | Dewesoft D.O.O. | Buffered equidistant data acquisition for control applications |
| US10140222B1 (en) | 2017-07-06 | 2018-11-27 | Micron Technology, Inc. | Interface components |
| US10802750B2 (en) * | 2019-02-28 | 2020-10-13 | Silicon Motion Inc. | Universal flash storage memory module, controller and electronic device with advanced turbo write buffer and method for operating the memory module |
| US11232047B2 (en) | 2019-05-28 | 2022-01-25 | Rambus Inc. | Dedicated cache-related block transfer in a memory system |
| WO2021159494A1 (zh) * | 2020-02-14 | 2021-08-19 | 华为技术有限公司 | 固态存储硬盘和固态存储硬盘的控制方法 |
| TWI743736B (zh) * | 2020-04-08 | 2021-10-21 | 瑞昱半導體股份有限公司 | 資料傳輸系統、電路與方法 |
| JP2022049553A (ja) * | 2020-09-16 | 2022-03-29 | キオクシア株式会社 | 半導体装置および方法 |
| US12050773B2 (en) * | 2021-08-12 | 2024-07-30 | Micron Technology, Inc. | Completion flag for memory operations |
| JP2023140124A (ja) | 2022-03-22 | 2023-10-04 | キオクシア株式会社 | 半導体装置、コントローラ、及びホスト装置 |
| US12481434B2 (en) * | 2023-09-07 | 2025-11-25 | SK hynix NAND Product Solutions Corporation | Systems, methods, and media for reducing power consumption of multi-plane non-volatile memory solid-state drives |
Family Cites Families (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10009A (en) * | 1853-09-13 | Cutting boots and shoes | ||
| US3742456A (en) * | 1972-04-05 | 1973-06-26 | Pitney Bowes Inc | Apparatus for selectively formatting serial data bits into separate data characters |
| US3748650A (en) * | 1972-08-21 | 1973-07-24 | Ibm | Input/output hardware trace monitor |
| US4124889A (en) * | 1975-12-24 | 1978-11-07 | Computer Automation, Inc. | Distributed input/output controller system |
| US4133030A (en) * | 1977-01-19 | 1979-01-02 | Honeywell Information Systems Inc. | Control system providing for the transfer of data in a communications processing system employing channel dedicated control blocks |
| US4275440A (en) * | 1978-10-02 | 1981-06-23 | International Business Machines Corporation | I/O Interrupt sequencing for real time and burst mode devices |
| US4456983A (en) * | 1979-10-12 | 1984-06-26 | Dresser Industries, Inc. | System and method for visual display of well logging data |
| US4442504A (en) * | 1981-03-09 | 1984-04-10 | Allen-Bradley Company | Modular programmable controller |
| JPH07334372A (ja) * | 1993-12-24 | 1995-12-22 | Seiko Epson Corp | エミュレートシステム及びエミュレート方法 |
| JP2731768B2 (ja) * | 1995-10-20 | 1998-03-25 | 甲府日本電気株式会社 | メモリ制御装置 |
| US5751638A (en) * | 1997-01-17 | 1998-05-12 | Integrated Device Technology, Inc. | Mail-box design for non-blocking communication across ports of a multi-port device |
| WO2001069411A2 (en) * | 2000-03-10 | 2001-09-20 | Arc International Plc | Memory interface and method of interfacing between functional entities |
| US7302503B2 (en) * | 2002-04-01 | 2007-11-27 | Broadcom Corporation | Memory access engine having multi-level command structure |
| WO2006024193A1 (fr) * | 2004-08-30 | 2006-03-09 | Magima Digital Information Co., Ltd. | Procede et systeme pour transfert de donnees |
| CN101069434B (zh) * | 2004-12-01 | 2011-01-26 | 皇家飞利浦电子股份有限公司 | 用于转换及同步数据通信量的数据处理系统和方法 |
| US7243173B2 (en) * | 2004-12-14 | 2007-07-10 | Rockwell Automation Technologies, Inc. | Low protocol, high speed serial transfer for intra-board or inter-board data communication |
| US20070005834A1 (en) * | 2005-06-30 | 2007-01-04 | Intel Corporation | Memory chips with buffer circuitry |
| JP2007026021A (ja) * | 2005-07-15 | 2007-02-01 | Nec Electronics Corp | バス制御システム及びバス制御方法 |
| US20070076502A1 (en) | 2005-09-30 | 2007-04-05 | Pyeon Hong B | Daisy chain cascading devices |
| KR101293365B1 (ko) * | 2005-09-30 | 2013-08-05 | 모사이드 테크놀로지스 인코퍼레이티드 | 출력 제어 메모리 |
| US7652922B2 (en) * | 2005-09-30 | 2010-01-26 | Mosaid Technologies Incorporated | Multiple independent serial link memory |
| US20070130374A1 (en) * | 2005-11-15 | 2007-06-07 | Intel Corporation | Multiported memory with configurable ports |
| US7562163B2 (en) * | 2006-08-18 | 2009-07-14 | International Business Machines Corporation | Apparatus and method to locate a storage device disposed in a data storage system |
| EP2487794A3 (en) * | 2006-08-22 | 2013-02-13 | Mosaid Technologies Incorporated | Modular command structure for memory and memory system |
| JP4674865B2 (ja) * | 2006-10-30 | 2011-04-20 | 株式会社日立製作所 | 半導体集積回路 |
| US7802061B2 (en) * | 2006-12-21 | 2010-09-21 | Intel Corporation | Command-based control of NAND flash memory |
| US7768297B2 (en) * | 2007-01-31 | 2010-08-03 | Rambus, Inc. | Multi-drop bus system |
| US8086785B2 (en) * | 2007-02-22 | 2011-12-27 | Mosaid Technologies Incorporated | System and method of page buffer operation for memory devices |
| US7688652B2 (en) * | 2007-07-18 | 2010-03-30 | Mosaid Technologies Incorporated | Storage of data in memory via packet strobing |
| US8291248B2 (en) * | 2007-12-21 | 2012-10-16 | Mosaid Technologies Incorporated | Non-volatile semiconductor memory device with power saving feature |
| WO2010027983A1 (en) * | 2008-09-03 | 2010-03-11 | Marvell World Trade Ltd. | Progamming data into a multi-plane flash memory |
| US7957173B2 (en) * | 2008-10-14 | 2011-06-07 | Mosaid Technologies Incorporated | Composite memory having a bridging device for connecting discrete memory devices to a system |
| US20100115172A1 (en) * | 2008-11-04 | 2010-05-06 | Mosaid Technologies Incorporated | Bridge device having a virtual page buffer |
| US8037235B2 (en) * | 2008-12-18 | 2011-10-11 | Mosaid Technologies Incorporated | Device and method for transferring data to a non-volatile memory device |
| US20110258366A1 (en) * | 2010-04-19 | 2011-10-20 | Mosaid Technologies Incorporated | Status indication in a system having a plurality of memory devices |
-
2011
- 2011-05-06 KR KR1020127031992A patent/KR20130071436A/ko not_active Withdrawn
- 2011-05-06 EP EP11777075.0A patent/EP2567379A4/en not_active Withdrawn
- 2011-05-06 WO PCT/CA2011/050281 patent/WO2011137541A1/en not_active Ceased
- 2011-05-06 US US13/102,310 patent/US20110276775A1/en not_active Abandoned
- 2011-05-06 CN CN2011800335300A patent/CN102971795A/zh active Pending
- 2011-05-06 CA CA2798868A patent/CA2798868A1/en not_active Abandoned
- 2011-05-06 JP JP2013508340A patent/JP5665974B2/ja not_active Expired - Fee Related
- 2011-05-06 TW TW100115972A patent/TW201209820A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| TW201209820A (en) | 2012-03-01 |
| US20110276775A1 (en) | 2011-11-10 |
| JP2013525924A (ja) | 2013-06-20 |
| EP2567379A1 (en) | 2013-03-13 |
| WO2011137541A1 (en) | 2011-11-10 |
| KR20130071436A (ko) | 2013-06-28 |
| EP2567379A4 (en) | 2014-01-22 |
| JP5665974B2 (ja) | 2015-02-04 |
| CN102971795A (zh) | 2013-03-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request |
Effective date: 20160425 |
|
| FZDE | Discontinued |
Effective date: 20170510 |