CA2370254A1 - Ameliorations apportees a des synthetiseurs de frequence - Google Patents

Ameliorations apportees a des synthetiseurs de frequence Download PDF

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Publication number
CA2370254A1
CA2370254A1 CA002370254A CA2370254A CA2370254A1 CA 2370254 A1 CA2370254 A1 CA 2370254A1 CA 002370254 A CA002370254 A CA 002370254A CA 2370254 A CA2370254 A CA 2370254A CA 2370254 A1 CA2370254 A1 CA 2370254A1
Authority
CA
Canada
Prior art keywords
output
adder
modulator
input
feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002370254A
Other languages
English (en)
Inventor
Stephen Ian Mann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tait Electronics Ltd
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2370254A1 publication Critical patent/CA2370254A1/fr
Abandoned legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

L'invention concerne un synthétiseur de fréquences de type N fractionnaire présentant une gamme améliorée de valeurs de contrôle fractionnaires situées hors de la fourchette habituelle {0,1}. Le synthétiseur se base sur une boucle à phase asservie (PLL) comportant un diviseur de fréquences commandé par un système de modulation amélioré. Le bruit et les fréquences parasites de la sortie de la boucle à phase asservie sont réduits. Le modulateur comporte un quantificateur à niveaux multiples comportant des opérations de logique supplémentaires dans les étapes de sortie et de rétroaction. On peut utiliser une cascade de modulateurs. Au besoin, on peut ajouter un signal de vibration dans un ou plusieurs des modulateurs.
CA002370254A 1999-04-14 2000-04-14 Ameliorations apportees a des synthetiseurs de frequence Abandoned CA2370254A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NZ335198 1999-04-14
NZ33519899A NZ335198A (en) 1999-04-14 1999-04-14 Cascaded sigma-delta modulators for fractional-N-division phase-lock-loop frequency systhesizer
PCT/NZ2000/000054 WO2000062428A2 (fr) 1999-04-14 2000-04-14 Ameliorations apportees a des synthetiseurs de frequence

Publications (1)

Publication Number Publication Date
CA2370254A1 true CA2370254A1 (fr) 2000-10-19

Family

ID=19927215

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002370254A Abandoned CA2370254A1 (fr) 1999-04-14 2000-04-14 Ameliorations apportees a des synthetiseurs de frequence

Country Status (6)

Country Link
EP (1) EP1171954A4 (fr)
CN (1) CN1347591A (fr)
AU (1) AU3847500A (fr)
CA (1) CA2370254A1 (fr)
NZ (3) NZ335198A (fr)
WO (1) WO2000062428A2 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1643794A (zh) * 2002-03-28 2005-07-20 凯奔研究公司 用于分数分频器的相位误差消除电路和方法和含有该相位误差消除电路的电路
US7072633B2 (en) * 2002-05-31 2006-07-04 Broadcom Corporation Double-conversion television tuner using a Delta-Sigma Fractional-N PLL
JP2004104228A (ja) * 2002-09-05 2004-04-02 Matsushita Electric Ind Co Ltd 信号処理装置および信号処理方法、デルタ・シグマ変調型分数分周pll周波数シンセサイザ、無線通信機器、デルタ・シグマ変調型d/a変換器
US6928127B2 (en) * 2003-03-11 2005-08-09 Atheros Communications, Inc. Frequency synthesizer with prescaler
GB2409383B (en) 2003-12-17 2006-06-21 Wolfson Ltd Clock synchroniser
WO2005096502A1 (fr) 2004-04-02 2005-10-13 Kaben Research Inc. Modulateurs delta sigma a plusieurs etages
CN1318212C (zh) * 2004-07-30 2007-05-30 深圳市东方宇之光电子科技有限公司 用于激光照排机中校正图像几何误差的方法及装置
WO2011079471A1 (fr) * 2009-12-31 2011-07-07 海能达通信股份有限公司 Procédé et système d'optimisation de parasites fractionnels

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2107142B (en) * 1981-10-07 1984-10-10 Marconi Co Ltd Frequency synthesisers
GB2140232B (en) * 1983-05-17 1986-10-29 Marconi Instruments Ltd Frequency synthesisers
GB2228840B (en) * 1989-03-04 1993-02-10 Racal Dana Instr Ltd Frequency synthesisers
US5038117A (en) * 1990-01-23 1991-08-06 Hewlett-Packard Company Multiple-modulator fractional-N divider
US5055802A (en) * 1990-04-30 1991-10-08 Motorola, Inc. Multiaccumulator sigma-delta fractional-n synthesis
US5093632A (en) * 1990-08-31 1992-03-03 Motorola, Inc. Latched accumulator fractional n synthesis with residual error reduction
KR20000068744A (ko) * 1997-08-12 2000-11-25 요트.게.아. 롤페즈 다중 채널 무선 장치, 무선 통신 시스템, 및 분수 분할 주파수신시사이저
US6219397B1 (en) * 1998-03-20 2001-04-17 Samsung Electronics Co., Ltd. Low phase noise CMOS fractional-N frequency synthesizer for wireless communications
TW451558B (en) * 1999-06-29 2001-08-21 Ind Tech Res Inst Digitally controlled oscillator circuit of digital phase lock loop
JP3415574B2 (ja) * 2000-08-10 2003-06-09 Necエレクトロニクス株式会社 Pll回路
EP1193879A1 (fr) * 2000-09-29 2002-04-03 Koninklijke Philips Electronics N.V. Synthétiseur de fréquences à faible bruit et à réponse rapide, et procédé de synthèse de fréquences correspondant

Also Published As

Publication number Publication date
NZ507555A (en) 2002-10-25
NZ335198A (en) 2000-11-24
NZ507556A (en) 2002-10-25
WO2000062428A2 (fr) 2000-10-19
WO2000062428A3 (fr) 2001-11-01
AU3847500A (en) 2000-11-14
EP1171954A4 (fr) 2002-10-30
EP1171954A2 (fr) 2002-01-16
CN1347591A (zh) 2002-05-01

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Legal Events

Date Code Title Description
FZDE Discontinued