CA2356187A1 - A synchronous flyback converter - Google Patents
A synchronous flyback converter Download PDFInfo
- Publication number
- CA2356187A1 CA2356187A1 CA002356187A CA2356187A CA2356187A1 CA 2356187 A1 CA2356187 A1 CA 2356187A1 CA 002356187 A CA002356187 A CA 002356187A CA 2356187 A CA2356187 A CA 2356187A CA 2356187 A1 CA2356187 A1 CA 2356187A1
- Authority
- CA
- Canada
- Prior art keywords
- transistor
- terminal
- converter
- secondary side
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
- H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
Abstract
In a continuous mode flyback converter having a synchronous switch (Q2) the drive pulse to the switch (Q2) on the secondary side is generated by an inverting buffer circuit being fed from the output voltage terminal. By usin g such an arrangement several advantages are obtained. Hence, the pulse generating circuit arrangement generates a drive signal to the synchronous switch which is independent of the input voltage and the drive losses can thereby be minimized.
Description
wo oor~s3os rc~r~sE~ro~9o A SYNCHRONOUS FLYBACK CONVERTER
TECfnITICAL FIEhD
The present invention relates to a DC-DC converter circuit, and in particular to a synchronous flyback converter circuit for operation in a continuous mode.
BACKGROUND OF THE INVENTION AND PRIOR ART
In DC-DC power supply of different kinds of electrical devices, power rectifiers are utilized in order to output a correct rectified output voltage. Typically a diode would be employed on the secondary side in order to obtain the rectified output voltage.
One way of obtaining a suitable rectifier circuit is to use flyback topology. In a flyback topology a primary side stores magnetic energy in a magnetisable core or the like during a charging inter<ral. The energy is then fed to a secondary side during the so called flyback interval. The main advantage of a power rectifier circuit having a flyback topology compared to other rectifier circuits is its simple construction, which makes it cheap to manufacture.
Furthermore, flyback converters can be divided into two different kinds:
- continuous mode flyback converters, and - discontinuous mode flyback converters.
In a continuous mode flyback converter the magnetic energy never drops to zero so that energy is continuously flowing either in or out of the core of the transformer, whereas in a discontinuous mode, intervals when energy is neither flowing in nor out of the core of the transformer occurs.
A conventional flyback converter comprises, on the primary side, a primary winding of a transformer and a switch, and on the secondary side a secondary winding of the transformer connected to a diode and an output capacitor over which a load can be connected.
TECfnITICAL FIEhD
The present invention relates to a DC-DC converter circuit, and in particular to a synchronous flyback converter circuit for operation in a continuous mode.
BACKGROUND OF THE INVENTION AND PRIOR ART
In DC-DC power supply of different kinds of electrical devices, power rectifiers are utilized in order to output a correct rectified output voltage. Typically a diode would be employed on the secondary side in order to obtain the rectified output voltage.
One way of obtaining a suitable rectifier circuit is to use flyback topology. In a flyback topology a primary side stores magnetic energy in a magnetisable core or the like during a charging inter<ral. The energy is then fed to a secondary side during the so called flyback interval. The main advantage of a power rectifier circuit having a flyback topology compared to other rectifier circuits is its simple construction, which makes it cheap to manufacture.
Furthermore, flyback converters can be divided into two different kinds:
- continuous mode flyback converters, and - discontinuous mode flyback converters.
In a continuous mode flyback converter the magnetic energy never drops to zero so that energy is continuously flowing either in or out of the core of the transformer, whereas in a discontinuous mode, intervals when energy is neither flowing in nor out of the core of the transformer occurs.
A conventional flyback converter comprises, on the primary side, a primary winding of a transformer and a switch, and on the secondary side a secondary winding of the transformer connected to a diode and an output capacitor over which a load can be connected.
Such a converter has a large voltage drop over the diode. Thus, in the case when the output voltage over the output capacitor is low, the voltage drop over the diode becomes a significant part of the overall voltage, which makes the power converter inefficient for such low voltage applications.
In order to solve this problem a FET transistor, which has a much lower voltage drop can be used on the secondary side. Such an arrangement will reduce the losses on the secondary side. The FET transistor can for example be directly connected to an auxiliary winding arranged in series with the secondary winding of the transformer. A converter designed according to these principles is for example described in the co-pending Swedish patent application No. 9801595-1.
However, in such driving structures, where an auxiliary winding is used, the gate amplitude of the FET on the secondary side will depend on the input voltage, i.e. the voltage applied to the primary side. This will cause excessive drive losses, since the drive amplitude must be designed for the lowest input voltage in such a case. This is particularly a problem in applications where a large input voltage range is desired.
Furthermore, other DC-DC converters according to the state of the art are described in WO 98/04028 and in WO 95/02918.
Also, in the US patent No. 5,719,755 a DC-DC converter is described.
SU1~~MARY
It is an object of the present invention to overcome the problems as outlined above and to provide a continuous mode flyback converter which has a simple construction, and yet being efficient compared to the converters according to the prior art, and which particularly well suited for a large input voltage range .
This object and others are obtained by the power converters as set out in the appended claims.
In order to solve this problem a FET transistor, which has a much lower voltage drop can be used on the secondary side. Such an arrangement will reduce the losses on the secondary side. The FET transistor can for example be directly connected to an auxiliary winding arranged in series with the secondary winding of the transformer. A converter designed according to these principles is for example described in the co-pending Swedish patent application No. 9801595-1.
However, in such driving structures, where an auxiliary winding is used, the gate amplitude of the FET on the secondary side will depend on the input voltage, i.e. the voltage applied to the primary side. This will cause excessive drive losses, since the drive amplitude must be designed for the lowest input voltage in such a case. This is particularly a problem in applications where a large input voltage range is desired.
Furthermore, other DC-DC converters according to the state of the art are described in WO 98/04028 and in WO 95/02918.
Also, in the US patent No. 5,719,755 a DC-DC converter is described.
SU1~~MARY
It is an object of the present invention to overcome the problems as outlined above and to provide a continuous mode flyback converter which has a simple construction, and yet being efficient compared to the converters according to the prior art, and which particularly well suited for a large input voltage range .
This object and others are obtained by the power converters as set out in the appended claims.
Thus, a drive pulse is generated by an inverting buffer circuit, which is fed from the output voltage. By using such a pulse generating circuit, the drive signal to the synchronous switch becomes independent of the input voltage and the drive losses can thereby be minimized.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will now be described in more detail by way of non-limiting examples and with reference to the accompanying drawings, in which:
- Fig. 1 is a circuit diagram of a continuous mode DC-DC
converter.
- Figs. 2a - 2c are timing diagrams.
DESCRIPTION OF PREFERRED EMBODIMENTS
In Fig. 1 a DC-DC converter is shown. The power converter comprises, on the primary side, a primary winding 101 and a switch 103. The primary winding is supplied with power from a DC
voltage source 105. The switch can for example be an n-channel MOSFET transistor Q1 as shown in the figure. The drain terminal of the transistor Q1 is connected to a first terminal of the primary winding 101 and the source is connected to the low voltage input terminal of the voltage source 105. The switch is controlled by a control device (not shown) connected to the gate of the transistor Q1, and is arranged to switch the transistor Q1 on and off at desired times. The control device can for example collect control data from the output terminals of the secondary side of the converter.
The DC-voltage source 105 can in turn be connected to an AC-voltage supply (not shown) via a rectifying circuit. The primary side feeds a secondary side with energy via a transformer M2.
The secondary side comprises a secondary winding 109 having an opposite winding direction than the winding on the primazy side.
A first terminal 111 of the winding 109 is connected to a first terminal 113 of a resistor R1, the emitter 115 of a PNP
transistor Q3, and to a first terminal 117 of an output capacitor C0. The second terminal 1-19 of the resistor R1 is wo oorss3os Po'f~sE~ro~~o connected to a first terminal 121 of a resistor R2, the second terminal 123 of which is connected to the second terminal 125 of the winding 209.
The base 127 of the transistor Q3 is connected to a point 129 between the second terminal 119 of the resistor R1 and the first terminal 121 of the resistor R2. The collector 131 of the transistor Q3 is connected to the collector 133 of a NPN
transistor Q4.
The base 135 of the transistor Q4 is in a preferred embodiment connected to the second terminal 125 of the winding 109 via a resistor R3 and a capacitor C1 connected in series. The emitter 137 of the transistor Q4 is connected to the second terminal 139 of the capacitor CO and to the source 141 of a FET transistor Q2. The gate 143 of the transistor Q2 is connected to a point 145 between the collector terminals~of the transistors Q3 and Q4. The drain of the transistor Q2 is connected to the second terminal 225 of the winding 109. A load ZL can be connected between the terminals of the output capacitor C0.
In operation, during the on-time of Q1, i.e. when the control device makes the MOSFET transistor conducting, energy is stored in the core of the transformer M2. Due to the winding direction a positive voltage will appear at the drain terminal of the transistor Q2. The transistor Q4 will at the same time be conducting and the transistor Q2 will therefore be switched off.
When the transistor Q1 is turned off by the control device, the polarity in the windings of the transformer M2 are reversed due to the energy stored in the core of the transformer M2. The reversed polarities will cause a negative voltage to appear at the drain terminal of the transistor Q2. Via the voltage divider provided by the resistors R1 and R2, the reversed polarity on the secondary side will cause the transistor Q3 to conduct. When the transistor Q3 starts to conduct the gate terminal I43 of the transistor Q2 goes high and the transistor Q2 starts to conduct.
The capacitor C1 and the resistor R3 are provided so that the turn off and turn on times for the transistor Q3 will be low.
v wo oor~s3os Pcr~sE9gro~9o s In Figs 2a - 2c, the timing of the circuit shown in.Fig 1 is illustrated. Thus, in Fig. 2c the voltage appearing at the gate of the transistor Q1 is shown.
In Fig. 2b, the voltage appearing between the terminals of the secondary winding of the transformer M2 at the corresponding time is shown. In Fig. 2c the voltage appearing between the gate and source terminals of the transistor Q2 at the corresponding time is shown.
Thus, by providing an arrangement where a drive pulse to the FET
transistor on the secondary side is generated by an inverting buffer circuit being fed from the output voltage terminal several advantages are obtained. Hence, the pulse generating circuit arrangement generates a drive signal to the synchronous switch which is independent of the input voltage and the drive losses can thereby be minimized.
Furthermore, no auxiliary winding on the secondary side is required as in the co-pending Swedish patent application No.
9801595-1, which can be an advantage in some applications.
The invention is not limited to the implementation described in conjunction with Figs. 1, 2a, 2b and 2c, but can easily be modified without deviating from the scope of the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will now be described in more detail by way of non-limiting examples and with reference to the accompanying drawings, in which:
- Fig. 1 is a circuit diagram of a continuous mode DC-DC
converter.
- Figs. 2a - 2c are timing diagrams.
DESCRIPTION OF PREFERRED EMBODIMENTS
In Fig. 1 a DC-DC converter is shown. The power converter comprises, on the primary side, a primary winding 101 and a switch 103. The primary winding is supplied with power from a DC
voltage source 105. The switch can for example be an n-channel MOSFET transistor Q1 as shown in the figure. The drain terminal of the transistor Q1 is connected to a first terminal of the primary winding 101 and the source is connected to the low voltage input terminal of the voltage source 105. The switch is controlled by a control device (not shown) connected to the gate of the transistor Q1, and is arranged to switch the transistor Q1 on and off at desired times. The control device can for example collect control data from the output terminals of the secondary side of the converter.
The DC-voltage source 105 can in turn be connected to an AC-voltage supply (not shown) via a rectifying circuit. The primary side feeds a secondary side with energy via a transformer M2.
The secondary side comprises a secondary winding 109 having an opposite winding direction than the winding on the primazy side.
A first terminal 111 of the winding 109 is connected to a first terminal 113 of a resistor R1, the emitter 115 of a PNP
transistor Q3, and to a first terminal 117 of an output capacitor C0. The second terminal 1-19 of the resistor R1 is wo oorss3os Po'f~sE~ro~~o connected to a first terminal 121 of a resistor R2, the second terminal 123 of which is connected to the second terminal 125 of the winding 209.
The base 127 of the transistor Q3 is connected to a point 129 between the second terminal 119 of the resistor R1 and the first terminal 121 of the resistor R2. The collector 131 of the transistor Q3 is connected to the collector 133 of a NPN
transistor Q4.
The base 135 of the transistor Q4 is in a preferred embodiment connected to the second terminal 125 of the winding 109 via a resistor R3 and a capacitor C1 connected in series. The emitter 137 of the transistor Q4 is connected to the second terminal 139 of the capacitor CO and to the source 141 of a FET transistor Q2. The gate 143 of the transistor Q2 is connected to a point 145 between the collector terminals~of the transistors Q3 and Q4. The drain of the transistor Q2 is connected to the second terminal 225 of the winding 109. A load ZL can be connected between the terminals of the output capacitor C0.
In operation, during the on-time of Q1, i.e. when the control device makes the MOSFET transistor conducting, energy is stored in the core of the transformer M2. Due to the winding direction a positive voltage will appear at the drain terminal of the transistor Q2. The transistor Q4 will at the same time be conducting and the transistor Q2 will therefore be switched off.
When the transistor Q1 is turned off by the control device, the polarity in the windings of the transformer M2 are reversed due to the energy stored in the core of the transformer M2. The reversed polarities will cause a negative voltage to appear at the drain terminal of the transistor Q2. Via the voltage divider provided by the resistors R1 and R2, the reversed polarity on the secondary side will cause the transistor Q3 to conduct. When the transistor Q3 starts to conduct the gate terminal I43 of the transistor Q2 goes high and the transistor Q2 starts to conduct.
The capacitor C1 and the resistor R3 are provided so that the turn off and turn on times for the transistor Q3 will be low.
v wo oor~s3os Pcr~sE9gro~9o s In Figs 2a - 2c, the timing of the circuit shown in.Fig 1 is illustrated. Thus, in Fig. 2c the voltage appearing at the gate of the transistor Q1 is shown.
In Fig. 2b, the voltage appearing between the terminals of the secondary winding of the transformer M2 at the corresponding time is shown. In Fig. 2c the voltage appearing between the gate and source terminals of the transistor Q2 at the corresponding time is shown.
Thus, by providing an arrangement where a drive pulse to the FET
transistor on the secondary side is generated by an inverting buffer circuit being fed from the output voltage terminal several advantages are obtained. Hence, the pulse generating circuit arrangement generates a drive signal to the synchronous switch which is independent of the input voltage and the drive losses can thereby be minimized.
Furthermore, no auxiliary winding on the secondary side is required as in the co-pending Swedish patent application No.
9801595-1, which can be an advantage in some applications.
The invention is not limited to the implementation described in conjunction with Figs. 1, 2a, 2b and 2c, but can easily be modified without deviating from the scope of the appended claims.
Claims (6)
1. A continuous mode flyback converter having a primary and a secondary side, the secondary side comprising a synchronous switch (Q2) , having an arrangement operating in response to the output voltage of the converter arranged to control the synchronous switch, characterized is that the arrangement for controlling the switch comprises a PNP
transistor (Q3), the emitter of which is connected to a first output terminal (117) of the converter and an NPN transistor (Q4), the emitter of which is connected to a second output terminal (139) of the converter and the collector of the transistor (Q4) being connected to a control input terminal (143) of the switch (Q2).
transistor (Q3), the emitter of which is connected to a first output terminal (117) of the converter and an NPN transistor (Q4), the emitter of which is connected to a second output terminal (139) of the converter and the collector of the transistor (Q4) being connected to a control input terminal (143) of the switch (Q2).
2. A converter according to claim 1, characterized is that base terminal (127) of the transistor (Q3) is fed from the terminals of the secondary side via a voltage divider circuit (R1, R2).
3. A converter according to claim 2, characterized is that the voltage divider circuit comprises two resistors (R1 and R2) connected in series.
4. A converter according to any of claims 1 - 3, characterized is that base terminal (135) of the transistor (Q4) is fed from a terminal (125) of the secondary side.
5. A converter according to claim 4, characterized is that the that the base terminal (135) of the transistor (Q4) is connected to the terminal (125) of the secondary side via a circuit comprising a resistor (R3) and a capacitor (C1) connected in series.
6. A converter according to any of claims 1 - 5, characterized in that switch (Q2) is a FET transistor, in particular a MOSFET
transistor.
transistor.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE9804454-8 | 1998-12-21 | ||
| SE9804454A SE517220C2 (en) | 1998-12-21 | 1998-12-21 | Synchronous flyback converter |
| PCT/SE1999/002390 WO2000038305A1 (en) | 1998-12-21 | 1999-12-16 | A synchronous flyback converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2356187A1 true CA2356187A1 (en) | 2000-06-29 |
Family
ID=20413780
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002356187A Abandoned CA2356187A1 (en) | 1998-12-21 | 1999-12-16 | A synchronous flyback converter |
Country Status (10)
| Country | Link |
|---|---|
| EP (1) | EP1145415A1 (en) |
| JP (1) | JP2002534049A (en) |
| KR (1) | KR20010093856A (en) |
| CN (1) | CN1135682C (en) |
| AU (1) | AU3092000A (en) |
| CA (1) | CA2356187A1 (en) |
| HK (1) | HK1043447B (en) |
| SE (1) | SE517220C2 (en) |
| TW (1) | TW456096B (en) |
| WO (1) | WO2000038305A1 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100568319B1 (en) * | 2004-10-22 | 2006-04-05 | 삼성전기주식회사 | Flyback converter with synchronous rectifier |
| JP4975166B2 (en) * | 2007-05-30 | 2012-07-11 | パワー−ワン イタリー ソシエタ ペル アチオニ | Multi-output synchronous flyback converter |
| CN101359873B (en) * | 2007-08-02 | 2010-09-08 | 洋鑫科技股份有限公司 | Flyback voltage converter having self-driving synchronous rectifier |
| AT14080U1 (en) * | 2013-08-12 | 2015-04-15 | Tridonic Gmbh & Co Kg | Control circuit for a control gear for bulbs |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3422777A1 (en) * | 1984-06-20 | 1986-01-02 | ANT Nachrichtentechnik GmbH, 7150 Backnang | Controlled rectifier element, which is connected to an inductor, and its use |
| US4870555A (en) * | 1988-10-14 | 1989-09-26 | Compaq Computer Corporation | High-efficiency DC-to-DC power supply with synchronous rectification |
| JP2845188B2 (en) * | 1995-12-11 | 1999-01-13 | サンケン電気株式会社 | DC-DC converter |
| US5818704A (en) * | 1997-04-17 | 1998-10-06 | International Rectifier Corporation | Synchronizing/driving circuit for a forward synchronous rectifier |
-
1998
- 1998-12-21 SE SE9804454A patent/SE517220C2/en not_active IP Right Cessation
-
1999
- 1999-10-01 TW TW088116943A patent/TW456096B/en not_active IP Right Cessation
- 1999-12-16 JP JP2000590281A patent/JP2002534049A/en not_active Withdrawn
- 1999-12-16 WO PCT/SE1999/002390 patent/WO2000038305A1/en not_active Application Discontinuation
- 1999-12-16 KR KR1020017007808A patent/KR20010093856A/en not_active Application Discontinuation
- 1999-12-16 AU AU30920/00A patent/AU3092000A/en not_active Abandoned
- 1999-12-16 CA CA002356187A patent/CA2356187A1/en not_active Abandoned
- 1999-12-16 EP EP99964889A patent/EP1145415A1/en not_active Withdrawn
- 1999-12-16 CN CNB99814777XA patent/CN1135682C/en not_active Expired - Fee Related
-
2002
- 2002-07-11 HK HK02105160.1A patent/HK1043447B/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| SE9804454D0 (en) | 1998-12-21 |
| CN1135682C (en) | 2004-01-21 |
| CN1331863A (en) | 2002-01-16 |
| WO2000038305A9 (en) | 2000-12-07 |
| KR20010093856A (en) | 2001-10-29 |
| TW456096B (en) | 2001-09-21 |
| EP1145415A1 (en) | 2001-10-17 |
| JP2002534049A (en) | 2002-10-08 |
| AU3092000A (en) | 2000-07-12 |
| HK1043447B (en) | 2004-12-03 |
| SE517220C2 (en) | 2002-05-07 |
| WO2000038305A1 (en) | 2000-06-29 |
| HK1043447A1 (en) | 2002-09-13 |
| SE9804454L (en) | 2000-06-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FZDE | Discontinued |