CA2231243A1 - Commutateur en mode atm avec tampons de priorite de connexion virtuelle - Google Patents

Commutateur en mode atm avec tampons de priorite de connexion virtuelle Download PDF

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Publication number
CA2231243A1
CA2231243A1 CA002231243A CA2231243A CA2231243A1 CA 2231243 A1 CA2231243 A1 CA 2231243A1 CA 002231243 A CA002231243 A CA 002231243A CA 2231243 A CA2231243 A CA 2231243A CA 2231243 A1 CA2231243 A1 CA 2231243A1
Authority
CA
Canada
Prior art keywords
arbitration
output
fifo
buffer
cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002231243A
Other languages
English (en)
Inventor
Trevor Jones
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ahead Communications Systems Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2231243A1 publication Critical patent/CA2231243A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5651—Priority, marking, classes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5679—Arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H04L49/1523—Parallel switch fabric planes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3009—Header conversion, routing tables or routing tags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/50—Overload detection or protection within a single switching element
    • H04L49/505—Corrective measures
    • H04L49/508—Head of Line Blocking Avoidance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/55—Prevention, detection or correction of errors
    • H04L49/552—Prevention, detection or correction of errors by ensuring the integrity of packets received through redundant connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

Commutateur en mode ATM (de transfert asynchrone) (10) comportant une série de contrôleurs de liaison (12) comportant chacun une mémoire FIFO (30) pour chaque connexion virtuelle et une mémore FIFO (32) pour chaque niveau de priorité. Les cellules sont poussées dans la mémoire FIFO (30) de connexion virtuelle et un pointeur désignant la mémoire FIFO de connexion virtuelle (30) est poussé vers une mémoire FIFO d'arbitrage (32) en direction du niveau de priorité de la mémoire FIFO de connexion virtuelle (30). Les mémoires FIFO d'arbitrage (32) sont examinées en fonction d'une liste et les cellules sont éliminées des mémoires FIFO de connexion virtuelle (30) en fonction d'une priorité de sortie émanant du contrôleur (12). Selon un mode de réalisation, la mémoire FIFO d'arbitrage ayant le plus haut degré de priorité (32a) est toujours examinée en premier et aucune des mémoires d'arbitrage FIFO à plus faible degré de priorité (32b, 32d) n'est examinée, à moins que la mémoire FIFO d'arbitrage du plus haut degré de priorité ne soit vide. Selon un autre mode de réalisation, des temporisateurs sont réglés pour les mémoires d'arbitrage FIFO à plus faible degré de priorité (32b-32d) et, lorsqu'un temporisateur vient à son terme pour une mémoire FIFO d'arbitrage à plus faible degré de priorité, celle-ci est examinée.
CA002231243A 1995-10-03 1996-10-02 Commutateur en mode atm avec tampons de priorite de connexion virtuelle Abandoned CA2231243A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9520147.1 1995-10-03
GB9520147A GB2306076B (en) 1995-10-03 1995-10-03 ATM network switch

Publications (1)

Publication Number Publication Date
CA2231243A1 true CA2231243A1 (fr) 1997-04-10

Family

ID=10781673

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002231243A Abandoned CA2231243A1 (fr) 1995-10-03 1996-10-02 Commutateur en mode atm avec tampons de priorite de connexion virtuelle

Country Status (5)

Country Link
EP (1) EP0853851A4 (fr)
AU (1) AU7251796A (fr)
CA (1) CA2231243A1 (fr)
GB (1) GB2306076B (fr)
WO (1) WO1997013346A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6084855A (en) * 1997-02-18 2000-07-04 Nokia Telecommunications, Oy Method and apparatus for providing fair traffic scheduling among aggregated internet protocol flows
GB2337407A (en) * 1998-05-11 1999-11-17 Gen Datacomm Adv Res Data switch
GB2337401B (en) * 1998-05-11 2003-04-23 Gen Datacomm Advanced Res Ct L Cell processor
US6240075B1 (en) * 1999-01-25 2001-05-29 Trw Inc. Satellite communication routing arbitration techniques
JP2001127766A (ja) * 1999-10-25 2001-05-11 Toshiba Corp ラインインターフェース装置、及び、パケット交換機

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5150358A (en) * 1990-08-23 1992-09-22 At&T Bell Laboratories Serving constant bit rate traffic in a broadband data switch
GB2272820B (en) * 1992-11-14 1996-08-07 Roke Manor Research Improvements in or relating to asynchronous transfer mode communication systems
KR960003783B1 (ko) * 1993-11-06 1996-03-22 한국전기통신공사 광대역 종합정보통신망 가입자 액세스 장치의 비동기 전달방식(atm) 다중화 처리 장치 및 방법
GB9405406D0 (en) * 1994-03-18 1994-05-04 Netcomm Ltd Atm cell switch
GB2288095A (en) * 1994-03-23 1995-10-04 Roke Manor Research Improvements in or relating to asynchronous transfer mode (ATM) systems

Also Published As

Publication number Publication date
EP0853851A4 (fr) 2001-10-04
GB2306076B (en) 2000-03-22
GB9520147D0 (en) 1995-12-06
WO1997013346A1 (fr) 1997-04-10
EP0853851A1 (fr) 1998-07-22
GB2306076A (en) 1997-04-23
AU7251796A (en) 1997-04-28

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Legal Events

Date Code Title Description
EEER Examination request
FZDE Discontinued