CA2181874A1 - Cellule faisant partie d'un reseau logique personnalise - Google Patents

Cellule faisant partie d'un reseau logique personnalise

Info

Publication number
CA2181874A1
CA2181874A1 CA002181874A CA2181874A CA2181874A1 CA 2181874 A1 CA2181874 A1 CA 2181874A1 CA 002181874 A CA002181874 A CA 002181874A CA 2181874 A CA2181874 A CA 2181874A CA 2181874 A1 CA2181874 A1 CA 2181874A1
Authority
CA
Canada
Prior art keywords
multiplexer
output
input
multiplexers
logic array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002181874A
Other languages
English (en)
Inventor
Uzi Yoeli
Eran Rotem
Yehuda Yizraeli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chip Express Israel Ltd
Original Assignee
Chip Express Israel Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chip Express Israel Ltd filed Critical Chip Express Israel Ltd
Publication of CA2181874A1 publication Critical patent/CA2181874A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
CA002181874A 1995-08-18 1996-07-23 Cellule faisant partie d'un reseau logique personnalise Abandoned CA2181874A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/516,990 US5684412A (en) 1995-08-18 1995-08-18 Cell forming part of a customizable logic array
US08/516,990 1995-08-18

Publications (1)

Publication Number Publication Date
CA2181874A1 true CA2181874A1 (fr) 1997-02-19

Family

ID=24057916

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002181874A Abandoned CA2181874A1 (fr) 1995-08-18 1996-07-23 Cellule faisant partie d'un reseau logique personnalise

Country Status (5)

Country Link
US (1) US5684412A (fr)
JP (1) JPH09116124A (fr)
KR (1) KR970013752A (fr)
CA (1) CA2181874A1 (fr)
TW (1) TW326567B (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6245634B1 (en) 1999-10-28 2001-06-12 Easic Corporation Method for design and manufacture of semiconductors
US6194912B1 (en) 1999-03-11 2001-02-27 Easic Corporation Integrated circuit device
US6236229B1 (en) 1999-05-13 2001-05-22 Easic Corporation Integrated circuits which employ look up tables to provide highly efficient logic cells and logic functionalities
US6331733B1 (en) 1999-08-10 2001-12-18 Easic Corporation Semiconductor device
US6331790B1 (en) 2000-03-10 2001-12-18 Easic Corporation Customizable and programmable cell array
US6294927B1 (en) 2000-06-16 2001-09-25 Chip Express (Israel) Ltd Configurable cell for customizable logic array device
JP3555080B2 (ja) 2000-10-19 2004-08-18 Ｎｅｃエレクトロニクス株式会社 汎用ロジックモジュール及びこれを用いたセル
JP3621354B2 (ja) * 2001-04-04 2005-02-16 Ｎｅｃエレクトロニクス株式会社 半導体集積回路の配線方法及び構造
JP3953313B2 (ja) * 2001-12-21 2007-08-08 Ｎｅｃエレクトロニクス株式会社 汎用ロジックモジュールを用いたａｓｉｃ及びその設計・製造方法
JP2003273336A (ja) * 2002-03-13 2003-09-26 Nec Electronics Corp 汎用ロジックセルアレイ及びこれを用いたａｓｉｃ
JP4156864B2 (ja) * 2002-05-17 2008-09-24 Ｎｅｃエレクトロニクス株式会社 半導体装置及びその製造方法
JP2003338750A (ja) * 2002-05-20 2003-11-28 Nec Electronics Corp 汎用ロジックセル、これを用いた汎用ロジックセルアレイ、及びこの汎用ロジックセルアレイを用いたａｓｉｃ
JP2004112653A (ja) * 2002-09-20 2004-04-08 Nec Electronics Corp 半導体装置
DE102004014472B4 (de) * 2004-03-24 2012-05-03 Infineon Technologies Ag Anwendungsspezifischer integrierter Halbleiter-Schaltkreis
KR100700645B1 (ko) * 2005-01-10 2007-03-27 삼성에스디아이 주식회사 액정 표시 장치 및 그의 구동방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5451887A (en) * 1986-09-19 1995-09-19 Actel Corporation Programmable logic module and architecture for field programmable gate array device
US5289021A (en) * 1990-05-15 1994-02-22 Siarc Basic cell architecture for mask programmable gate array with 3 or more size transistors
US5055716A (en) * 1990-05-15 1991-10-08 Siarc Basic cell for bicmos gate array
US5122685A (en) * 1991-03-06 1992-06-16 Quicklogic Corporation Programmable application specific integrated circuit and logic cell therefor
US5436574A (en) * 1993-11-12 1995-07-25 Altera Corporation Universal logic module with arithmetic capabilities
US5391943A (en) * 1994-01-10 1995-02-21 Mahant-Shetti; Shivaling S. Gate array cell with predefined connection patterns

Also Published As

Publication number Publication date
TW326567B (en) 1998-02-11
JPH09116124A (ja) 1997-05-02
KR970013752A (ko) 1997-03-29
US5684412A (en) 1997-11-04

Similar Documents

Publication Publication Date Title
US5684412A (en) Cell forming part of a customizable logic array
US8188767B2 (en) Logic circuit and method of logic circuit design
US8161427B2 (en) Logic circuit and method of logic circuit design
US5260611A (en) Programmable logic array having local and long distance conductors
US6252448B1 (en) Coincident complementary clock generator for logic circuits
Friedman et al. Dynamic logic CMOS circuits
US6674307B2 (en) General-purpose logic module and cell using the same
US6252425B1 (en) Method and apparatus for an N-NARY logic circuit
US6288593B1 (en) Digital electronic circuit for use in implementing digital logic functions
US5012126A (en) High speed CMOS multiplexer having reduced propagation delay
US5751165A (en) High speed customizable logic array device
EP0762653A2 (fr) Cellule appartenant à un réseau logique programmable
US5329181A (en) Complementary macrocell feedback circuit
US6911846B1 (en) Method and apparatus for a 1 of N signal
US4924440A (en) MOS gate array devices
US5694055A (en) Zero static power programmable logic cell
Toshniwal Design of an input/output block for a multi-technology field programmable gate array
Karunakaran High Performance VLSI Architecture of Multiplexer and Demultiplexer Using various Adiabatic Logic
JPH08306890A (ja) 予め画定された接続パターンを備えたゲートアレイセル
Koopman et al. A high-density sea-of-gates architecture incorporating testability support
Piguet Logic design for low-power CMOS circuits
Duchene et al. Gate usage strategies applied to BiCMOS sea-of-gates arrays
JPH04320060A (ja) 半導体集積回路
Koopman et al. A general-purpose high-density sea-of-gates architecture
Dhong et al. Single phase dynamic CMOS PLA using charge sharing technique

Legal Events

Date Code Title Description
FZDE Discontinued

Effective date: 20020723