CA2097308A1 - Methode et dispositif d'interdiction d'ecriture pour memoire - Google Patents

Methode et dispositif d'interdiction d'ecriture pour memoire

Info

Publication number
CA2097308A1
CA2097308A1 CA002097308A CA2097308A CA2097308A1 CA 2097308 A1 CA2097308 A1 CA 2097308A1 CA 002097308 A CA002097308 A CA 002097308A CA 2097308 A CA2097308 A CA 2097308A CA 2097308 A1 CA2097308 A1 CA 2097308A1
Authority
CA
Canada
Prior art keywords
data
signal
predetermined time
memory device
generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002097308A
Other languages
English (en)
Inventor
Terrie Frane
Francesco Rago
Lawrence D. Cepuran
Dale Bengston
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2097308A1 publication Critical patent/CA2097308A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/88Masking faults in memories by using spares or by reconfiguring with partially good memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/004Error avoidance
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0796Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Mobile Radio Communication Systems (AREA)
CA002097308A 1991-10-01 1992-08-03 Methode et dispositif d'interdiction d'ecriture pour memoire Abandoned CA2097308A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US76989691A 1991-10-01 1991-10-01
US07/769,896 1991-10-01

Publications (1)

Publication Number Publication Date
CA2097308A1 true CA2097308A1 (fr) 1993-04-02

Family

ID=25086828

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002097308A Abandoned CA2097308A1 (fr) 1991-10-01 1992-08-03 Methode et dispositif d'interdiction d'ecriture pour memoire

Country Status (5)

Country Link
CA (1) CA2097308A1 (fr)
FR (1) FR2681965A1 (fr)
IT (1) IT1258856B (fr)
MX (1) MX9205634A (fr)
WO (1) WO1993007565A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6026293A (en) * 1996-09-05 2000-02-15 Ericsson Inc. System for preventing electronic memory tampering
JP4154006B2 (ja) * 1996-12-25 2008-09-24 富士通株式会社 半導体記憶装置
GB2356952B (en) * 1996-12-25 2001-07-25 Fujitsu Ltd Semiconductor memory device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4245344A (en) * 1979-04-02 1981-01-13 Rockwell International Corporation Processing system with dual buses
US4493031A (en) * 1982-08-25 1985-01-08 At&T Bell Laboratories Memory write protection using timers
JPS6124091A (ja) * 1984-07-12 1986-02-01 Nec Corp メモリ回路
US4742469A (en) * 1985-10-31 1988-05-03 F.M.E. Corporation Electronic meter circuitry
US4816654A (en) * 1986-05-16 1989-03-28 American Telephone And Telegraph Company Improved security system for a portable data carrier
US4843385A (en) * 1986-07-02 1989-06-27 Motorola, Inc. Electronic lock system for a two-way radio
FR2608803B1 (fr) * 1986-12-19 1991-10-25 Eurotechnique Sa Dispositif de protection d'une memoire morte effacable et reprogrammable
US5001670A (en) * 1987-02-06 1991-03-19 Tektronix, Inc. Nonvolatile memory protection
JPS63271679A (ja) * 1987-04-30 1988-11-09 Toshiba Corp デ−タ書込み方式
US4860341A (en) * 1987-06-02 1989-08-22 Motorola, Inc. Radiotelephone credit card call approval synchronization
US4970692A (en) * 1987-09-01 1990-11-13 Waferscale Integration, Inc. Circuit for controlling a flash EEPROM having three distinct modes of operation by allowing multiple functionality of a single pin
JPH0648838B2 (ja) * 1988-07-18 1994-06-22 株式会社田村電機製作所 公衆電話機
FI86922C (fi) * 1990-01-05 1992-10-26 Raha Automaattiyhdistys Foerfarande och anordning foer kontrollering av inskrivning i ett minne

Also Published As

Publication number Publication date
MX9205634A (es) 1993-04-01
IT1258856B (it) 1996-03-01
FR2681965A1 (fr) 1993-04-02
WO1993007565A1 (fr) 1993-04-15
ITRM920707A0 (it) 1992-09-28
ITRM920707A1 (it) 1994-03-28

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Legal Events

Date Code Title Description
EEER Examination request
FZDE Discontinued