CA2001298A1 - Systeme de traitement d'entree-sortie pour ordinateur virtuel - Google Patents

Systeme de traitement d'entree-sortie pour ordinateur virtuel

Info

Publication number
CA2001298A1
CA2001298A1 CA2001298A CA2001298A CA2001298A1 CA 2001298 A1 CA2001298 A1 CA 2001298A1 CA 2001298 A CA2001298 A CA 2001298A CA 2001298 A CA2001298 A CA 2001298A CA 2001298 A1 CA2001298 A1 CA 2001298A1
Authority
CA
Canada
Prior art keywords
input
virtual
virtual computer
output
identification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2001298A
Other languages
English (en)
Other versions
CA2001298C (fr
Inventor
Yasuhiko Nakashima
Yoshifumi Ogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63267529A external-priority patent/JP2610966B2/ja
Priority claimed from JP01059628A external-priority patent/JP3138985B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of CA2001298A1 publication Critical patent/CA2001298A1/fr
Application granted granted Critical
Publication of CA2001298C publication Critical patent/CA2001298C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
CA002001298A 1988-10-24 1989-10-24 Systeme de traitement d'entree-sortie pour ordinateur virtuel Expired - Fee Related CA2001298C (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP63267529A JP2610966B2 (ja) 1988-10-24 1988-10-24 仮想計算機制御方法
JP63-267529 1988-10-24
JP01059628A JP3138985B2 (ja) 1989-03-14 1989-03-14 仮想計算機
JP01-059628 1989-03-14

Publications (2)

Publication Number Publication Date
CA2001298A1 true CA2001298A1 (fr) 1990-04-24
CA2001298C CA2001298C (fr) 1996-08-27

Family

ID=26400686

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002001298A Expired - Fee Related CA2001298C (fr) 1988-10-24 1989-10-24 Systeme de traitement d'entree-sortie pour ordinateur virtuel

Country Status (5)

Country Link
EP (1) EP0366416B1 (fr)
KR (1) KR920004409B1 (fr)
AU (1) AU614673B2 (fr)
CA (1) CA2001298C (fr)
DE (1) DE68927627T2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6199137B1 (en) * 1999-01-05 2001-03-06 Lucent Technolgies, Inc. Method and device for controlling data flow through an IO controller

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0619747B2 (ja) * 1984-01-18 1994-03-16 株式会社日立製作所 Ｉ／ｏ命令実行方法、ｉ／ｏ割込処理方法およびそれらを用いた計算機システム
JPS6258341A (ja) * 1985-09-03 1987-03-14 Fujitsu Ltd 入出力割込処理方式
JPH0664537B2 (ja) * 1986-01-17 1994-08-22 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション デ−タ処理システム
US4916608A (en) * 1986-05-30 1990-04-10 International Business Machines Corporation Provision of virtual storage resources to an operating system control program
EP0282213A3 (fr) * 1987-03-09 1991-04-24 AT&T Corp. Unité de gestion de mémoire avec des contextes simultanés

Also Published As

Publication number Publication date
CA2001298C (fr) 1996-08-27
DE68927627D1 (de) 1997-02-20
EP0366416A3 (fr) 1992-04-15
DE68927627T2 (de) 1997-04-24
EP0366416B1 (fr) 1997-01-08
AU4370889A (en) 1990-07-19
KR900014990A (ko) 1990-10-25
AU614673B2 (en) 1991-09-05
EP0366416A2 (fr) 1990-05-02
KR920004409B1 (ko) 1992-06-04

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed