CA2015214A1 - Methode et dispositif de liaison rapide pour ordinateur - Google Patents
Methode et dispositif de liaison rapide pour ordinateurInfo
- Publication number
- CA2015214A1 CA2015214A1 CA2015214A CA2015214A CA2015214A1 CA 2015214 A1 CA2015214 A1 CA 2015214A1 CA 2015214 A CA2015214 A CA 2015214A CA 2015214 A CA2015214 A CA 2015214A CA 2015214 A1 CA2015214 A1 CA 2015214A1
- Authority
- CA
- Canada
- Prior art keywords
- high speed
- link
- speed link
- computer system
- system high
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Multi Processors (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/358,774 | 1989-05-30 | ||
US07/358,774 US5218677A (en) | 1989-05-30 | 1989-05-30 | Computer system high speed link method and means |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2015214A1 true CA2015214A1 (fr) | 1990-11-30 |
CA2015214C CA2015214C (fr) | 1996-01-02 |
Family
ID=23410987
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002015214A Expired - Fee Related CA2015214C (fr) | 1989-05-30 | 1990-04-23 | Methode et dispositif de liaison rapide pour ordinateur |
Country Status (4)
Country | Link |
---|---|
US (1) | US5218677A (fr) |
EP (1) | EP0400794A3 (fr) |
JP (1) | JPH0610799B2 (fr) |
CA (1) | CA2015214C (fr) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5164403A (en) * | 1991-04-05 | 1992-11-17 | G. D. Searle & Co. | N-arylheteroarylalkyl imidazol-2-one compounds for treatment of circulatory disorders |
GB2258069B (en) * | 1991-07-25 | 1995-03-29 | Intel Corp | High speed computer graphics bus |
US5167299A (en) * | 1991-11-08 | 1992-12-01 | Arthur Nusbaum | Safety net arrangement for building elevator shafts |
US5623644A (en) * | 1994-08-25 | 1997-04-22 | Intel Corporation | Point-to-point phase-tolerant communication |
US5581566A (en) * | 1995-01-06 | 1996-12-03 | The Regents Of The Univ. Of California Office Of Technology Transfer | High-performance parallel interface to synchronous optical network gateway |
JP2766216B2 (ja) * | 1995-05-08 | 1998-06-18 | 甲府日本電気株式会社 | 情報処理装置 |
US6058433A (en) * | 1996-07-23 | 2000-05-02 | Gateway 2000, Inc. | System and method for providing increased throughput through a computer serial port to a modem communications port |
US6018465A (en) * | 1996-12-31 | 2000-01-25 | Intel Corporation | Apparatus for mounting a chip package to a chassis of a computer |
US6137688A (en) * | 1996-12-31 | 2000-10-24 | Intel Corporation | Apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply |
US6516342B1 (en) | 1998-07-17 | 2003-02-04 | International Business Machines Corporation | Method and apparatus for extending memory using a memory server |
US7113560B1 (en) | 2002-09-24 | 2006-09-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Serial link scheme based on delay lock loop |
US11599384B2 (en) | 2019-10-03 | 2023-03-07 | Micron Technology, Inc. | Customized root processes for individual applications |
US11474828B2 (en) | 2019-10-03 | 2022-10-18 | Micron Technology, Inc. | Initial data distribution for different application processes |
KR20210046348A (ko) * | 2019-10-18 | 2021-04-28 | 삼성전자주식회사 | 복수의 프로세서들에 유연하게 메모리를 할당하기 위한 메모리 시스템 및 그것의 동작 방법 |
US20210157718A1 (en) * | 2019-11-25 | 2021-05-27 | Micron Technology, Inc. | Reduction of page migration between different types of memory |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54157044A (en) * | 1978-05-31 | 1979-12-11 | Fujitsu Ltd | Multiple inlet/outlet memory control system |
US4476524A (en) * | 1981-07-02 | 1984-10-09 | International Business Machines Corporation | Page storage control methods and means |
US4669043A (en) * | 1984-02-17 | 1987-05-26 | Signetics Corporation | Memory access controller |
US4860192A (en) * | 1985-02-22 | 1989-08-22 | Intergraph Corporation | Quadword boundary cache system |
US4757446A (en) * | 1986-04-01 | 1988-07-12 | Wang Laboratories, Inc. | High-speed link for connecting peer systems |
US4912636A (en) * | 1987-03-13 | 1990-03-27 | Magar Surendar S | Data processing device with multiple on chip memory buses |
-
1989
- 1989-05-30 US US07/358,774 patent/US5218677A/en not_active Expired - Fee Related
-
1990
- 1990-04-10 EP EP19900303881 patent/EP0400794A3/fr not_active Withdrawn
- 1990-04-23 CA CA002015214A patent/CA2015214C/fr not_active Expired - Fee Related
- 1990-05-29 JP JP2137328A patent/JPH0610799B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0400794A2 (fr) | 1990-12-05 |
JPH0322068A (ja) | 1991-01-30 |
CA2015214C (fr) | 1996-01-02 |
US5218677A (en) | 1993-06-08 |
EP0400794A3 (fr) | 1993-07-14 |
JPH0610799B2 (ja) | 1994-02-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA2015214A1 (fr) | Methode et dispositif de liaison rapide pour ordinateur | |
AU5394790A (en) | Method and apparatus for ordering and queuing multiple memory requests | |
AU7965794A (en) | Apparatus for accelerating processing of transactions on computer databases | |
AU5395390A (en) | Method and apparatus for interfacing a system control unit for a multiprocessor system with input/output units | |
AU641933B2 (en) | A method and a computer system for caching data | |
AU4922490A (en) | Virtual computer system having improved input/output interrupt control | |
TW325536B (en) | Method and apparatus for accessing a register in a data processing system | |
EP0520769A3 (en) | Computer system manager | |
CA2022259A1 (fr) | Methode et dispositif pour controler le lancement d'un chargement d'amorcage | |
EP0380850A3 (fr) | Prétraitement de multiples instructions | |
CA2024534A1 (fr) | Dispositif d'interfacage universel pour systeme de commande de processus industriel | |
TW234174B (en) | System and method for maintaining memory coherency | |
GB1481145A (en) | Biprogrammable electronic accounting machine | |
EP0298418A3 (fr) | Système à calculateur virtuel | |
ATE188788T1 (de) | Eingabe-ausgabe-steuerung, die eingabe/ausgabe- fenster mit adressbereichen aufweist und die fähigkeit zum vorherigen lesen und späteren schreiben besitzt | |
AU8214487A (en) | Data processing system having a bus command generated by one subsystem on behalf of another subsystem | |
GB2226478B (en) | Method and apparatus for translating rectilinear information into scan line information for display by a computer system | |
CA2070285A1 (fr) | Dispositif de generation d'instructions d'entree-sortie pour systeme de traitement de donnees | |
IL93964A (en) | Method for processing an instruction sequence in computer systems | |
CA2007691A1 (fr) | Methode et appareil de montage par processus pour fichiers de systeme de fichiers hierarchique | |
JPS56146338A (en) | Translating system of alarm signal | |
JPS6478320A (en) | Data processing system | |
JPS5595139A (en) | Interruption system as to communication controller | |
EP0132123A3 (fr) | Appareil de commande d'adresses mémoire | |
EP0366416A3 (fr) | Système de traitement entrée/sortie pour un ordinateur virtuel |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |