CA1292326C - Alignement des conducteurs de boitiers de circuits integres ceramique - Google Patents

Alignement des conducteurs de boitiers de circuits integres ceramique

Info

Publication number
CA1292326C
CA1292326C CA000592906A CA592906A CA1292326C CA 1292326 C CA1292326 C CA 1292326C CA 000592906 A CA000592906 A CA 000592906A CA 592906 A CA592906 A CA 592906A CA 1292326 C CA1292326 C CA 1292326C
Authority
CA
Canada
Prior art keywords
leads
package
braze
lead frame
alignment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA000592906A
Other languages
English (en)
Inventor
Douglas F. Palino
Kevin M. Eastman
Randall L. Schlesinger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of CA1292326C publication Critical patent/CA1292326C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
CA000592906A 1988-02-29 1989-02-27 Alignement des conducteurs de boitiers de circuits integres ceramique Expired - Fee Related CA1292326C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16191488A 1988-02-29 1988-02-29
US161,914 1988-02-29

Publications (1)

Publication Number Publication Date
CA1292326C true CA1292326C (fr) 1991-11-19

Family

ID=22583341

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000592906A Expired - Fee Related CA1292326C (fr) 1988-02-29 1989-02-27 Alignement des conducteurs de boitiers de circuits integres ceramique

Country Status (4)

Country Link
EP (1) EP0357759A1 (fr)
JP (1) JPH02501179A (fr)
CA (1) CA1292326C (fr)
WO (1) WO1989008324A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323549B1 (en) 1996-08-29 2001-11-27 L. Pierre deRochemont Ceramic composite wiring structures for semiconductor devices and method of manufacture
JP2001507867A (ja) * 1996-12-30 2001-06-12 デロシェモント，エル．ピエール 半導体装置用セラミックコンポジットワイヤ構造体及び製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4289922A (en) * 1979-09-04 1981-09-15 Plessey Incorporated Integrated circuit package and lead frame
GB2079534A (en) * 1980-07-02 1982-01-20 Fairchild Camera Instr Co Package for semiconductor devices
US4626478A (en) * 1984-03-22 1986-12-02 Unitrode Corporation Electronic circuit device components having integral spacers providing uniform thickness bonding film
JPS613434A (ja) * 1984-06-15 1986-01-09 Ricoh Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
EP0357759A1 (fr) 1990-03-14
JPH02501179A (ja) 1990-04-19
WO1989008324A1 (fr) 1989-09-08

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Legal Events

Date Code Title Description
MKLA Lapsed