CA1288522C - Methode et dispositif pour determiner l'espace restant en memoire - Google Patents

Methode et dispositif pour determiner l'espace restant en memoire

Info

Publication number
CA1288522C
CA1288522C CA000562911A CA562911A CA1288522C CA 1288522 C CA1288522 C CA 1288522C CA 000562911 A CA000562911 A CA 000562911A CA 562911 A CA562911 A CA 562911A CA 1288522 C CA1288522 C CA 1288522C
Authority
CA
Canada
Prior art keywords
address
memory
cpu
bank
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA000562911A
Other languages
English (en)
Inventor
Michael Dhuey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Apple Inc
Original Assignee
Apple Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/048,362 external-priority patent/US4926314A/en
Application filed by Apple Computer Inc filed Critical Apple Computer Inc
Application granted granted Critical
Publication of CA1288522C publication Critical patent/CA1288522C/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0684—Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CA000562911A 1987-05-11 1988-03-30 Methode et dispositif pour determiner l'espace restant en memoire Expired - Lifetime CA1288522C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/048,362 US4926314A (en) 1987-03-17 1987-05-11 Method and apparatus for determining available memory size
US048,362 1987-05-11

Publications (1)

Publication Number Publication Date
CA1288522C true CA1288522C (fr) 1991-09-03

Family

ID=21954176

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000562911A Expired - Lifetime CA1288522C (fr) 1987-05-11 1988-03-30 Methode et dispositif pour determiner l'espace restant en memoire

Country Status (5)

Country Link
AU (1) AU616653B2 (fr)
CA (1) CA1288522C (fr)
GB (1) GB2204721B (fr)
HK (1) HK53092A (fr)
SG (1) SG41592G (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2639731A1 (fr) * 1988-11-30 1990-06-01 Europ Rech Electr Lab Ordinateur et procede de gestion de memoire d'un ordinateur
EP0419869A3 (en) * 1989-09-29 1992-06-03 Kabushiki Kaisha Toshiba Personal computer for accessing two types of extended memories having different memory capacities
US5241663A (en) * 1990-05-31 1993-08-31 Sony Corporation Hierarchically pairing memory blocks based upon relative storage capacities and simultaneously accessing each memory block within the paired memory blocks
US5311520A (en) * 1991-08-29 1994-05-10 At&T Bell Laboratories Method and apparatus for programmable memory control with error regulation and test functions
EP0535537A3 (en) * 1991-09-30 1993-04-21 Kabushiki Kaisha Toshiba Computer system with a cache memory
US5386383A (en) * 1994-02-28 1995-01-31 At&T Corp. Method and apparatus for controlling dynamic random access memory devices
CN113724772A (zh) * 2021-07-12 2021-11-30 深圳市美信咨询有限公司 存储器失效位置查找方法、装置和计算机设备

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3815103A (en) * 1973-01-02 1974-06-04 Honeywell Inf Systems Memory presence checking apparatus
GB2101370A (en) * 1981-06-26 1983-01-12 Philips Electronic Associated Digital data apparatus with memory interrogation
US4468729A (en) * 1981-06-29 1984-08-28 Sperry Corporation Automatic memory module address assignment system for available memory modules
IT1142074B (it) * 1981-11-24 1986-10-08 Honeywell Inf Systems Sistema di elaborazione dati con allocazione automatica dell'indirizzo in una memoria modulare
US4679167A (en) * 1983-07-29 1987-07-07 Hewlett-Packard Company Apparatus for locating a memory module within a memory space
NZ209664A (en) * 1983-09-29 1987-05-29 Tandem Computers Inc Memory board address assignments: automatic reconfiguration
AU579725B2 (en) * 1985-05-02 1988-12-08 Digital Equipment Corporation Arrangement for expanding memory capacity
CA1234224A (fr) * 1985-05-28 1988-03-15 Boleslav Sykora Systeme de gestion de memoire d'ordinateur

Also Published As

Publication number Publication date
GB2204721A (en) 1988-11-16
AU1471488A (en) 1988-11-17
GB2204721B (en) 1991-10-23
SG41592G (en) 1992-06-12
AU616653B2 (en) 1991-11-07
HK53092A (en) 1992-07-24
GB8802299D0 (en) 1988-03-02

Similar Documents

Publication Publication Date Title
US4926314A (en) Method and apparatus for determining available memory size
KR960011959B1 (ko) 반도체 메모리 장치
US4951248A (en) Self configuring memory system
US6049505A (en) Method and apparatus for generating memory addresses for testing memory devices
US5781717A (en) Dynamic spare column replacement memory system
US5231605A (en) DRAM compressed data test mode with expected data
CA1234224A (fr) Systeme de gestion de memoire d'ordinateur
US6285607B1 (en) Memory system
US4654787A (en) Apparatus for locating memory modules having different sizes within a memory space
US4831522A (en) Circuit and method for page addressing read only memory
US6226736B1 (en) Microprocessor configuration arrangement for selecting an external bus width
EP1183606A1 (fr) Mise en correspondance d'adresses dans un dispositif de stockage transistorise
CA1291269C (fr) Verification efficace des adresses dans les memoires de grande capacite
NZ209664A (en) Memory board address assignments: automatic reconfiguration
US5640507A (en) Method and apparatus for identifying read only memory
US5357624A (en) Single inline memory module support system
US5179686A (en) Method for automatically detecting the size of a memory by performing a memory warp operation
CA1288522C (fr) Methode et dispositif pour determiner l'espace restant en memoire
US4679167A (en) Apparatus for locating a memory module within a memory space
US6240532B1 (en) Programmable hit and write policy for cache memory test
US5450366A (en) IC memory card
JPS5979367A (ja) メモリ・マネジメント装置
US5253354A (en) Row address generator for defective DRAMS including an upper and lower memory device
JPH04213130A (ja) システムメモリ初期設定システム
KR100612127B1 (ko) 메모리 모듈 테스트 방법 및 이를 위한 메모리 모듈의 허브

Legal Events

Date Code Title Description
MKLA Lapsed