CA1207878A - Method for sputtering a pin microcrystalline/ amorphous silicon semiconductor device - Google Patents

Method for sputtering a pin microcrystalline/ amorphous silicon semiconductor device

Info

Publication number
CA1207878A
CA1207878A CA000461876A CA461876A CA1207878A CA 1207878 A CA1207878 A CA 1207878A CA 000461876 A CA000461876 A CA 000461876A CA 461876 A CA461876 A CA 461876A CA 1207878 A CA1207878 A CA 1207878A
Authority
CA
Canada
Prior art keywords
silicon
layer
type
sputtering
doped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000461876A
Other languages
English (en)
French (fr)
Inventor
Theodore D. Moustakas
H. Paul Maruska
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ExxonMobil Technology and Engineering Co
Original Assignee
Exxon Research and Engineering Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Exxon Research and Engineering Co filed Critical Exxon Research and Engineering Co
Application granted granted Critical
Publication of CA1207878A publication Critical patent/CA1207878A/en
Expired legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02425—Conductive materials, e.g. metallic silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/868—PIN diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Photovoltaic Devices (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
CA000461876A 1983-09-26 1984-08-27 Method for sputtering a pin microcrystalline/ amorphous silicon semiconductor device Expired CA1207878A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/535,902 US4508609A (en) 1983-09-26 1983-09-26 Method for sputtering a PIN microcrystalline/amorphous silicon semiconductor device with the P and N-layers sputtered from boron and phosphorous heavily doped targets
US535,902 1983-09-26

Publications (1)

Publication Number Publication Date
CA1207878A true CA1207878A (en) 1986-07-15

Family

ID=24136273

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000461876A Expired CA1207878A (en) 1983-09-26 1984-08-27 Method for sputtering a pin microcrystalline/ amorphous silicon semiconductor device

Country Status (5)

Country Link
US (1) US4508609A (de)
EP (1) EP0139488A1 (de)
JP (1) JPS6091627A (de)
AU (1) AU3350784A (de)
CA (1) CA1207878A (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3417732A1 (de) * 1984-05-12 1986-07-10 Leybold-Heraeus GmbH, 5000 Köln Verfahren zum aufbringen von siliziumhaltigen schichten auf substraten durch katodenzerstaeubung und zerstaeubungskatode zur durchfuehrung des verfahrens
JPS62163324A (ja) * 1986-01-14 1987-07-20 Rohm Co Ltd オ−ミツクコンタクトの形成方法
JPH0654767B2 (ja) * 1986-01-24 1994-07-20 ロ−ム株式会社 半導体装置の製造方法
US5192393A (en) * 1989-05-24 1993-03-09 Hitachi, Ltd. Method for growing thin film by beam deposition and apparatus for practicing the same
US5213670A (en) * 1989-06-30 1993-05-25 Siemens Aktiengesellschaft Method for manufacturing a polycrystalline layer on a substrate
KR930005238B1 (ko) * 1990-10-25 1993-06-16 현대전자산업 주식회사 금속박막의 평탄화 형성방법
TW237562B (de) * 1990-11-09 1995-01-01 Semiconductor Energy Res Co Ltd
DE69222664T2 (de) * 1991-01-11 1998-03-12 Canon Kk Photoelektrische Umwandlungsvorrichtung und Verwendung derselben in einem Bildverarbeitungsgerät
US6979840B1 (en) * 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
US6362097B1 (en) 1998-07-14 2002-03-26 Applied Komatsu Technlology, Inc. Collimated sputtering of semiconductor and other films
US6587097B1 (en) 2000-11-28 2003-07-01 3M Innovative Properties Co. Display system
JP5411481B2 (ja) * 2008-10-22 2014-02-12 国立大学法人東北大学 マグネトロンスパッタ装置
US9112103B1 (en) 2013-03-11 2015-08-18 Rayvio Corporation Backside transparent substrate roughening for UV light emitting diode
DE102020001980A1 (de) * 2020-03-26 2021-09-30 Singulus Technologies Ag Verfahren und Anlage zur Herstellung eines Ausgangsmaterials für eine Siliziumsolarzelle mit passivierten Kontakten

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2461763A1 (fr) * 1979-07-20 1981-02-06 Commissariat Energie Atomique Procede d'elaboration de couches de silicium amorphe fluore par la methode de pulverisation cathodique
US4417092A (en) * 1981-03-16 1983-11-22 Exxon Research And Engineering Co. Sputtered pin amorphous silicon semi-conductor device and method therefor
JPS57187971A (en) * 1981-05-15 1982-11-18 Agency Of Ind Science & Technol Solar cell
US4483911A (en) * 1981-12-28 1984-11-20 Canon Kabushiki Kaisha Photoconductive member with amorphous silicon-carbon surface layer

Also Published As

Publication number Publication date
EP0139488A1 (de) 1985-05-02
AU3350784A (en) 1985-04-04
JPS6091627A (ja) 1985-05-23
US4508609A (en) 1985-04-02

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