CA1167968A - Method and apparatus for encoding and decoding digital information - Google Patents

Method and apparatus for encoding and decoding digital information

Info

Publication number
CA1167968A
CA1167968A CA000367992A CA367992A CA1167968A CA 1167968 A CA1167968 A CA 1167968A CA 000367992 A CA000367992 A CA 000367992A CA 367992 A CA367992 A CA 367992A CA 1167968 A CA1167968 A CA 1167968A
Authority
CA
Canada
Prior art keywords
transition
binary bits
value
successive
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000367992A
Other languages
English (en)
French (fr)
Inventor
Masato Tanaka
Shunsuke Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of CA1167968A publication Critical patent/CA1167968A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
CA000367992A 1980-01-17 1981-01-07 Method and apparatus for encoding and decoding digital information Expired CA1167968A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3929/80 1980-01-17
JP392980A JPS56101614A (en) 1980-01-17 1980-01-17 Binary code converting method

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CA000435841A Division CA1171180A (en) 1980-01-17 1983-08-31 Method and apparatus for encoding and decoding digital information

Publications (1)

Publication Number Publication Date
CA1167968A true CA1167968A (en) 1984-05-22

Family

ID=11570819

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000367992A Expired CA1167968A (en) 1980-01-17 1981-01-07 Method and apparatus for encoding and decoding digital information

Country Status (2)

Country Link
JP (1) JPS56101614A (sv)
CA (1) CA1167968A (sv)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06133690A (ja) * 1992-03-16 1994-05-17 Suzuki Tekkosho:Kk 底竹着脱式茶葉粗揉機
JPH06225699A (ja) * 1992-10-16 1994-08-16 Suzuki Tekkosho:Kk 揉底分割着脱式製茶機

Also Published As

Publication number Publication date
JPS56101614A (en) 1981-08-14
JPS635826B2 (sv) 1988-02-05

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Legal Events

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