CA1164107A - Methode de fabrication d'un semiconducteur - Google Patents

Methode de fabrication d'un semiconducteur

Info

Publication number
CA1164107A
CA1164107A CA000368125A CA368125A CA1164107A CA 1164107 A CA1164107 A CA 1164107A CA 000368125 A CA000368125 A CA 000368125A CA 368125 A CA368125 A CA 368125A CA 1164107 A CA1164107 A CA 1164107A
Authority
CA
Canada
Prior art keywords
forming
layer
polysilicon
element site
site
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000368125A
Other languages
English (en)
Inventor
Tsiu C. Chan
Charles B. Johnson
Ian A. Young
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTU of Delaware Inc
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Application granted granted Critical
Publication of CA1164107A publication Critical patent/CA1164107A/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
CA000368125A 1980-01-11 1981-01-08 Methode de fabrication d'un semiconducteur Expired CA1164107A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11127580A 1980-01-11 1980-01-11
US111,275 1980-01-11

Publications (1)

Publication Number Publication Date
CA1164107A true CA1164107A (fr) 1984-03-20

Family

ID=22337549

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000368125A Expired CA1164107A (fr) 1980-01-11 1981-01-08 Methode de fabrication d'un semiconducteur

Country Status (3)

Country Link
EP (1) EP0043372A1 (fr)
CA (1) CA1164107A (fr)
WO (1) WO1981002074A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE470415B (sv) * 1992-07-06 1994-02-14 Ericsson Telefon Ab L M Kondensator med hög kapacitans i ett integrerat funktionsblock eller en integrerad krets, förfarande för framställning av kondensatorn och användning av kondensatorn som en integrerad avkopplingskondensator

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012995B1 (fr) * 1970-02-09 1975-05-16
US3899363A (en) * 1974-06-28 1975-08-12 Ibm Method and device for reducing sidewall conduction in recessed oxide pet arrays
US4183040A (en) * 1976-02-09 1980-01-08 International Business Machines Corporation MOS RAM with implant forming peripheral depletion MOSFET channels and capacitor bottom electrodes
JPS52102690A (en) * 1976-02-25 1977-08-29 Hitachi Ltd Semiconductor capacitance device
JPS54136279A (en) * 1978-04-14 1979-10-23 Nec Corp Semiconductor device
US4182636A (en) * 1978-06-30 1980-01-08 International Business Machines Corporation Method of fabricating self-aligned contact vias

Also Published As

Publication number Publication date
EP0043372A1 (fr) 1982-01-13
WO1981002074A1 (fr) 1981-07-23

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Legal Events

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