CA1153804A - Device for the synchronization of a timing signal - Google Patents

Device for the synchronization of a timing signal

Info

Publication number
CA1153804A
CA1153804A CA000352979A CA352979A CA1153804A CA 1153804 A CA1153804 A CA 1153804A CA 000352979 A CA000352979 A CA 000352979A CA 352979 A CA352979 A CA 352979A CA 1153804 A CA1153804 A CA 1153804A
Authority
CA
Canada
Prior art keywords
output
input
coupled
signal
timing signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000352979A
Other languages
English (en)
French (fr)
Inventor
Alain Dautremay
Jean M. Boljevic
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Application granted granted Critical
Publication of CA1153804A publication Critical patent/CA1153804A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0004Initialisation of the receiver

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
CA000352979A 1979-06-01 1980-05-29 Device for the synchronization of a timing signal Expired CA1153804A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR7914178 1979-06-01
FR7914178A FR2458181A1 (fr) 1979-06-01 1979-06-01 Dispositif de synchronisation d'un signal d'horloge et systemes de transmission de donnees synchrones comportant un tel dispositif

Publications (1)

Publication Number Publication Date
CA1153804A true CA1153804A (en) 1983-09-13

Family

ID=9226164

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000352979A Expired CA1153804A (en) 1979-06-01 1980-05-29 Device for the synchronization of a timing signal

Country Status (6)

Country Link
US (1) US4352195A (show.php)
EP (1) EP0020205B1 (show.php)
CA (1) CA1153804A (show.php)
DE (1) DE3064097D1 (show.php)
FR (1) FR2458181A1 (show.php)
IL (1) IL60181A (show.php)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2527031A1 (fr) * 1982-05-17 1983-11-18 Sintra Alcatel Sa Circuit d'acquisition de l'horloge d'un message binaire code en nrz
US4604582A (en) * 1985-01-04 1986-08-05 Lockheed Electronics Company, Inc. Digital phase correlator
JPH084262B2 (ja) * 1986-03-31 1996-01-17 日本電気株式会社 ビツト同期回路及び方法
US4912734A (en) * 1989-02-14 1990-03-27 Ail Systems, Inc. High resolution event occurrance time counter
US4979177A (en) * 1989-10-26 1990-12-18 Tektronix, Inc. Enhanced counter/timer resolution in a logic analyzer
FR2781943B1 (fr) * 1998-07-30 2000-09-15 Thomson Multimedia Sa Procede de recuperation d'horloge lors de l'echantillonnage de signaux de type numerique
DE10018190C2 (de) * 1999-05-18 2003-04-17 Ibm Unterbrechnungsloses Umschalten zwischen zwei Oszillator-Präzisionstaktgebern
US11455002B1 (en) * 2021-05-27 2022-09-27 Cirrus Logic, Inc. Timing signal synchronisation

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1422959A (fr) * 1964-11-13 1966-01-03 Thomson Houston Comp Francaise Perfectionnements aux dispositifs d'asservissement en phase
US3440547A (en) * 1966-04-11 1969-04-22 Bell Telephone Labor Inc Synchronizer for modifying the advance of timing wave countdown circuits
US3562661A (en) * 1969-01-15 1971-02-09 Ibm Digital automatic phase and frequency control system
US3755748A (en) * 1972-03-06 1973-08-28 Motorola Inc Digital phase shifter/synchronizer and method of shifting
FR2301964A1 (fr) * 1975-02-21 1976-09-17 Telecommunications Sa Horloge numerique synchronisee
CA1057860A (en) * 1976-01-08 1979-07-03 Sperry Rand Corporation Two mode harmonic and nonharmonic phase detector
US4229822A (en) * 1977-09-06 1980-10-21 Motorola, Inc. Data detector for a data communication system

Also Published As

Publication number Publication date
DE3064097D1 (en) 1983-08-18
IL60181A (en) 1982-11-30
IL60181A0 (en) 1980-07-31
EP0020205A1 (fr) 1980-12-10
EP0020205B1 (fr) 1983-07-13
FR2458181A1 (fr) 1980-12-26
FR2458181B1 (show.php) 1985-04-05
US4352195A (en) 1982-09-28

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Legal Events

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