CA1140661A - Method of cleaving semiconductor diode laser wafers - Google Patents

Method of cleaving semiconductor diode laser wafers

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Publication number
CA1140661A
CA1140661A CA000337513A CA337513A CA1140661A CA 1140661 A CA1140661 A CA 1140661A CA 000337513 A CA000337513 A CA 000337513A CA 337513 A CA337513 A CA 337513A CA 1140661 A CA1140661 A CA 1140661A
Authority
CA
Canada
Prior art keywords
wafer
cleaving
substrate
grooves
diodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000337513A
Other languages
French (fr)
Inventor
Geoffrey R. Woolhouse
Harold A. Huggins
David W. Collins
Stephen J. Anderson
Frederick R. Scholl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Optical Information Systems Inc
Original Assignee
Optical Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/951,074 external-priority patent/US4236296A/en
Priority claimed from US05/951,064 external-priority patent/US4237601A/en
Application filed by Optical Information Systems Inc filed Critical Optical Information Systems Inc
Application granted granted Critical
Publication of CA1140661A publication Critical patent/CA1140661A/en
Expired legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds
    • H01L21/30617Anisotropic liquid etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/002Devices characterised by their operation having heterojunctions or graded gap
    • H01L33/0025Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0201Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0201Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
    • H01S5/0202Cleaving

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Dicing (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

ABSTRACT OF THE DISCLOSURE

Double heterostructure (Al,Ga)As wafers comprising layers of gallium arsenide and aluminum gallium arsenide on a metallized n-GaAs substrate are separated into individual devices for use as diode lasers. In contrast to prior art techniques of mechanically cleaving the wafer in mutually orthogonal directions, the wafer is first separated into bars of diodes by a process which comprises (a) etching into the n-GaAs substrate with an anisotropic etchant to form V-grooves in the wafer and (b) mechanically cleaving into bars of diodes. The cleaving may be done by prior art techniques using a knife, razor blade or tweezer edge or by attaching the side of the wafer opposite to the V-grooves to a flexible adhesive tape and rolling the assembly, such as over a tool of small radius. For separating thin wafers (about 3 to 5 mils thick), prior to the anisotropic etching, the wafers are processed by forming an array of exposed lines on the n-side by photolithography to define the lasing ends of the diodes and etching through the exposed metallized portion to expose portions of the underlying N-GaAs. The exposed portions of the wafer are then anisotropically etched to a distance of about 1 to 2 mils less than the total thickness of the wafer. For separating thicker wafers (about 6 to 10 mils thick), prior to the anisotropic etching, the wafers are processed by forming channels of substantially parallel sidewalls about 1 to 4 mils deep into the surface of the n-GaAs substrate. The wafer is then anisotropically etched to a depth sufficient to form V-grooves in the bottom of the channels. Advant-ageously, such thicker wafers, which are cleaved only with great difficulty by prior art techniques, are less susceptible to breaking during handling and permit fabrication of shorter diode (cavity) length, which in turn is related to lower threshold current for device operation. The diode bars may then, following passivation, be further cleaved into individual diodes by the prior art techniques of mechanically scribing and cleaving. Processing in accordance with the invention improves length definition and uniformity, increases device yields and reduces striations on lasing facets, as compared with prior art techniques.

Description

6~9L
.
2 1. Field of the Inven~ion
3 The invention is related to diode lasers3 and more
4 particularly, to separating diode lasers from wafers.
2. Discussion of che Prior Art 6 Coherent light-emitting diodes having a GaAs-(Al,Ga)As 7 double heterostructure, such as described in "Semiconductor 8 Lasers and Heterojunction LED's" by H. Kressel and J~ Ka 9 Butler, Academic Press, New York, 1977, are known to be efficient light sources for optical communications systems.
11 As is well-known, such diode lasers comprise 12 layers of GaAs and (Al,Ga)As on an n-&aAs substra-te. The 13 final layer is a cap layer of p-GaAsO Metallized stripes, 14 parallel to the intended direction of lasing, are deposi~ed on the p-side of the waferO Gold contacc pads, somewha-t 16 smaller in area than the Ln~ended size of ~he diode laser, are 17 deposited on the n side of the wafer. The stripes and pads 18 are for subsequent connection to an external electrical source~
19 The wafer is then cut in two mutually orthogonal ~O directions to form the individual diodes. First, the wafer 21 is cuc perpendicular to the intended lasing ~ace~s in~o bars 22 of diodes. Then the bars of diodes, following ~assivation 23 o lasLng facets, are cu~ into individual diodes.
24 Cutting of the waer into bars is generally accom-plished by cleaving the ~afer through the substrate side, 26 using an instrument such as a razor blade, knife, scalpel 27 blade or the like. Control over length of -~he diode laser 28 is consequently poor, and variation of diode laser length is 29 great, wi~h the resul~ thac longi,udinal mode discribution - 2 - ~ ~4~ 6~

1 and threshold curren-~ vary considerably from one diode 2 laser to the next. Furcher, the gold contact pads must 3 be kept thin in order ~o permit xeasonably clean cleaving.
4 Also, the thickness of the substraLe is constrained in order to promote better cleaving. This of~en limits useful 6 wafer thicknesses to about 3 to 5 mils. Ye~., such ,hin 7 wafers are suscep~ible to breaking during handling. Finally, 8 striations genera-~ed by the mechanical cleaving, if across 9 the active lasing region, affec~ device yield, since such devices are consequen~ly prone ~o degradationO
11 SUMM~RY OF THE INVENTION
12 In accordance with ~he invention, a wafer comiris-13 ing a semiconductor substrate, at leas~ a portion of one 14 surface of which is me~allized, and a plurality of semicon-duc~or layers deposited on a~ leas~ a portion of the opposite 16 surface, at least one of which layers when appropriately 17 biased generates coherent electromagnecic radiation, is 18 cleaved into bars of diodes by a process which comprises 19 (a) etchLng into the substrate wi~h an anisotropic e~chan~ to form V~grooves in the wafer and (b) mechanically cleaving 21 in~o bars of diodes.
22 For separating thin wafers (about 3 to 5 mils thick)~
23 prior to the anisotropic etchingJ the wafers are processed 24 by forming an array of exposed lines on ~he metallized sub-strate by photolithography to define lasing ends of the 26 diodes and etching through the exposed metallized portions to 27 expose portions of the underlying substrate. The exposed 28 portions of the wafer are then aniso~ropically etched to a 29 distance of about 1 to 2 mils Less chan che total thickness of the wafer.
31 For separating thicker wafers (about 6 to 10 mils 32 thick~, prior tO the anisocropic etching, the wafers are 33 processed by forming channels of subsLantially parallel 34 sidewalls to about 1 to 4 mils deep in the surface of che n-substrate. The wafer is then aniso~ropically ecched to a 36 depth sufficient to form V-grooves in the botto~ of the channelsO

1 1 4(~

1 As a consequence of the process of the invention, 2 good cleavage con~rol, substantially damage-free facets along 3 the plane of cleaving and substantially uniform definition of 4 diode laser length are ob-tained. Further, cleaving in accord-ance with the invention increases device yield by at leas~
6 50%, as compared with prior art techniques.
7 BRIEF DESCRIPTION OF THE DRAW~G
8 FIGS. la and lb, in perspective, depict a portion 9 of a thin wafer following etching of V-grooves in accordance with the invention prior ~o final mechanical cleaving;
11 FIGS. 2a` and 2b are pho~omicrographs of lasing 12 facets of, respec~ively, a diode laser formed by cleaving in 13 accordance with prior art procedures, showing striations 14 (damage) resultinO rom clea~age, and a diode laser formed by cleaving a thin wafer in accordance with the inventionJ
16 showing substantial absence of stria~ions;
17 FIGS. 3a and 3b, in perspective, depict a portion of 18 a ~hick wafer following forma~ion of channels and e~ching of 19 V-grooves in accordance with the invention prior to mechanical cleaving into diode bars, and 21 FIGS. 4a and 4b depict a portion of a thick wafer 22 in cross-section, following formation of channels and V-23 grooves, respectively.

The description that follows is given generally 26 in terms of double heterostructure (DH) (Al,Ga)As diode 27 lasers having a s~ripe geometry. However, it will be 28 appreciated tha~ other configurations and other geometries 29 of both gallium arsenide diode lasers, as well as other semi-conductor diode lasers, may also be beneficially processed 31 following the teachings herein. Specific configurations of 32 devices may generate coherent electromagnetic radia~ion in 33 the W, visible or IR regions.
34 FIGS. la, lb, 3a and 3b depict a porcion of a wafer, considerably enlarged for purposes of illustra~ion, from 36 which a pluralicy of DH diode lasers are to be fahrica~ed.

- 4 ~

1 FIGS. la and 3a show the wafer n-side down, while FIGS.
2 lb and 3b show the wafer p-si~e downO The wafer includes 3 an n--~ype GaAs substrate 10, on at least a portion of which 4 are normally grown four successive layers 11, 12J 13 and 14, respectivelyJ of n~(Al,Ga)AsJ p-GaAsJ p-(Al,~a)As and 6 p-GaAs. Layers 11 and 12 from a p-n junction r~gion 15, 7 with central areas 16 in layer 12 providing light-emitting 8 areas. The layers are conveniently formed one over the 9 other in one run by liquid phase epicaxy, using conventional diffusion techniques and a horizontal sliding boat apparatus 11 containing four melts, as is well-known. Mecal electrodes 12 17 in the form of stripes parallel to the intended direc~ion 13 of lasing are deposited through conventional phoLolithography 14 techniques onto top layer 14 and provide means for external lS contact. A metal layer 18 is deposi~ed on at least a por~ion 16 of the bottom of the substrate 10. Gold pads 19, somewhat 17 smaller in area than the intended device~ are formed on layer 18 18, and provide means for external co~act. When cleaved 19 nto individual devices, as shown by dotted lines 20, planar mirror facets are formed along (110) planesO When current 21 above a threshold value from a battery 21 is sent through a 22 selected electrode 17, light L is emitted from the facet on 23 the p-n junction 16, such p-n junction lying in a plane that is 24 perpendicular to Lhe dire~tion of current flow from electrode 17 to ,electrode 18. That is, ~he cavity of ~he laser struccure 26 is bounded by the two cleaved facets, and the laser light ls 27 emitted from the facets in a direction approximately per-28 pendicular to the direction of current flow. The necessary 29 reflectivity at the cavicy facets is provided by the dis-continuity of the index of refrac~ion between the semicon-31 ducting materials and air~
32 In the typical fabrication of DH (Al,Ga)As diode 33 lasers, the wafer comprises a substrate 10 of n-GaAs, typi-34 cally about 3 to 5 mi}s thick and having a carrier concentra-.ion ranging from abouL 1 co 3 x 1013 cm~3, usually doped 36 with silicon.

_ 5 ~ 6~

1 Alternatively, the wafer comprises a substrate 10a of 2 n-GaAs at least about 6 mils thick9 and preferably 6 ~o 3 10 mils thick, having the indicated carrier concentration.
4 Layers 11 and 13 of n-(Al,Ga)As and p-(Al,Ga)As, S respectively, are typically about 0.75 to 2~ m thic~ with 6 both layers having a value of x (AlxGal xAs) of about 0.30 7 to 0.35. Layer 11 is typically d~ped with tin, while layer 8 13 is typically doped with germanium. Active layer 12, of 9 either p-GaAs or p-(Al,Ga)As, is typically about 0.1 to 0.3 ~ m thick and is undoped. If layer 12 is p-(Al,Ga)As, 11 then the value of y (AlyGal yAs) ranges from about 0.05 to 12 0.10. Cap layer 14 of p-GaAs is typically about 0.2 to 13 0.5 ~ m thick and provides a layer to which ohmic contact 14 may be made. The carrier ooncentration of layer 14, provided by germanium, is typically about 1 to 3 x 1019 cm~3. Metallic 16 ohmic contacts 17 in stripe form are deposited onto layer 14 17 by conventional photolithographic techniques employing elec-18 troless nickel plating having a thickness ranging from about 19 0.05 to 0.07~m~ followed by about 1000 A of electroplated gold. Ohmic contact 18 is formed by evaporation of, e.g., 21 3% silver/97% tin alloy onto the bottom of substrate 10 and 22 typically has a ~hickness ranging from about 0.18 to 0.20~m.
23 Gold pads 19, formed by electroplating through a photoresist 24 mask, typically are about 2 to 3~m thick.
Following the ~oregoing procedure, the wafer is 26 first cleaved into baxs of diodes by cleaving the wafer 27 through the substrate side, perpendicular to lasing facets, 28 along lines 20, which are between gold pads 19. However, 29 the regions covered by the gold pads are locally strained, and cleavage is unpredictable, with the consequence that 3L prior art mechanical cleaving techniques such as a knife, 32 razor blade or other instrument, result in diode bars of 33 uneven length. Variations in diode laser length affect longi-34 tudinal mode distribution and threshold current, with the resul~ that these values can differ considerably for diode 36 lasers taken from different locations on the same wafer.

- 6 ~ 6 ~ ~

1 Further~ the diode bars are subsequently placed in a 2 fixture for evaporation of a film of Alz03 of about 3 1200 ~ in thickness to passivate lasing facents. If .he 4 diode bars are too long (as measured between lines 20 in FIGS. la and 3a), then the diode bars canno~ be placed in the 6 fixture. If too short, then, due ~o a shadowing effect, 7 the lasing facets are not properly passivated.
8 Another consequence of prior art mechanical 9 cleaving is thac the gold pads must be kept thin, as must che substrate, in order to maximize yield of diode lasers.
11 Yet, thin gold pads are bonded to only with difficulty 12 when connecting one end of an external lead, and chin 13 subs~rates render handling of the wafer difficult. Fu~ther, 14 such mechanical cleavage often generaces s-triacions (damage), which, whe~ formed across the active region, can lead co 16 increased degrada~ion of the devicesJ with consequen~ low 17 device yield. Such striations are shown in FIG. 2a, which is 18 a photomicrograph of a facet cleaved in accordance with prior 19 art techniques.
In accordance with one aspect of the inventionJ
21 variation in diode laser length in chin wafers (e.g.J 3 to 22 5 mils thick) is minimized by the followlng procedure. An 23 array of exposed lines on the n-side of the wafer is formed 24 by conventional photolithographic techniques. The lines or channels expose n-side metallized contact layer 18. The 26 exposed portions of the m~allized layer are then etched 27 through with an etchant which selec~ively etches the metal 28 without etching the semiconductor material. For exampleJ
29 for a contacting layer 18 of 3% Ag-97% Sn having a thickness of about 0.18 to 0.20 ~ m, etching is conveniently performed 31 in about 10 minutes employing concencrated H~l. Grooves 32 are ~hen etched into the exposed portions of che substra.e 33 with a preferential etchant that forms V-grooves 22. Where 34 the substrate is gallium arsenide, an example of such an etchant comprises a solution of H2S04, H22 and ~2- The 36 exact details of a successful etchant for producing a V-groove :`

~ 7 ~ 6~

1 22 as shown in FIGS. la and lb are described in a paper 2 entitled "Selective Etching of Gallium Arsenide Crystals 3 in H2S04-H20z-H20 Systems" by S. Iida et al in Volume 118J
4 Electrochemical Society Journal, pages 768-771 (1971) and forms no part of this invention. An example of an e~chant 6 that produces a V-groove is lH2S04-8H202-lH20J in which the 7 concentration of H2S04 is a 98% solution by weigh~ and 8 the concentration of H202 is a 30% solurion by weight, 9 whereas the formula concentration is by volume. The 1-8-1 solution, at a temperature of 25C, is able co etch through 11 the GaAs layer at a rate of about 4 ~ m/min. The e~chant 12 in this concentration produces a Y-shaped channel in GaAs 13 with sidewalls having an angle of 5444' with respect to 14 the plane of the wafer when ~he ecch is performed on the (0~1) surface along the <011> direction which gives V-grooves.
16 The etching solution is quenched as soon as the desired 17 amoun~ of etching has taken place. O~her etchants, whecher 18 chemical or gaseous, which also give rise to similar 19 V-grooves, may also be employed. A rela~ively steep sidewall, such as 5444', is preferred to shallower sidewalls of, 21 say, less than 45, in order ~o conserve substrate ma~erial 22 on the etched side of the wafer.
23 Of course, the rate of etching can be increased ~y 24 increaslng the temperature of the etchant. The etchant is 2~ selective according to the cryscal orientation o~ the materialJ
26 as described above. Thus, the orientation of .he wafer 27 should ~e such tha. a V-groove configuration is obtained, 28 rather than a round bottom configura.ion. The reason for 29 chis is that the bottom of the V-groove provides a precise loca~ion for initiation of cleaving, which in turn results 31 in fabrica~ion of individual diode lasers of precise length.
32 The etching is carried ouc to a depth of abouc 1 33 to 2 mils less than the total thickness of the wafer. If 34 the etching is not deep enough, then cleavage is more dif-ficult, since a cleavage plane is not well-defined and 36 cleavage s.riations are more likely .o occur across 'asing - 8 ~ 4~

1 facets, as wi h prior ar~ techniques. If the ecching is 2 too deep, then cleaving is initiated beyond the substrate and 3 in the region of the epitaxial layers, and will not resul~
4 in a mirror face~
Following etching~ which, as shown in FIGS. la 6 and lb produces a V-groove 22, the wafer is mechanically 7 cleaved by rolling or other means so as to produce cleavages 8 along lines 20. A knife, razor blade or other sharp instru-9 ment may be used from the n-side for cleaving, resulting in diode bars of prescribed uniform length with good cleaved 11 surfaces. Alternatively, a convenient technique is to 12 mountthe wafer~ p-side up, on a flexible adhesive tape and 13 roll the assembly over a small radius toolJ such as dis-14 closed in U.S. Paten~ 3,497,948. Most preferred is ~o simply cleave from ~he p-side by pressing down over the V-grooves 16 with a blunt instrument, such as a tweezer edge. This 17 method is fast and accurate. The combination of etching 18 V-grooves in the substra~e to the specified depth range, 19 followed by mechanical cleavage, xesults in substantially striation-free facets, as shown in FIG. 2b.
21 While thicker substrates are desirable, the 22 typical thicknesses of 3 to 5 mils for substrates are the 23 resul~ of the constraints posed by prior art techniques of 24 cleaving wafers. Such thin wafersJ however, are very fragile and of~en break during handlingO The inventive ~echnique 26 discussed in further detail below is particularly useful 27 for thicker wafers, such as on che order to 6 to 10 mils and 28 thicker, after fabrication to form the oh~ic contacts as 29 described above.
Thus, in accordance with another aspect of the 31 invention, diode lasers are fabricated from relatively thick 32 wafers (e.g., 6 to 10 mils thick) by the following procedureO
33 A channel 24 of substantially parallel sidewalls is formed 34 in the exposed surface of the n-substrate, as shown in cross section Ln FIG 4a. The channels are about 1 to 4 mils 36 deepO If the channels are no~ deep enough, then the 1 subsequenL etching step, described below, results in 2 considerable loss in surace area of the subs~race. If 3 the channels are too deep, ,hen ~he V-groove formed by 4 etching in ~he subsequen~ step will no~ be fully formed, and thus cleaving is initia~ed beyond ~he substrate and in 6 the region of che epitaxial layers, and will no~ result in 7 a mirror facet.
8 The channels are convenienLly formed using a diamond 9 circular saw blade about 1.5 co 2 mils in thickness. While other techniques may be used, the diamond circular saw 11 blade, which is ex~ensively usPd in semiconductor processing 12 techniques for oLher purposes, advancageously forms channels 13 having substantially parallel sidewalls. Due ~o the 14 increased thickness of the wafer, no dislocations are gen-erated in the active region, which is a problem that generally 16 accompanies use of diamond saw blades with thinner wafers.
17 Grooves are chen etched into the bottoms of the 18 channels with an anisotropic etchant that forms V-grooves 22a, 19 as shown in cross section in FIG. 4b. When the substrate is gallium arsenide, an example of such an etchant comprises 21 a solution of H2S04, H202 and H20. The description above 22 in reference to forming V-grooves in ~hinner wafers with this 23 etchant is applicable to thicker wafers as well.
24 The etching is carried ou~ to a depth sufficient to form a V-groove. If the etching is noc deep enough to 26 form the V-groove, then cleaving is more difficult, since 27 ~he cleavage plane is not well-defined and cleavage 28 stria~ions are more likely to occur across lasing facets, 29 as with prior art techniques. If the ecching is too deep, then cleaving is initiated beyond the substrate and in the 31 region of the epitaxial layers, and will not result in a 32 mirror facet. The V-groove in the bottom of the channel 33 is generally weil-formed about 1 to 3 mils deeper than ~he 34 initial channel, and etching may be cerminated at that pointO
Following etching, which, as shown in FIGS. 3a, 36 3b and 4b produces a V-groove 22a in che bottom of channel 24 - 10 - ~4~'~6~

1 ~he wafer is mechanically cleaved by rolling or other means 2 so as to produce cleavages along lines 20, as described 3 above in connection with thinner wafers.
4 Followins cleaving in~o diode bars and passivation of lasing facets, individual diodes are formed by scribing 6 the bars, as with a diamond scribe, usually on che n-sideJ
7 along lines 23 (the wafer having previously been il~dexed by 8 well-known means to locate stripes 17). The scribed bars 9 are then mechanically cleaved by rolling a tool of small radius over the bars, as is customary in the ar~0 11 The foregoing methods result in good cleavage con-1~ trol and uniform deinition o diode laser lengch. Conse-13 quently, longitudinal mode distribution and threshold curren-t 14 e~hibi~ tle variation for devices ~aken from differen, loca~ions in ~he wafer. Cleavage co prescribed leng~hs re-16 sul~s in easier processability for lasing facet passiva~ion 17 and in improved device yields. Yields improved by a~ leas~
18 50% are realized using the me-hod of the invention. Cleaving 19 through thin GaAs (from the bottom of ~he V-groove to the p-side) appears LO reduce cleavage st~iations on ~he lasing 21 facet, as shown in ~he comparison between FIGS. 2a and 2b, 22 ~which are pho~omicrographs o cleaved faceLs, magnified llOOx 23 the former produced by a prior art method as discussed above 24 and the latter produced in accordance wi~h the inven~ion. An additional benefit of he invention is that gold contac~ pads 26 19 may be made thicker wi~hout affecting the quali~y of the 27 clèaved surface. Such thicker contacts permiL better ease of ~8 con~acting to an ex.ernal power sourceO Also, a thicker sub-29 strate may be employed than heretofore possible, thereby in-creasing ease of handling. The method of the inven~ion for 31 thicker wafers is especially eicacious for processing 32 thicker substrates than heretobefore possible, thereby increas-33 ing ease of handling and ease of fabricacion of shor~er diode 34 (cavi~y) lengchs. Such shorter diode la~er length, on the order o abouL 6 mils, permi~ lowering of ~he ~hreshold 36 curren, over thac customarily found in the ar~

66~

D?LES
_ 2 ~xamPle l, Thin Wafe 3 A processed piece of GaAs material (average thickness 4 about 4.0 + 0.5 mils) was divided into two pieces. One piece was held for conventional prior art cleaving, whereas 6 the second piece was further processed for etch cleaving in 7 accordance with the invencion. The ~wo pieces were then 8 cleaved a. the same time by che same operator using che following 9 method for both pieces: pressing with tweezers in ,he direccion of the desired cleave. The experimenc was then repeated in the 11 same way with another operacor.
12 The etch cleaving was done as follows: A pattern of 13 parallel s~rips 10 ~ m wide and 10 mils apart (center to 14 center) were formed by exposure of photoresist through a suic-able phocoresist mask. The exposed photoresist portions were 16 removed by dissolving in developer to expose portions of a 17 cop gold layer. The exposed gold portions were removed in a 18 ~I-base gold etchant in about 1 minute at 50C to expose 19 portions of an underlying 3% Ag/97% Sn layer. The exposed portions were removed using concentrated HCl for 10 minutes 21 at room ~emperature to expose porcions of underlying n-GaAs 22 substrate. The exposed portions were etched wi~h a V-groove 23 etchant comprising lH2SO4-8H2O2-lH2O (by volume) for 15 24 minutes at room temperature~ The etched V-grooves were formed to an average depth of abou~ 1.5 mils less than the 26 thickness of the wafer.
27 The cleavage yields were measured in terms of ~he 28 number of useful bars obtained expressed as a percentage of 29 the total amount of macerial. The cleavage striation densi-.ies were measured by Nomarski optical examinacion of 5 mm 31 lengchs of samples representative of the two methods.
32 The results are shown in the Table below:
33 Prior Art Etch Cleaving 34 Cleavin~ of the Inven~ion % Yield for Operator 1 20 100 36 % Yield for Operacor 2 10 100 37 Cleavage Striatio~ Density, 300 6 38 mm~

- 12 _ 1 It can be seen ~hat yields were improved by a 2 fac~or of 5 to 10 and cleavage striacion densi~y was reduced 3 by a factor of 50 employing the inventive techniqueO
4 FIGS. 2a and 2b are photomicrographs of the facets cleaved by ~he ~wo methods, enlarged by a factor of llOOx.
6 The reduction in cleavage striation densi~y afforded by the 7 e,ch-cleave method of the invention is clearly visible.
8 Example 2. Thick Wafer 9 Processed wafers were lapped on ,he n-side to 8 mils. A coating of 3% Ag/97% Sn was evaporn~ed on ~he lapped 11 side to a thickness of l900 A. A nickel film of 2000 A ~ m 12 was electroless pla~ed on the Ag-Sn coating, followed by a 13 gold film of 500 ~. A ~hin layer of chromium (700 A), followed 14 by a chin layer of gold (1000 ~), was evaporaced on ~he opposi~e side.
16 The wafer was sawe~ from the n-side to a depch of 2 l~ mils using a diamond blade of 1.5 ~o 2.0 mil ~hickness.
18 After sawing, ~he sample was etched in a V-groove etchan~
19 comprising IH2S04-8~2 4-lH20 (by volume) for 10 min. at room cemperature ,o a depth of 4.3 mils rom ~he substra~e sur-21 face (2.3 mils deeper than the ini-~al channel). Cleaving 2~ was done by pressing with tweezers in ~he direction of the 23 desired cleaveO
24 The cleavage yields were measured in ~erms of che number of useful bars obtained expressed as a percen~age of 26 the total amounL of ma~erial. The cleavage striaLion densi-27 ~ies were measured by Nomarski optical examina~ion of 5 mm 28 lengths o samples representative of Lhe cleaving. No com-29 parison was made using prior art techniques with waers about 8 mils Lhick, since such wafers canno~ be controllably 31 cleaved by scribing and mechanically cleaving. A comparison 32 could be made, however, with wafers abou~ 4 mils chick 33 cleaved by conven~ional prior ar. techniques. The results 34 are shown in ~he Table below.

- 13 ~

; 1 Prior Arc Cleaving in Accord-2 Cleavin~_ ance with Invention 3 % Yield 10j20 100 4 Cleavage Striation S Density, mm~l 300 8 6 It can be seen tha~ yields were improved by a 7 factor of 5 ~o 10 and cleavage scriation densi~y was reduced 8 by a factor of nearly 40 employing the inventive technique.
9 The comparison presumably would be even grea~er if ,hlck wafers could be cleaved by prior art techniques.

Claims (29)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN
EXCLUSIVE PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED
AS FOLLOWS:
1. A method of cleaving a semiconductor wafer into individual devices, said wafer comprising a substrate, at least a portion of one surface of which is metallized, and a plurality of semiconductor layers deposited on at least a portion of the opposite surface, at least one of which layers, when appropriately biased, generates coherent electromagnetic radiation, which method includes:
(a) forming channels of substantially parallel sidewalls about 1 to 4 mils deep in the sub-strate being at least about 6 mils thick, (b) etching into the substrate with an anisotro-pic etchant to a depth sufficient to form V-grooves in the bottom of the channels said V-grooves terminating at a point before reaching the said one layer;
(c) mechanically cleaving the wafer including the said one layer along the etched grooves to form bars of diodes, thereby generating substan-tially damage-free lasing facets along the plane of cleaving the bars of diodes being of substan-tially equal width; passivating said lasing facets;
and further mechanically said bars of diodes into individual devices.
2. The method of claim 1 in which the wafer is about 6 to 10 mils thick.
3. The method of claim 1 in which the V-grooves are etched to a depth of about 1 to 3 mils deeper than the bottom of the channels.
4. The method of claim 1 in which the semicon-ductor wafer comprises a substrate of gallium arsenide and layers of gallium arsenide and gallium aluminum arsenide.
5. The method of claim 4 in which the aniso-tropic etchant comprises a solution of H2SO4, H2O2 and H2O.
6. The method of claim 5 in which the etchant comprises 1H2SO4 - 8H2O2 - 1H2O by volume.
7. The method of claim 1 in which the V-grooves have sidewalls at an angle of at least about 45° with respect to the plane of the wafer.
8. A method of cleaving a wafer into bars of diodes, said wafer comprising a substrate, at least a por-tion of which is metallized, and a Plurality of semiconduc-tor layers deposited on at least a portion of the opposite surface, at least one of which layers, when appropriately biased, generates coherent electromagnetic radiation which method comprises:
(a) forming channels of substantially parallel side walls about 1 to 4 mils deep in the substrate;
(b) etching into the substrate with an anisotropic etchant to a depth sufficient to form V-grooves in the bottom of the channels said V-grooves termi-nating at a point before reaching the said one layer; and (c) mechanically cleaving the wafer including the said one layer along the etched grooves to form bars of diodes, thereby generating substantially damage-free lasing facets along the plane of cleaving the bars of diodes being of substantially equal width.
9. The method of claim 8 in which the wafer is at least about 6 mils thick.
10. The method of claim 9 in which the wafer is about 6 to 10 mils thick.
11. The method of claim 10 in which the V-grooves are etched to a depth of about 1 to 3 mils deeper than the bottom of the channels.
12. The method of claim 8 in whic the semiconduc-tor wafer comprises a substrate of gallium arsenide and layers of gallium arsenide and aluminum gallium arsenide.
13. The method of claim 12 in which the anisotro-pic etchant comprises a solution of H2SO4, H2O2 and H2O.
14. The method of claim 13 in which the etchant comprises 1H2SO4-1H2O by volume.
15. The method of claim 8 in which the V-grooves have sidewalls at an angle of at least about 45° with respect to the plane of the wafer.
16. The method set forth in claim 1 wherein said further mechanical cleaving of the bars of diodes into individual devices is substantially perpendicular to said lasing facets.
17. The method set forth in claim 8 or 15 wherein said V-grooves are etched into the (001) surface of, and in the <001> direction, off the gallium arsenide substrate.
18. A method of cleaving a semiconductor wafer into individual devices, said wafer comprising a substrate, at least a portion of one surface of which is metallized and a plurality of semiconductor layers deposited on at least a portion of the opposite surface, at least one of which layers, when appropriately biased, generates coherent electromagnetic radiation, which method includes:
(a) forming an array of exposed lines on the metallized surface of the substrate by photo-lithography to locate lasing ends-of the devices (b) etching through the exposed lines of the metallized portion to expose portions of the underlying substrate;
(c) etching a V-groove into the substrate at the exposed portions to a depth of about 1 to 2 mils less than the thickness of the wafer; said V groove terminating at a point before reaching the said one layer;

(d) mechanically cleaving the wafer including the said one layer along the etched V-grooves to form bars of diodes, thereby generating substantially damage-free lasing facets along the plane of cleaving, the bars of diodes being of substantially equal width, (e) passivating the lasing facets; and (f) further cleaving the bars of diodes into individual diode devices.
19. The method of claim 18 in which the semi-conductor wafer comprises a substrate of gallium arsenide and layers of gallium arsenide and aluminum gallium arsenide.
20. The method of claim 20 in which the V-groove etchant comprises a solution of H2SO4, H2O2 and H2O.
21. The method of claim 20 in which the etchant comprises 1H2SO4-8H2O2-1H2O by volume.
22. The method of claim 18 in which the V-grooves have sidewalls at an angle of at least about 45 with respect to the plane of the wafer.
23. The method of cleaving a wafer into bars of diodes, said wafer comprising a substrate, at least a portion of which is metallized, and a plurality of semi-conductor layers deposited on at least a portion of the opposite surface, at least one of which layers, when appro-priately biased, generates coherent electromagnetic radia-tion, which method comprises:

(a) forming an array of exposed lines on the metallized substrate by photolithography to lo-cate lasing ends of the devices, (b) etching through the exposed metallized por-tion to expose portions of the underlying sub-strate;
(c) etching a V-groove into the substrate at the exposed portions to depth of about 1 to 2 mils less than the thickness of the wafer, said V-groove terminating at a point before reaching the said one layer; and (d) mechanically cleaving the wafer including the said one layer along the etched V-grooves to form bars of diodes, thereby generating substan-tially damage-free lasing facets along the plane of cleaving, the bars of diodes being of substan-tially equal width.
24 . The method of claim 23 in which the semi-conductor wafer comprises a substrate of gallium arsenide and layers of gallium arsenide and aluminium gallium arsenide.
25. The method of claim 24 in which the V-groove etchant comprises a solution of H2SO4, H2O2 and H2O.
26. The method of claim 25 in which the etchant comprises 1H2SO4-8H2O2-1H2O by volume.
27. The method of claim 23 in which the V-groove have sidewalls at an angle of at least about 45° with respect to the plane of the wafer.
28. The method set forth in claim 18 wherein said further cleaving of the bars of diodes into individual devices is substantially perpendicular to said lasing facet.
29. The method set forth in claims 22 or 27 wherein said V-grooves are etched into the <001> surface of, and in the <001> direction, of the gallium arsenide substrate.
CA000337513A 1978-10-13 1979-10-12 Method of cleaving semiconductor diode laser wafers Expired CA1140661A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US05/951,074 US4236296A (en) 1978-10-13 1978-10-13 Etch method of cleaving semiconductor diode laser wafers
US05/951,064 US4237601A (en) 1978-10-13 1978-10-13 Method of cleaving semiconductor diode laser wafers
US951,064 1992-09-25
US951,074 1992-09-25

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FR (1) FR2438914A1 (en)
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IL (1) IL58443A0 (en)
IT (1) IT1123839B (en)
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JPS6041478B2 (en) * 1979-09-10 1985-09-17 富士通株式会社 Manufacturing method of semiconductor laser device
CA1201520A (en) * 1982-09-10 1986-03-04 Charles A. Burrus, Jr. Fabrication of cleaved semiconductor lasers
DE3435306A1 (en) * 1984-09-26 1986-04-03 Siemens AG, 1000 Berlin und 8000 München METHOD FOR PRODUCING LASER DIODES WITH JUTTED INTEGRATED HEAT SINK
JPH01280388A (en) * 1988-05-06 1989-11-10 Sharp Corp Manufacture of semiconductor element
DE3826736A1 (en) * 1988-08-05 1990-02-08 Siemens Ag METHOD FOR SEPARATING LED CHIP ARRANGEMENTS MONOLITHICALLY PRODUCED ON A SEMICONDUCTOR SUB Wafer
JPH07176827A (en) * 1993-08-20 1995-07-14 Mitsubishi Electric Corp Manufacture of semiconductor laser with modulator
US5418190A (en) * 1993-12-30 1995-05-23 At&T Corp. Method of fabrication for electro-optical devices
DE102017117136B4 (en) * 2017-07-28 2022-09-22 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Method of manufacturing a plurality of laser diodes and laser diode

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US3471923A (en) * 1966-12-09 1969-10-14 Rca Corp Method of making diode arrays

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DE2941476A1 (en) 1980-04-24
SE7908485L (en) 1980-04-14
GB2035684A (en) 1980-06-18
FR2438914A1 (en) 1980-05-09
IT1123839B (en) 1986-04-30
GB2035684B (en) 1983-08-03
IT7926486A0 (en) 1979-10-12
IL58443A0 (en) 1980-01-31

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