CA1118532A - Method of manufacturing a semiconductor device - Google Patents

Method of manufacturing a semiconductor device

Info

Publication number
CA1118532A
CA1118532A CA000309394A CA309394A CA1118532A CA 1118532 A CA1118532 A CA 1118532A CA 000309394 A CA000309394 A CA 000309394A CA 309394 A CA309394 A CA 309394A CA 1118532 A CA1118532 A CA 1118532A
Authority
CA
Canada
Prior art keywords
zone
conductivity type
mask
type
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000309394A
Other languages
English (en)
French (fr)
Inventor
Johannes A.A. Van Gils
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of CA1118532A publication Critical patent/CA1118532A/en
Expired legal-status Critical Current

Links

Classifications

    • H10P14/61—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10W10/012—
    • H10W10/0124—
    • H10W10/0126—
    • H10W10/13—

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)
CA000309394A 1977-08-25 1978-08-15 Method of manufacturing a semiconductor device Expired CA1118532A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL7709363 1977-08-25
NL7709363A NL7709363A (nl) 1977-08-25 1977-08-25 Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd onder toepassing van een dergelijke werkwijze.

Publications (1)

Publication Number Publication Date
CA1118532A true CA1118532A (en) 1982-02-16

Family

ID=19829072

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000309394A Expired CA1118532A (en) 1977-08-25 1978-08-15 Method of manufacturing a semiconductor device

Country Status (9)

Country Link
US (1) US4199378A (enExample)
EP (1) EP0001300B1 (enExample)
JP (1) JPS5446485A (enExample)
AU (1) AU517646B2 (enExample)
CA (1) CA1118532A (enExample)
DE (1) DE2861353D1 (enExample)
ES (1) ES472793A1 (enExample)
IT (1) IT1098127B (enExample)
NL (1) NL7709363A (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4269636A (en) * 1978-12-29 1981-05-26 Harris Corporation Method of fabricating self-aligned bipolar transistor process and device utilizing etching and self-aligned masking
JPS5852339B2 (ja) * 1979-03-20 1983-11-22 富士通株式会社 半導体装置の製造方法
JPS5696852A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Semiconductor device
EP0044721A3 (en) 1980-07-23 1982-05-12 Jarl Sundseth Air filters
JPS57149770A (en) * 1981-03-11 1982-09-16 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS57194572A (en) * 1981-05-27 1982-11-30 Clarion Co Ltd Semiconductor device and manufacture thereof
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
US4961102A (en) * 1982-01-04 1990-10-02 Shideler Jay A Junction programmable vertical transistor with high performance transistor
CA1188418A (en) * 1982-01-04 1985-06-04 Jay A. Shideler Oxide isolation process for standard ram/prom and lateral pnp cell ram
US4444605A (en) * 1982-08-27 1984-04-24 Texas Instruments Incorporated Planar field oxide for semiconductor devices
US4507848A (en) * 1982-11-22 1985-04-02 Fairchild Camera & Instrument Corporation Control of substrate injection in lateral bipolar transistors
US4498227A (en) * 1983-07-05 1985-02-12 Fairchild Camera & Instrument Corporation Wafer fabrication by implanting through protective layer
US4860082A (en) * 1984-07-08 1989-08-22 Nec Corporation Bipolar transistor
JPS61220465A (ja) * 1985-03-27 1986-09-30 Toshiba Corp 半導体装置
US4622738A (en) * 1985-04-08 1986-11-18 Advanced Micro Devices, Inc. Method of making integrated bipolar semiconductor device by first forming junction isolation regions and recessed oxide isolation regions without birds beak
US4700461A (en) * 1986-09-29 1987-10-20 Massachusetts Institute Of Technology Process for making junction field-effect transistors
JPH02121143U (enExample) * 1989-03-15 1990-10-01
GB2238658B (en) * 1989-11-23 1993-02-17 Stc Plc Improvements in integrated circuits
US5389553A (en) * 1993-06-30 1995-02-14 National Semiconductor Corporation Methods for fabrication of transistors
KR100384560B1 (ko) * 1995-06-30 2003-08-06 주식회사 하이닉스반도체 반도체소자및그제조방법
KR0171000B1 (ko) * 1995-12-15 1999-02-01 양승택 자동 정의된 베이스 전극을 갖는 바이폴라 트랜지스터 구조 및 그 제조방법
JP2001217317A (ja) * 2000-02-07 2001-08-10 Sony Corp 半導体装置およびその製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3748187A (en) * 1971-08-03 1973-07-24 Hughes Aircraft Co Self-registered doped layer for preventing field inversion in mis circuits
US3928091A (en) * 1971-09-27 1975-12-23 Hitachi Ltd Method for manufacturing a semiconductor device utilizing selective oxidation
US3992232A (en) * 1973-08-06 1976-11-16 Hitachi, Ltd. Method of manufacturing semiconductor device having oxide isolation structure and guard ring
GB1457139A (en) * 1973-09-27 1976-12-01 Hitachi Ltd Method of manufacturing semiconductor device
NL180466C (nl) * 1974-03-15 1987-02-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam voorzien van een in het halfgeleiderlichaam verzonken patroon van isolerend materiaal.
DE2429957B2 (de) * 1974-06-21 1980-08-28 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines bestimmten Leitungstyps in einem Halbleiterkörper
JPS5329555B2 (enExample) * 1974-11-22 1978-08-22
DE2605641C3 (de) * 1976-02-12 1979-12-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Hochfrequenztransistor und Verfahren zu seiner Herstellung
US4066473A (en) * 1976-07-15 1978-01-03 Fairchild Camera And Instrument Corporation Method of fabricating high-gain transistors
JPS5338984A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Manufacture of semiconductor device
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit

Also Published As

Publication number Publication date
EP0001300B1 (en) 1981-11-25
IT7826940A0 (it) 1978-08-22
ES472793A1 (es) 1979-03-16
IT1098127B (it) 1985-09-07
NL7709363A (nl) 1979-02-27
DE2861353D1 (en) 1982-01-28
US4199378A (en) 1980-04-22
AU517646B2 (en) 1981-08-13
JPS5446485A (en) 1979-04-12
JPS6140146B2 (enExample) 1986-09-08
EP0001300A1 (en) 1979-04-04
AU3917778A (en) 1980-02-28

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Legal Events

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