CA1058330A - Process for depositing conductive layers on substrates - Google Patents

Process for depositing conductive layers on substrates

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Publication number
CA1058330A
CA1058330A CA259,725A CA259725A CA1058330A CA 1058330 A CA1058330 A CA 1058330A CA 259725 A CA259725 A CA 259725A CA 1058330 A CA1058330 A CA 1058330A
Authority
CA
Canada
Prior art keywords
layer
metal
adhesion
thickness
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA259,725A
Other languages
French (fr)
Inventor
Donald M. Mattox
Paul H. Holloway
Gerald C. Nelson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
US Department of Energy
Original Assignee
US Department of Energy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by US Department of Energy filed Critical US Department of Energy
Application granted granted Critical
Publication of CA1058330A publication Critical patent/CA1058330A/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Physical Vapour Deposition (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROCESS FOR DEPOSITING CONDUCTIVE LAYERS ON SUBSTRATES
ABSTRACT OF DISCLOSURE
A process is described for metallizing electronic circuit elements comprising vapor depositing a metal adhesion layer on a circuit substrate, vapor depositing a second metal layer having a good electrical conductivity on the adhesion layer, then oxidizing any of the adhesion layer material which is diffused through the second layer, and thereafter vapor depositing an additional layer of the good conductivity metal over the second layer and the oxidized material.

Description

1~58330 PROCESS FOR DEPOSITING CONDUCTIVE LAYERS ON SUBSTRATES

BACKGROUND OF INVENTION

Microelectronics or microcircuitry, such as integrated circuits, hybrid microcircuits, or the like, commonly utilized gold as a thin film electrical conductor material because of its combination of low electrical resistivity, high oxidation and other corrosion resistance, and bondability characteristics.
Gold films, however, when deposited directly on substrate or circuit substrate surfaces such as glass or ceramics or onto thin film resistors such as tantalum nitride exhibit very poor -adhesion and are readily pulled apart from the substrate. In order to provide good adhesion to such substrates, a thin layer of a bonding metal having good adhesion to the substrate materials, such as chromium, is deposited onto the substrate prior to gold deposition and the gold then deposited over the adhesion metal. The adhesion metal thus acts as the bond to the circuit substrate while the gold, which does adhere well to the adhesion metal, acts as the electrical conductor.

:
It has been found that such chromium-gold metallizations increase in resistance from the chromium leaving the underlayer region and alloying with the gold film along grain boundaries within the gold film when the circuits or substrates are heated during processing, such as from lead bonding, resistor stabili-zation, or the vapor deposition itself, or from high temperature uses. This increased resistance from chromium diffusion is often unavoidable because of the processing requirements and may reach levels at which the circuit would be unusable. It has further been found that a portion of the chromium which -1- ~ ., :

- ~. . , : .
.. ~ , . . . .

`` `-` ~058330 .:
diffuses into the gold reaches the outer surface of the gold layer at w~.ich surface it may spread so as to cGver all or a large part of he gold metallization. This chromium, even though quite thin, may be oxidized during use or during processing which may prevent or inhibit the bondin~ of leads to the gold. Such oxidizing may occur, for example, in resistor stabilization of the microcircuits, Various attempts have been made to attempt to block this diffusion of chromium through gold to maintain the inherent high electrical conductivity of the gold and good adhesion characteristics including depositing an intermediate electrical conductor layer between the chromium and the gold, such as palladium, through which the chromium will not diffuse and which will not itself diffuse excessively through the gold. Because of the cost and complaxities involved in applying multiple vapor deposited metallization layers~ the addition of a thi~d layer adds to the complexity, cost and time of producing metallizations. Another approach which has been taken is to remove by etching any material which has migrated to the gold surface, such as the chromium or oxidized chromium, after all the heating processing steps have been essentially completed. However, this does not eliminate the increased resistivity caused by such diffusion and the lead bonding steps `~
which may occur later may cause additional diffusion and resistance increases.
SUMMARY OF INVENTION ;
In view of the above, it is an object of this invention to provide a diffusion barrier which will prevent migration of one metal through another metal layer.
It is â further object of this invention to prevent the migration of chromium through an overlayer of gold into the main body of the gold and its outer surface.
It will be understood that various changes in the details, materials and arrangements of the parts, which are herein described and illustrated in order to explain the nature of the invention, may be made by those skilled in ~he art within the principles and scope of the invention as e~pressed in the appended claims.

. . , . , ~: : , . : .
, ~ .
.. ~ . .

1058330 :

The invention relates to a process for providing a diffusion barrier within a metal deposition layer by interrupting the deposition of the layer and oxidizing any material which has to that point partially diffused through the layer and then continuing thè deposition to complete the metal layer.
The invention comprises a process for depositing electrically conductive layers to a desired thickness with a high peel strength on ~
ceramic or glass circuit substrates comprising vapor depositing while ~ -subjected to a vacuum of about 10 7 Torr an electrically conductive adhesion metal layer on the substrate, vapor depositing on the adhesion layer while subjected to this vacuum a first layer of a good electrically conductive metal having a low free energy of oxide formation to a thickness of about one half or less of the total desired conductive metal thickness, then oxidizing by backfilling with oxygen to a pressure of from about 10 3 to about 10-6 Torr any of the adhesion layer metal which has diffused through the first layer to form an oxide barrier against further diffusion of the adhesion metal layer, and thereafter while subjected to the first mentioned vacuum vapor depositing a second layer of the first layer metal over the first layer and over the oxidized adhesion layer metal wherein the first layer is of sufficient thickness to yield a continuous film after the oxidizing step.
DESCRIPTION OF DRAWING
Figs. la, lb, lc, ld and le illustrate by enlarged cross sections the various steps of the process of this invention.
Fig. 2 illustrates somewhat diagrammatically and by greatly enlarged cross section the grain boundary diffusion of chromium in gold and the ;;
mechanism by which this diffusion is blocked by the process of this ;
invention.
DETAILED DESCRIPTION
The present invention provides a diffusion barrier within the conductive metal deposition layer of a thin film electrical microcircuit by permitting ~ -3-B

~OS8330 i or enhancing partial migration or diffusion of a metal underlayer therethrough and then blocking further migration by "capping" the then existing diffusion. This is achieved by oxidizing the metal which has to that point diffused through the conductive metal layer and thereafter continuing the deposition of the conductive metal layer over the oxidized "caps" and the initially deposited layers.
It has been found that many of the non-reactive metals, such as gold, palladium or platinum, which exhibit very high electrical conductivities together with very high resistance to attack from environmental and atmospheric conditions, fcr example exhibit a low free energy of oxide formation, also exhibit very low adhesive strengths when deposited on ceramics, glass or thin film resistor materials like tantalum nitride.
At the same time, materials such as chromium, copper, titanium, nickel, tungsten, molybdenum and alloys of these materials may exhibit very high adhesive strengths to these substrate materials but are very reactive in certain environments, particularly oxidizing environments, or do not exhibit sufficiently low resistance to be used as electrical conductors in thin film electrical microcircuits. Attempts have been made to overcome these problems by initially depositing the reactive ,.'`.~; -''' , ~ :

lOS8330 metal as an adhesion layer on the substrate material and then overlaying an additional film or metal~ization of the non-reactive metal to act as a protecting layer and principle electrical conductor.
In accordance with the present invention the adhesion layer metals area preferably selected fr~m the group consisting of chromium, titanium, ;
nickel, copper, tungsten, molybdenum, and alloys thereof and the nonreactive conductive layer metals are preferably selected from the group consisting of gold~ platinum, and palladium.
The process of this invention is illustrated in Figs. la through le in which a substrate 10 has deposited thereon appropriate metal layers having a diffusion barrier therein which prevents or minimizes degradation of the overall electrical conducitivity of the metal layers and also of the normally good bondability of the metal layer outer surface. The substrate 10 may be formed from a suitable ceramic~ such as A1203, glass or the like, with or without thin film resistor layers or other layers to which the highly electrically conductive and non-reactive metal conductors do not normally bond. Substrate 10 may then be suitably cleaned and outgased in a manner well known in the art, such as by organic solvents and de-ionized water, and placed in an appropriate evacuated space or chamber in which depo9ition of the desired conductive layers may be provided. For example, vapor depositions are typically carried out in vacuums at levels of about 10-7 Torr to prevent oxidation and gas incorporation in deposited metals.
For pruposes of this invention~ the process will be described using a reactive~ chromium adhesion layer deposited directly onto the substrate 10 with a non-reactive~ gold layer deposited thereover since this combination provides both good adhesion and high electrical conductivities as well as good resistance to degrading environments and atmospheres. It -is understood that other combinations and metal selections may be utilized for these layers which will resuIt in the diffusion barrier described hereinbelow. In addition~ the present invention will be described with ~ _4_ 1~
.
~' . .

~058330 respect to vapor deposition of the respective metal layers understanding that other deposition methods such as sputter deposition, ion deposition, and the like may provide similar results when properly utilized in accord-ance with this invention.
With substrate 10 suitably cleaned and situated within an evacuated deposition chamber, an adhesion layer 12 of chromium is vapor deposited over substrate 10 in a continuous film to cover desired portions of substrate 10 ~ -'~' , ' :-:

-4a-.~_ , ' ' ' ,~ ' , ' ~ . ' ', --` 1058330 and provide adhesive strength, such as at a thickness of from about 100 Angstroms to about 1000 Angstroms, as indicated in Fig. lb. A first layer 14 of gold, as shown in Fig. lc, is then vapor deposited over layer 12 to a thickness of about one half or less of the total final desired gold thickness, such as a thickness of from about 2000 Angstroms to about 15,000 Angstroms. The total desired gold thickness may be from about 10,000 Angstroms to about 60,000 Angstroms, and most often at about 30,000 Angstroms.
First gold layer 14 should have sufficient thickness to insure continuity of the film after the oxidizing step to be described has been performed.
The layers 12 and 14 may then be heated to a temperature of from about 200C. to about 500C., generally about 350C., so as to cause the chromium in layer 12 to diffuse through layer 14. It has been found that this diffusion occurs preferentially along the grain boundaries in gold layer 14 which may form nodules or caps 16 on the outer surface of layer 14; the diffusion may follow the most direct paths along grain boundaries as indicated at 18 in Fig. 2 and Fig. ld. It is understood that the vapor deposition process itself will result in heating of substràte 10 and layers 12 and 14 to an extent which may often induce this diffusion without further application of heat to the substrate and layers. After this diffusion has occurred from the vapor deposition heat or externally applied heat, oxygen may be back-filled into the deposition chamber to a pressure of from about 10-3 to about 10-6 Torr while maintaining substrate 10 and layers 12 and 14 at this temperature so as to oxidize the chromium caps 16. After about 10 to 20 minutes, the oxygen may be pumped or removed from the chamber to the vapor deposition vacuum level referred to above. The temperature utilized for the diffusion is dependent upon the thickness of gold layer `
14, the thicker the layer the higher the temperature required, and the heating continued through the oxidizing step to enhance oxidizing of caps 16.
The time period required to oxidize caps 16 is also dependent on the temperature to which the structure is heated.
After oxidizing caps 16 which effectively block the grain boundaries ' .,~'.'.

'.: : . ~ . : , , ~ 1058330 in gold layer 14 through which the chromium is most readily ' diffused, a second and final gold layer 20 is deposited over first gold layer 14 and caps 16, as shown in Fig. le. The -second gold layer 20 is deposited generally to a thickness of from about 28,000 Angstroms to about 15,000 Angstroms, depending upon the desired conductivity level within layer 20. The '~
successive metal layers may be deposited from separate boats having sufficient metal to provide the desired layer '~
thicknesses.
With chromium oxide caps in place over the preferred or ',~
preferential diffusion paths within the first gold layer 14, it has been found that the second gold layer 20 has stabilized ` ' electrical conductivity and very little chromium, if any, is ' ' diffused into or through layer 20. The substrate 10 with its chromium layer 12, and gold layers 14 and 20 may be appropriately etched to form the desired electrical conductor patterns and may be fur,ther processed to stabilize the resistor patterns by oxidation thereof and by suitable thermal compression bonding of leads without any degradation of adhesion of the metal layers to the substrate or of the leads to the metal layer, or to the electrical resistance thereof.
The following table illustrates the improved strengths and electrical conductivities achieved using the process of this invention by comparing a circuit structure prepared using ' oxygen back-fills of different amounts for different per~ of time as compared to a circuit structure formed without the diffusion barrier of this invention. ~' ,'-C 2 3 Average Concentration Lead Peel Depos ition after 2 hours Peel Strength Gold Condition at 300C. Test Range Resistivity (Arbitrary Units) (lbs) (lbs) ohm-cmxlO
. .
AES AD S AD S

Typical 1.0 to 1.82 1.9 0.8 1.28 0 3.87 Deposition to to
2.35 2.37 2 sackfill lxlO Torr 0.28 2.8 2.9 2.44 1.41 2.89 ~;
18 min. at to to 350C. 3.26 3.16 2 Backfill 5xlO Torr 0.1 - 3.0 - 2.78 2.51 10 min. at to 350C. 3.14 The terms AES refers to Auger electron spectroscopy, AD refers to "as deposited" and S refers to resistors stabilized at 300C.
for 2 hours in air. It has been found that the quantity of chromium oxide (Cr203) concentration on the outer gold surface with the diffusion barrier produced by this invention is less than 10%, and as law as 2.5%, of the chromium oxide concentrations on the outer gold surfaces without the diffusion 20 barrier. In addition, the prior metal layers exhibited bond strengths to gold leads of almost O to levels, at best, of about one half of those achieved with the present invention. The conductivities of the resulting gold layers with the diffusion barrier was at least 38% better than the prior gold layers.

Claims (6)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A process for depositing electrically conductive layers to a desired thickness with a high peel strength on ceramic or glass circuit substrates comprising vapor depositing while subjected to a vacuum of about 10-7 Torr an electrically conductive adhesion metal layer on said substrate, vapor depositing on said adhesion layer while subjected to said vacuum a first layer of a good electrically conductive metal having a low free energy of oxide formation to a thickness of about one half or less of the total desired conductive metal thickness, then oxidizing by backfilling with oxygen to a pressure of from about 10-3 to about 10-6 Torr any of said adhesion layer metal which has diffused through said first layer to form an oxide barrier against further diffusion of said adhesion metal layer, and thereafter while subjected to said first mentioned vacuum vapor depositing a second layer of said first layer metal over said first layer and over said oxidized adhesion layer metal wherein said first layer is of sufficient thickness to yield a continuous film after said oxidizing step.
2. The process of claim 1 wherein said adhesion layer metal is chromium and said first and second layer metal is gold.
3. The process of claim 2 including heating said substrate and said adhesion and first layers to a temperature of from about 200°C. to about 500°C. both before and during said oxidizing.
4. The process of claim 3 wherein said oxidizing is continued for from about 10 to about 20 minutes.
5. The process of claim 4 wherein said adhesion layer is from about 100.ANG. to about 1000.ANG. in thickness, said first layer is from about 2000.ANG. to about 15,000.ANG. in thickness, and said second layer is from about 28,000.ANG.
to about 15,000.ANG. in thickness.
6. The process of claim l wherein said adhesion layer is selected from the group consisting of chromium, titanium, nickel, copper, tungsten, molybdenum, and alloys thereof and said first and second layers are selected from the group consisting of gold, platinum, and palladium.
CA259,725A 1975-10-30 1976-08-24 Process for depositing conductive layers on substrates Expired CA1058330A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62742075A 1975-10-30 1975-10-30

Publications (1)

Publication Number Publication Date
CA1058330A true CA1058330A (en) 1979-07-10

Family

ID=24514575

Family Applications (1)

Application Number Title Priority Date Filing Date
CA259,725A Expired CA1058330A (en) 1975-10-30 1976-08-24 Process for depositing conductive layers on substrates

Country Status (5)

Country Link
JP (1) JPS5257972A (en)
CA (1) CA1058330A (en)
DE (1) DE2649091A1 (en)
FR (1) FR2330245A1 (en)
GB (1) GB1539272A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3280233D1 (en) * 1981-09-11 1990-10-04 Toshiba Kawasaki Kk METHOD FOR PRODUCING A SUBSTRATE FOR MULTI-LAYER SWITCHING.
JPS59167096A (en) * 1983-03-11 1984-09-20 日本電気株式会社 Circuit board
JPH0732158B2 (en) * 1988-04-08 1995-04-10 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Multi-layer metal structure for electronic components

Also Published As

Publication number Publication date
FR2330245B3 (en) 1979-07-13
JPS5257972A (en) 1977-05-12
GB1539272A (en) 1979-01-31
DE2649091A1 (en) 1977-05-12
FR2330245A1 (en) 1977-05-27

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