JPS5257972A - Method of plating conductive layer on circuit substrate - Google Patents

Method of plating conductive layer on circuit substrate

Info

Publication number
JPS5257972A
JPS5257972A JP13117376A JP13117376A JPS5257972A JP S5257972 A JPS5257972 A JP S5257972A JP 13117376 A JP13117376 A JP 13117376A JP 13117376 A JP13117376 A JP 13117376A JP S5257972 A JPS5257972 A JP S5257972A
Authority
JP
Japan
Prior art keywords
conductive layer
circuit substrate
plating conductive
plating
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13117376A
Other languages
Japanese (ja)
Inventor
Etsuchi Horouei Pouru
Emu Matotsukusu Donarudo
Shii Neruson Jierarudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
US Government
Original Assignee
US Government
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by US Government filed Critical US Government
Publication of JPS5257972A publication Critical patent/JPS5257972A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Physical Vapour Deposition (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP13117376A 1975-10-30 1976-10-29 Method of plating conductive layer on circuit substrate Pending JPS5257972A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62742075A 1975-10-30 1975-10-30

Publications (1)

Publication Number Publication Date
JPS5257972A true JPS5257972A (en) 1977-05-12

Family

ID=24514575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13117376A Pending JPS5257972A (en) 1975-10-30 1976-10-29 Method of plating conductive layer on circuit substrate

Country Status (5)

Country Link
JP (1) JPS5257972A (en)
CA (1) CA1058330A (en)
DE (1) DE2649091A1 (en)
FR (1) FR2330245A1 (en)
GB (1) GB1539272A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3280233D1 (en) * 1981-09-11 1990-10-04 Toshiba Kawasaki Kk METHOD FOR PRODUCING A SUBSTRATE FOR MULTI-LAYER SWITCHING.
JPS59167096A (en) * 1983-03-11 1984-09-20 日本電気株式会社 Circuit board
JPH0732158B2 (en) * 1988-04-08 1995-04-10 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Multi-layer metal structure for electronic components

Also Published As

Publication number Publication date
FR2330245B3 (en) 1979-07-13
GB1539272A (en) 1979-01-31
DE2649091A1 (en) 1977-05-12
FR2330245A1 (en) 1977-05-27
CA1058330A (en) 1979-07-10

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