CA1058312A - Circuit device packaging technique - Google Patents

Circuit device packaging technique

Info

Publication number
CA1058312A
CA1058312A CA251,202A CA251202A CA1058312A CA 1058312 A CA1058312 A CA 1058312A CA 251202 A CA251202 A CA 251202A CA 1058312 A CA1058312 A CA 1058312A
Authority
CA
Canada
Prior art keywords
lead conductors
cavity
integrated circuit
circuit chip
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA251,202A
Other languages
English (en)
French (fr)
Inventor
James G. Harper
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/581,604 external-priority patent/US3986334A/en
Priority claimed from US05/581,605 external-priority patent/US4012723A/en
Priority claimed from US05/581,603 external-priority patent/US3986335A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Priority to CA317,854A priority Critical patent/CA1067194A/en
Priority to CA317,855A priority patent/CA1067195A/en
Application granted granted Critical
Publication of CA1058312A publication Critical patent/CA1058312A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G17/00Structural details; Housings
    • G04G17/02Component assemblies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01087Francium [Fr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Clocks (AREA)
  • Light Receiving Elements (AREA)
  • Electromechanical Clocks (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
CA251,202A 1975-05-29 1976-04-27 Circuit device packaging technique Expired CA1058312A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CA317,854A CA1067194A (en) 1975-05-29 1978-12-13 Circuit device package assembly
CA317,855A CA1067195A (en) 1975-05-29 1978-12-13 Modular circuit packaging arrangement and method

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US58162075A 1975-05-29 1975-05-29
US05/581,604 US3986334A (en) 1975-05-29 1975-05-29 Electronic watch and its method of fabrication
US05/581,605 US4012723A (en) 1975-05-29 1975-05-29 Magnetic bubble memory packaging arrangement and its method of fabrication
US05/581,603 US3986335A (en) 1975-05-29 1975-05-29 Electronic watch module and its method of fabrication

Publications (1)

Publication Number Publication Date
CA1058312A true CA1058312A (en) 1979-07-10

Family

ID=27504954

Family Applications (1)

Application Number Title Priority Date Filing Date
CA251,202A Expired CA1058312A (en) 1975-05-29 1976-04-27 Circuit device packaging technique

Country Status (7)

Country Link
JP (1) JPS51145370A (pt)
BR (1) BR7603423A (pt)
CA (1) CA1058312A (pt)
DE (1) DE2623715A1 (pt)
FR (1) FR2356339A1 (pt)
GB (1) GB1555364A (pt)
IT (1) IT1062029B (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5227555A (en) * 1975-08-27 1977-03-01 Seiko Instr & Electronics Electronic timekeeper
US4064552A (en) * 1976-02-03 1977-12-20 Angelucci Thomas L Multilayer flexible printed circuit tape
GB2072891B (en) * 1977-06-20 1982-08-25 Hitachi Ltd Electronic device and method of fabricating the same
JPS5424673A (en) * 1977-07-27 1979-02-24 Seiko Epson Corp Electronic wristwatch
CH623452B (fr) * 1977-12-14 Fontainemelon Horlogerie Procede de fabrication d'un module de piece d'horlogerie electronique et module de piece d'horlogerie obtenu par la mise en oeuvre de ce procede.
JPS56122972U (pt) * 1980-02-19 1981-09-18
EP0105841A1 (fr) * 1982-10-05 1984-04-18 Ebauches Electroniques S.A. Bande de travail destinée à la fabrication de supports de composants pour montre
US5124782A (en) * 1990-01-26 1992-06-23 Sgs-Thomson Microelectronics, Inc. Integrated circuit package with molded cell
GB9615164D0 (en) * 1996-07-19 1996-09-04 Delta Schoeller Ltd Electrical circuit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3611061A (en) * 1971-07-07 1971-10-05 Motorola Inc Multiple lead integrated circuit device and frame member for the fabrication thereof
US3784725A (en) * 1972-07-24 1974-01-08 Solitron Devices Electronic hybrid package

Also Published As

Publication number Publication date
DE2623715A1 (de) 1977-01-20
FR2356339A1 (fr) 1978-01-20
IT1062029B (it) 1983-06-25
BR7603423A (pt) 1976-12-21
FR2356339B1 (pt) 1983-03-04
GB1555364A (en) 1979-11-07
JPS51145370A (en) 1976-12-14

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