CA1045724A - Method for forming integrated circuit regions defined by recessed dielectric isolation - Google Patents

Method for forming integrated circuit regions defined by recessed dielectric isolation

Info

Publication number
CA1045724A
CA1045724A CA250,193A CA250193A CA1045724A CA 1045724 A CA1045724 A CA 1045724A CA 250193 A CA250193 A CA 250193A CA 1045724 A CA1045724 A CA 1045724A
Authority
CA
Canada
Prior art keywords
region
substrate
regions
silicon dioxide
recessed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA250,193A
Other languages
English (en)
French (fr)
Inventor
Ingrid E. Magdo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1045724A publication Critical patent/CA1045724A/en
Expired legal-status Critical Current

Links

Classifications

    • H10P95/00
    • H10P14/61
    • H10W10/0121
    • H10W10/13
    • H10W20/40
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/036Diffusion, nonselective
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/049Equivalence and options
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/082Ion implantation FETs/COMs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/117Oxidation, selective

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Electrodes Of Semiconductors (AREA)
CA250,193A 1975-04-16 1976-04-13 Method for forming integrated circuit regions defined by recessed dielectric isolation Expired CA1045724A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/568,636 US4044454A (en) 1975-04-16 1975-04-16 Method for forming integrated circuit regions defined by recessed dielectric isolation

Publications (1)

Publication Number Publication Date
CA1045724A true CA1045724A (en) 1979-01-02

Family

ID=24272102

Family Applications (1)

Application Number Title Priority Date Filing Date
CA250,193A Expired CA1045724A (en) 1975-04-16 1976-04-13 Method for forming integrated circuit regions defined by recessed dielectric isolation

Country Status (13)

Country Link
US (1) US4044454A (enExample)
JP (1) JPS51124386A (enExample)
AU (1) AU497861B2 (enExample)
BE (1) BE839579A (enExample)
BR (1) BR7602384A (enExample)
CA (1) CA1045724A (enExample)
CH (1) CH592959A5 (enExample)
DE (1) DE2615438A1 (enExample)
FR (1) FR2308204A1 (enExample)
GB (1) GB1515639A (enExample)
IT (1) IT1064171B (enExample)
NL (1) NL7603747A (enExample)
SE (1) SE411814B (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5275989A (en) 1975-12-22 1977-06-25 Hitachi Ltd Production of semiconductor device
JPS6035818B2 (ja) * 1976-09-22 1985-08-16 日本電気株式会社 半導体装置の製造方法
FR2422257A1 (fr) * 1977-11-28 1979-11-02 Silicium Semiconducteur Ssc Procede de sillonnage et de glassiviation et nouvelle structure de sillon
US4261761A (en) * 1979-09-04 1981-04-14 Tektronix, Inc. Method of manufacturing sub-micron channel width MOS transistor
FR2476912A1 (fr) * 1980-02-22 1981-08-28 Thomson Csf Procede d'isolement des interconnexions de circuits integres, et circuit integre utilisant ce procede
US4536947A (en) * 1983-07-14 1985-08-27 Intel Corporation CMOS process for fabricating integrated circuits, particularly dynamic memory cells with storage capacitors
US4505026A (en) * 1983-07-14 1985-03-19 Intel Corporation CMOS Process for fabricating integrated circuits, particularly dynamic memory cells
US4519128A (en) * 1983-10-05 1985-05-28 International Business Machines Corporation Method of making a trench isolated device
US4594769A (en) * 1984-06-15 1986-06-17 Signetics Corporation Method of forming insulator of selectively varying thickness on patterned conductive layer
US4983537A (en) * 1986-12-29 1991-01-08 General Electric Company Method of making a buried oxide field isolation structure
US5061654A (en) * 1987-07-01 1991-10-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit having oxide regions with different thickness
EP0309788A1 (de) * 1987-09-30 1989-04-05 Siemens Aktiengesellschaft Verfahren zur Erzeugung eines versenkten Oxids
JP2886183B2 (ja) * 1988-06-28 1999-04-26 三菱電機株式会社 フィールド分離絶縁膜の製造方法
US5049520A (en) * 1990-06-06 1991-09-17 Micron Technology, Inc. Method of partially eliminating the bird's beak effect without adding any process steps
JPH06349820A (ja) * 1993-06-11 1994-12-22 Rohm Co Ltd 半導体装置の製造方法
JP2911394B2 (ja) * 1995-08-22 1999-06-23 株式会社アルテクス 超音波接合装置及び共振器
US5882982A (en) * 1997-01-16 1999-03-16 Vlsi Technology, Inc. Trench isolation method
EP0856886B1 (en) * 1997-01-31 2003-06-25 STMicroelectronics S.r.l. Process for forming an edge structure to seal integrated electronic devices, and corresponding device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL159817B (nl) * 1966-10-05 1979-03-15 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
NL173110C (nl) * 1971-03-17 1983-12-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.
JPS5710569B2 (enExample) * 1972-03-31 1982-02-26
NL7204741A (enExample) * 1972-04-08 1973-10-10
US3808058A (en) * 1972-08-17 1974-04-30 Bell Telephone Labor Inc Fabrication of mesa diode with channel guard
US3853633A (en) * 1972-12-04 1974-12-10 Motorola Inc Method of making a semi planar insulated gate field-effect transistor device with implanted field
JPS5214594B2 (enExample) * 1973-10-17 1977-04-22
US3962779A (en) * 1974-01-14 1976-06-15 Bell Telephone Laboratories, Incorporated Method for fabricating oxide isolated integrated circuits
US3904450A (en) * 1974-04-26 1975-09-09 Bell Telephone Labor Inc Method of fabricating injection logic integrated circuits using oxide isolation
US3899363A (en) * 1974-06-28 1975-08-12 Ibm Method and device for reducing sidewall conduction in recessed oxide pet arrays
US3961999A (en) * 1975-06-30 1976-06-08 Ibm Corporation Method for forming recessed dielectric isolation with a minimized "bird's beak" problem

Also Published As

Publication number Publication date
JPS5413349B2 (enExample) 1979-05-30
FR2308204B1 (enExample) 1978-09-01
SE411814B (sv) 1980-02-04
FR2308204A1 (fr) 1976-11-12
CH592959A5 (enExample) 1977-11-15
BE839579A (fr) 1976-07-01
GB1515639A (en) 1978-06-28
BR7602384A (pt) 1976-10-12
AU497861B2 (en) 1979-01-25
NL7603747A (nl) 1976-10-19
AU1295776A (en) 1977-10-20
JPS51124386A (en) 1976-10-29
US4044454A (en) 1977-08-30
DE2615438A1 (de) 1976-10-28
SE7603315L (sv) 1976-10-17
IT1064171B (it) 1985-02-18

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