BRPI0515920A2 - sistema e método para tornar virtuais recursos de processador - Google Patents

sistema e método para tornar virtuais recursos de processador

Info

Publication number
BRPI0515920A2
BRPI0515920A2 BRPI0515920-2A BRPI0515920A BRPI0515920A2 BR PI0515920 A2 BRPI0515920 A2 BR PI0515920A2 BR PI0515920 A BRPI0515920 A BR PI0515920A BR PI0515920 A2 BRPI0515920 A2 BR PI0515920A2
Authority
BR
Brazil
Prior art keywords
processor
memory
local
virtual
local memory
Prior art date
Application number
BRPI0515920-2A
Other languages
English (en)
Inventor
Maximino Aguilar Jr
Michael Norman Day
Mark Richard Nutter
James Xenidis
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BRPI0515920A2 publication Critical patent/BRPI0515920A2/pt
Publication of BRPI0515920B1 publication Critical patent/BRPI0515920B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache

Abstract

SISTEMA E MéTODO PARA TORNAR VIRTUAIS RECURSOS DE PROCESSADOR. Um sistema e um método para o virtualização de recursos do processador é apresentado. Uma thread é criada em um processador e a memória local do processador é mapeada em um espaço de endereço eficaz. Ao fazer assim, a memória local do processador é acessível por outros processadores, independentemente de se o processador está funcionando. As threads adicionais criam mapeamentos locais adicionais do espaço de endereço eficaz. O espaço de endereço eficaz corresponde a uma memória local física ou a uma área de cópia "virtual". Quando o processador está funcionando, um processador diferente pode acessar os dados que estão situados na memória local do primeiro processador da área de armazenamento local do processador. Quando o processador não está funcionando, uma cópia virtual da memória local do processador é armazenado em uma posição de memória (isto é, memória cache travada, memória de sistema fixada, memória virtual etc.) para que outros processadores continuem acessando.
BRPI0515920-2A 2004-09-30 2005-08-24 Método, meio operável por computador e sistema para virtualização de recursos de processador BRPI0515920B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/955,093 US7290112B2 (en) 2004-09-30 2004-09-30 System and method for virtualization of processor resources
US10/955,093 2004-09-30
PCT/EP2005/054164 WO2006034931A1 (en) 2004-09-30 2005-08-24 System and method for virtualization of processor resources

Publications (2)

Publication Number Publication Date
BRPI0515920A2 true BRPI0515920A2 (pt) 2009-08-04
BRPI0515920B1 BRPI0515920B1 (pt) 2018-03-20

Family

ID=35385802

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0515920-2A BRPI0515920B1 (pt) 2004-09-30 2005-08-24 Método, meio operável por computador e sistema para virtualização de recursos de processador

Country Status (10)

Country Link
US (1) US7290112B2 (pt)
EP (1) EP1805629B1 (pt)
JP (1) JP4639233B2 (pt)
KR (1) KR100968188B1 (pt)
CN (1) CN100421089C (pt)
BR (1) BRPI0515920B1 (pt)
CA (1) CA2577865C (pt)
MX (1) MX2007003679A (pt)
TW (1) TWI340900B (pt)
WO (1) WO2006034931A1 (pt)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7716638B2 (en) * 2005-03-04 2010-05-11 Microsoft Corporation Methods for describing processor features
US7613905B2 (en) * 2006-04-06 2009-11-03 Texas Instruments Incorporated Partial register forwarding for CPUs with unequal delay functional units
US8255383B2 (en) * 2006-07-14 2012-08-28 Chacha Search, Inc Method and system for qualifying keywords in query strings
US8336046B2 (en) * 2006-12-29 2012-12-18 Intel Corporation Dynamic VM cloning on request from application based on mapping of virtual hardware configuration to the identified physical hardware resources
US7647483B2 (en) * 2007-02-20 2010-01-12 Sony Computer Entertainment Inc. Multi-threaded parallel processor methods and apparatus
US8146094B2 (en) * 2008-02-01 2012-03-27 International Business Machines Corporation Guaranteeing delivery of multi-packet GSM messages
US8484307B2 (en) * 2008-02-01 2013-07-09 International Business Machines Corporation Host fabric interface (HFI) to perform global shared memory (GSM) operations
US8239879B2 (en) * 2008-02-01 2012-08-07 International Business Machines Corporation Notification by task of completion of GSM operations at target node
US8255913B2 (en) * 2008-02-01 2012-08-28 International Business Machines Corporation Notification to task of completion of GSM operations by initiator node
US8214604B2 (en) * 2008-02-01 2012-07-03 International Business Machines Corporation Mechanisms to order global shared memory operations
US8275947B2 (en) * 2008-02-01 2012-09-25 International Business Machines Corporation Mechanism to prevent illegal access to task address space by unauthorized tasks
US8200910B2 (en) * 2008-02-01 2012-06-12 International Business Machines Corporation Generating and issuing global shared memory operations via a send FIFO
US7873879B2 (en) * 2008-02-01 2011-01-18 International Business Machines Corporation Mechanism to perform debugging of global shared memory (GSM) operations
US9454410B2 (en) 2008-03-04 2016-09-27 Microsoft Technology Licensing, Llc Transparent integration of application components
KR101398935B1 (ko) * 2008-04-29 2014-06-27 삼성전자주식회사 가상화를 이용한 시스템 복원 방법 및 장치
US9015446B2 (en) 2008-12-10 2015-04-21 Nvidia Corporation Chipset support for non-uniform memory access among heterogeneous processing units
US9032101B1 (en) 2008-12-10 2015-05-12 Nvidia Corporation Chipset support for binding and migrating hardware devices among heterogeneous processing units
US9009386B2 (en) 2010-12-13 2015-04-14 International Business Machines Corporation Systems and methods for managing read-only memory
KR20130084846A (ko) 2012-01-18 2013-07-26 삼성전자주식회사 플래시 메모리를 기반으로 하는 저장 장치, 그것을 포함한 사용자 장치, 그리고 그것의 데이터 읽기 방법
US9116809B2 (en) 2012-03-29 2015-08-25 Ati Technologies Ulc Memory heaps in a memory model for a unified computing system
CN103377141B (zh) * 2012-04-12 2016-10-12 无锡江南计算技术研究所 高速存储区的访问方法以及访问装置
US9569279B2 (en) 2012-07-31 2017-02-14 Nvidia Corporation Heterogeneous multiprocessor design for power-efficient and area-efficient computing
WO2014046974A2 (en) 2012-09-20 2014-03-27 Case Paul Sr Case secure computer architecture

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1228728B (it) * 1989-03-15 1991-07-03 Bull Hn Information Syst Sistema multiprocessore con replicazione di dati globali e due livelli di unita' di traduzione indirizzi.
JPH04246745A (ja) * 1991-02-01 1992-09-02 Canon Inc 情報処理装置及びその方法
JP3454854B2 (ja) * 1992-01-16 2003-10-06 株式会社東芝 メモリ管理装置及び方法
JP3536219B2 (ja) * 1993-10-05 2004-06-07 日本電信電話株式会社 分散メモリ保護管理装置
JPH07302227A (ja) * 1994-05-06 1995-11-14 Hitachi Ltd メモリ保護方法およびその装置
JPH0830568A (ja) * 1994-07-20 1996-02-02 Fujitsu Ltd 分散メモリ型並列計算機のキャッシュ制御方式
JP3926866B2 (ja) * 1996-05-10 2007-06-06 株式会社ソニー・コンピュータエンタテインメント 情報処理装置、情報処理方法、及び描画システム
US5860146A (en) * 1996-06-25 1999-01-12 Sun Microsystems, Inc. Auxiliary translation lookaside buffer for assisting in accessing data in remote address spaces
US6122711A (en) * 1997-01-07 2000-09-19 Unisys Corporation Method of and apparatus for store-in second level cache flush
US6003065A (en) * 1997-04-24 1999-12-14 Sun Microsystems, Inc. Method and system for distributed processing of applications on host and peripheral devices
US6075938A (en) * 1997-06-10 2000-06-13 The Board Of Trustees Of The Leland Stanford Junior University Virtual machine monitors for scalable multiprocessors
US6647508B2 (en) * 1997-11-04 2003-11-11 Hewlett-Packard Development Company, L.P. Multiprocessor computer architecture with multiple operating system instances and software controlled resource allocation
US6128724A (en) * 1997-12-11 2000-10-03 Leland Stanford Junior University Computation using codes for controlling configurable computational circuit
FI108478B (fi) * 1998-01-21 2002-01-31 Nokia Corp Sulautettu jõrjestelmõ
US6381659B2 (en) * 1999-01-19 2002-04-30 Maxtor Corporation Method and circuit for controlling a first-in-first-out (FIFO) buffer using a bank of FIFO address registers capturing and saving beginning and ending write-pointer addresses
JP3543942B2 (ja) * 2000-03-02 2004-07-21 株式会社ソニー・コンピュータエンタテインメント 画像生成装置
TW501045B (en) * 2000-03-03 2002-09-01 Sony Computer Entertainment Inc Entertainment device and computer system having exchangeability
JP2001319243A (ja) * 2000-03-03 2001-11-16 Sony Computer Entertainment Inc 画像生成装置、画像生成装置におけるジオメトリ処理形態の切換方法、記録媒体、コンピュータプログラム、半導体デバイス
US20020016878A1 (en) * 2000-07-26 2002-02-07 Flores Jose L. Technique for guaranteeing the availability of per thread storage in a distributed computing environment
US6742103B2 (en) * 2000-08-21 2004-05-25 Texas Instruments Incorporated Processing system with shared translation lookaside buffer
JP2002207685A (ja) * 2000-10-12 2002-07-26 Sony Computer Entertainment Inc 仮想世界システム、サーバコンピュータおよび情報処理装置
US6606690B2 (en) * 2001-02-20 2003-08-12 Hewlett-Packard Development Company, L.P. System and method for accessing a storage area network as network attached storage
US7233998B2 (en) * 2001-03-22 2007-06-19 Sony Computer Entertainment Inc. Computer architecture and software cells for broadband networks
US6809734B2 (en) * 2001-03-22 2004-10-26 Sony Computer Entertainment Inc. Resource dedication system and method for a computer architecture for broadband networks
US6526491B2 (en) * 2001-03-22 2003-02-25 Sony Corporation Entertainment Inc. Memory protection system and method for computer architecture for broadband networks
US6826662B2 (en) * 2001-03-22 2004-11-30 Sony Computer Entertainment Inc. System and method for data synchronization for a computer architecture for broadband networks
US7093104B2 (en) * 2001-03-22 2006-08-15 Sony Computer Entertainment Inc. Processing modules for computer architecture for broadband networks
JP2003033576A (ja) * 2001-05-18 2003-02-04 Sony Computer Entertainment Inc エンタテインメントシステム、通信システム、通信プログラム、通信プログラムを格納したコンピュータ読み取り可能な記録媒体、及び通信方法
DE10128475A1 (de) * 2001-06-12 2003-01-02 Siemens Ag Mehrprozessorsystem mit geteiltem Arbeitsspeicher
JP2003140965A (ja) * 2001-11-07 2003-05-16 Hitachi Ltd 分散共有メモリ型並列計算機および命令スケジューリング方法
US6947051B2 (en) * 2003-02-18 2005-09-20 Microsoft Corporation Video memory management
JP2005309793A (ja) * 2004-04-22 2005-11-04 Hitachi Ltd データ処理システム

Also Published As

Publication number Publication date
KR100968188B1 (ko) 2010-07-06
US20060069878A1 (en) 2006-03-30
CA2577865A1 (en) 2006-04-06
US7290112B2 (en) 2007-10-30
EP1805629B1 (en) 2012-09-26
CN100421089C (zh) 2008-09-24
KR20070052272A (ko) 2007-05-21
WO2006034931A1 (en) 2006-04-06
JP4639233B2 (ja) 2011-02-23
TW200630797A (en) 2006-09-01
CN1989492A (zh) 2007-06-27
TWI340900B (en) 2011-04-21
JP2008515069A (ja) 2008-05-08
EP1805629A1 (en) 2007-07-11
MX2007003679A (es) 2007-04-19
BRPI0515920B1 (pt) 2018-03-20
CA2577865C (en) 2011-09-27

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Legal Events

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B06G Technical and formal requirements: other requirements [chapter 6.7 patent gazette]

Free format text: APRESENTE O DEPOSITANTE A TRADUCAO COMPLETA DO PEDIDO, CONFORME O DISPOSTO NO ITEM 9.2.1 DO AN NO 128/97.

B11A Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing
B04C Request for examination: application reinstated [chapter 4.3 patent gazette]
B15K Others concerning applications: alteration of classification

Ipc: G06F 12/02 (2006.01), G06F 12/109 (2016.01)

B06A Patent application procedure suspended [chapter 6.1 patent gazette]
B06A Patent application procedure suspended [chapter 6.1 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 20/03/2018, OBSERVADAS AS CONDICOES LEGAIS.